OpenCores
URL https://opencores.org/ocsvn/tcp_socket/tcp_socket/trunk

Subversion Repositories tcp_socket

[/] [tcp_socket/] [trunk/] [xilinx_input/] [ATLYS.ucf] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 jondawson
NET  "clk_in"         LOC = "L15";
2
 
3
Net rst LOC=T15;
4
## System level constraints
5
Net rst TIG;
6
 
7
## RS232 PORT
8
Net RS232_RX LOC=A16;
9
Net RS232_TX LOC=B16;
10
 
11
##
12
NET "GPIO_BUTTONS<0>"               LOC = "N4";    ## 2   on SW4 pushbutton (active-high)
13
NET "GPIO_BUTTONS<1>"               LOC = "P4";     ## 2   on SW7 pushbutton (active-high)
14
NET "GPIO_BUTTONS<2>"               LOC = "P3";     ## 2   on SW5 pushbutton (active-high)
15
NET "GPIO_BUTTONS<3>"               LOC = "F6";     ## 2   on SW8 pushbutton (active-high)
16
 
17
##
18
NET "GPIO_LEDS<0>"                  LOC = "U18";
19
NET "GPIO_LEDS<1>"                  LOC = "M14";
20
NET "GPIO_LEDS<2>"                  LOC = "N14";
21
NET "GPIO_LEDS<3>"                  LOC = "L14";
22
NET "GPIO_LEDS<4>"                  LOC = "M13";
23
NET "GPIO_LEDS<5>"                  LOC = "D4";
24
NET "GPIO_LEDS<6>"                  LOC = "P16";
25
NET "GPIO_LEDS<7>"                  LOC = "N12";
26
 
27
##
28
NET "GPIO_SWITCHES<0>"               LOC = "A10";   ## 1   on S2 DIP switch (active-high)
29
NET "GPIO_SWITCHES<1>"               LOC = "D14";    ## 2   on S2 DIP switch (active-high)
30
NET "GPIO_SWITCHES<2>"               LOC = "C14";    ## 3   on S2 DIP switch (active-high)
31
NET "GPIO_SWITCHES<3>"               LOC = "P15";    ## 4   on S2 DIP switch (active-high)
32
NET "GPIO_SWITCHES<4>"               LOC = "P12";    ## 4   on S2 DIP switch (active-high)
33
NET "GPIO_SWITCHES<5>"               LOC = "R5";    ## 4   on S2 DIP switch (active-high)
34
NET "GPIO_SWITCHES<6>"               LOC = "T5";    ## 4   on S2 DIP switch (active-high)
35
NET "GPIO_SWITCHES<7>"               LOC = "E4";    ## 4   on S2 DIP switch (active-high)
36
 
37
##
38
NET "PHY_RESET"                   LOC = "G13";   ## 36  ON U46
39
NET "TXCLK"                       LOC = "K16";   ## 10  on U46
40
 
41
NET "TXD<0>"                      LOC = "H16";   ## 18  on U46
42
NET "TXD<1>"                      LOC = "H13";   ## 19  on U46
43
NET "TXD<2>"                      LOC = "K14";   ## 20  on U46
44
NET "TXD<3>"                      LOC = "K13";   ## 24  on U46
45
NET "TXD<4>"                      LOC = "J13";   ## 25  on U46
46
NET "TXD<5>"                      LOC = "G14";    ## 26  on U46
47
NET "TXD<6>"                      LOC = "H12";   ## 28  on U46
48
NET "TXD<7>"                      LOC = "K12";   ## 29  on U46
49
 
50
NET "TXEN"                        LOC = "H15";    ## 16  on U46
51
NET "TXER"                        LOC = "G18";    ## 13  on U46
52
NET "GTXCLK"                      LOC = "L12";   ## 14  on U46
53
 
54
NET "RXD<0>"                      LOC = "G16";   ## 3   on U46
55
NET "RXD<1>"                      LOC = "H14";   ## 128 on U46
56
NET "RXD<2>"                      LOC = "E16";   ## 126 on U46
57
NET "RXD<3>"                      LOC = "F15";   ## 125 on U46
58
NET "RXD<4>"                      LOC = "F14";   ## 124 on U46
59
NET "RXD<5>"                      LOC = "E18";   ## 123 on U46
60
NET "RXD<6>"                      LOC = "D18";   ## 121 on U46
61
NET "RXD<7>"                      LOC = "D17";   ## 120 on U46
62
 
63
NET "RXDV"                        LOC = "F17";   ## 4   on U46
64
NET "RXER"                        LOC = "F18";   ## 8   on U46
65
NET "RXCLK"                       LOC = "K15";   ## 7   ON U46
66
 
67
NET "CLK_IN" TNM_NET = "CLK_IN";
68
TIMESPEC "TS_CLK" = PERIOD "CLK_IN" 10 ns HIGH 50% INPUT_JITTER 50.0ps;
69
 
70
#Define the clock period of the 125MHz RXCLK
71
NET "RXCLK" TNM_NET = "RXCLK";
72
TIMESPEC "TS_RXCLK" = PERIOD "RXCLK" 8000 ps HIGH 50 %;
73
 
74
#Define the  setup and hold times of RX data relative to RXCLK
75
INST "RXD" TNM = "IN_GMII";
76
INST "RXDV"   TNM = "IN_GMII";
77
INST "RXER"   TNM = "IN_GMII";
78
TIMEGRP "IN_GMII" OFFSET = IN 2 ns VALID 2 ns BEFORE "RXCLK";
79
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.