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------------------------------------------------------------------------------
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------------------------------------------------------------------------------
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-- --
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-- Copyright (c) 2009-2019 Tobias Gubener --
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-- Patches by MikeJ, Till Harbaum, Rok Krajnk, ... --
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-- Subdesign fAMpIGA by TobiFlex --
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-- --
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-- This source file is free software: you can redistribute it and/or modify --
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-- it under the terms of the GNU Lesser General Public License as published --
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-- by the Free Software Foundation, either version 3 of the License, or --
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-- (at your option) any later version. --
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-- --
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-- This source file is distributed in the hope that it will be useful, --
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-- but WITHOUT ANY WARRANTY; without even the implied warranty of --
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-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the --
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-- GNU General Public License for more details. --
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-- --
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-- You should have received a copy of the GNU General Public License --
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-- along with this program. If not, see <http://www.gnu.org/licenses/>. --
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-- --
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------------------------------------------------------------------------------
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------------------------------------------------------------------------------
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library IEEE;
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use IEEE.std_logic_1164.all;
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package TG68K_Pack is
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type micro_states is (idle, nop, ld_nn, st_nn, ld_dAn1, ld_AnXn1, ld_AnXn2, st_dAn1, ld_AnXnbd1, ld_AnXnbd2, ld_AnXnbd3,
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ld_229_1, ld_229_2, ld_229_3, ld_229_4, st_229_1, st_229_2, st_229_3, st_229_4,
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st_AnXn1, st_AnXn2, bra1, bsr1, bsr2, nopnop, dbcc1, movem1, movem2, movem3,
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andi, pack1, pack2, pack3, op_AxAy, cmpm, link1, link2, unlink1, unlink2, int1, int2, int3, int4, rte1, rte2, rte3,
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rtd1, rtd2, trap00, trap0, trap1, trap2, trap3,
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trap4, trap5, trap6, movec1, movep1, movep2, movep3, movep4, movep5, rota1, bf1,
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mul1, mul2, mul_end1, mul_end2, div1, div2, div3, div4, div_end1, div_end2);
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constant opcMOVE : integer := 0; --
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constant opcMOVEQ : integer := 1; --
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constant opcMOVESR : integer := 2; --
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constant opcADD : integer := 3; --
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constant opcADDQ : integer := 4; --
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constant opcOR : integer := 5; --
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constant opcAND : integer := 6; --
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constant opcEOR : integer := 7; --
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constant opcCMP : integer := 8; --
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constant opcROT : integer := 9; --
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constant opcCPMAW : integer := 10;
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constant opcEXT : integer := 11; --
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constant opcABCD : integer := 12; --
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constant opcSBCD : integer := 13; --
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constant opcBITS : integer := 14; --
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constant opcSWAP : integer := 15; --
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constant opcScc : integer := 16; --
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constant andiSR : integer := 17; --
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constant eoriSR : integer := 18; --
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constant oriSR : integer := 19; --
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constant opcMULU : integer := 20; --
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constant opcDIVU : integer := 21; --
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constant dispouter : integer := 22; --
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constant rot_nop : integer := 23; --
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constant ld_rot_cnt : integer := 24; --
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constant writePC_add : integer := 25; --
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constant ea_data_OP1 : integer := 26; --
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constant ea_data_OP2 : integer := 27; --
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constant use_XZFlag : integer := 28; --
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constant get_bfoffset : integer := 29; --
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constant save_memaddr : integer := 30; --
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constant opcCHK : integer := 31; --
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constant movec_rd : integer := 32; --
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constant movec_wr : integer := 33; --
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constant Regwrena : integer := 34; --
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constant update_FC : integer := 35; --
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constant linksp : integer := 36; --
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constant movepl : integer := 37; --
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constant update_ld : integer := 38; --
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constant OP1addr : integer := 39; --
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constant write_reg : integer := 40; --
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constant changeMode : integer := 41; --
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constant ea_build : integer := 42; --
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constant trap_chk : integer := 43; --
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constant store_ea_data : integer := 44; --
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constant addrlong : integer := 45; --
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constant postadd : integer := 46; --
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constant presub : integer := 47; --
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constant subidx : integer := 48; --
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constant no_Flags : integer := 49; --
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constant use_SP : integer := 50; --
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constant to_CCR : integer := 51; --
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constant to_SR : integer := 52; --
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constant OP2out_one : integer := 53; --
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constant OP1out_zero : integer := 54; --
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constant mem_addsub : integer := 55; --
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constant addsub : integer := 56; --
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constant directPC : integer := 57; --
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constant direct_delta : integer := 58; --
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constant directSR : integer := 59; --
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constant directCCR : integer := 60; --
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constant exg : integer := 61; --
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constant get_ea_now : integer := 62; --
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constant ea_to_pc : integer := 63; --
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constant hold_dwr : integer := 64; --
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constant to_USP : integer := 65; --
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constant from_USP : integer := 66; --
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constant write_lowlong : integer := 67; --
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constant write_reminder : integer := 68; --
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constant movem_action : integer := 69; --
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constant briefext : integer := 70; --
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constant get_2ndOPC : integer := 71; --
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constant mem_byte : integer := 72; --
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constant longaktion : integer := 73; --
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constant opcRESET : integer := 74; --
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constant opcBF : integer := 75; --
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constant opcBFwb : integer := 76; --
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constant opcPACK : integer := 77; --
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constant opcUNPACK : integer := 78; --
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constant hold_ea_data : integer := 79; --
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constant store_ea_packdata : integer := 80; --
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constant exec_BS : integer := 81; --
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constant save_OP2 : integer := 82; --
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constant opcTRAPV : integer := 83; --
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constant lastOpcBit : integer := 83;
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component TG68K_ALU
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generic(
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MUL_Mode :integer; --0=>16Bit, 1=>32Bit, 2=>switchable with CPU(1), 3=>no MUL,
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MUL_Hardware :integer; --0=>no, 1=>yes,
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DIV_Mode :integer; --0=>16Bit, 1=>32Bit, 2=>switchable with CPU(1), 3=>no DIV,
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BarrelShifter :integer --0=>no, 1=>yes, 2=>switchable with CPU(1)
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);
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port(
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clk : in std_logic;
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Reset : in std_logic;
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clkena_lw : in std_logic:='1';
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execOPC : in bit;
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decodeOPC : in bit;
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exe_condition : in std_logic;
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exec_tas : in std_logic;
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long_start : in bit;
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non_aligned : in std_logic;
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movem_presub : in bit;
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set_stop : in bit;
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Z_error : in bit;
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rot_bits : in std_logic_vector(1 downto 0);
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exec : in bit_vector(lastOpcBit downto 0);
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OP1out : in std_logic_vector(31 downto 0);
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OP2out : in std_logic_vector(31 downto 0);
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reg_QA : in std_logic_vector(31 downto 0);
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reg_QB : in std_logic_vector(31 downto 0);
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opcode : in std_logic_vector(15 downto 0);
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-- datatype : in std_logic_vector(1 downto 0);
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exe_opcode : in std_logic_vector(15 downto 0);
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exe_datatype : in std_logic_vector(1 downto 0);
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sndOPC : in std_logic_vector(15 downto 0);
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last_data_read : in std_logic_vector(15 downto 0);
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data_read : in std_logic_vector(15 downto 0);
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FlagsSR : in std_logic_vector(7 downto 0);
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micro_state : in micro_states;
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bf_ext_in : in std_logic_vector(7 downto 0);
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bf_ext_out : out std_logic_vector(7 downto 0);
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bf_shift : in std_logic_vector(5 downto 0);
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bf_width : in std_logic_vector(5 downto 0);
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bf_ffo_offset : in std_logic_vector(31 downto 0);
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bf_loffset : in std_logic_vector(4 downto 0);
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set_V_Flag : buffer bit;
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Flags : buffer std_logic_vector(7 downto 0);
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c_out : buffer std_logic_vector(2 downto 0);
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addsub_q : buffer std_logic_vector(31 downto 0);
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ALUout : out std_logic_vector(31 downto 0)
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);
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end component;
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end;
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