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robfinch |
`timescale 1ns / 1ps
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// ============================================================================
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// __
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// \\__/ o\ (C) 2016-2018 Robert Finch, Waterloo
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// \ __ / All rights reserved.
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// \/_// robfinch<remove>@finitron.ca
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// ||
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//
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// FT64_shiftb.v
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//
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//
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// This source file is free software: you can redistribute it and/or modify
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// it under the terms of the GNU Lesser General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This source file is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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//
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// ============================================================================
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//
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//`ifndef SHL
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`define RR 6'h02
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`define SHIFTB 6'h1F
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`define SHL 4'h0
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`define SHR 4'h1
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`define ASL 4'h2
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`define ASR 4'h3
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`define ROL 4'h4
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`define ROR 4'h5
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`define SHLI 4'h8
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`define SHRI 4'h9
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`define ASLI 4'hA
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`define ASRI 4'hB
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`define ROLI 4'hC
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`define RORI 4'hD
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//`endif
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`define HIGHWORDB 15:8
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module FT64_shiftb(instr, a, b, res, ov);
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parameter DMSB=7;
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input [31:0] instr;
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input [DMSB:0] a;
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input [DMSB:0] b;
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output [DMSB:0] res;
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reg [DMSB:0] res;
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output ov;
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parameter ROTATE_INSN = 1;
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wire [5:0] opcode = instr[5:0];
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wire [5:0] func = instr[31:26];
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wire [3:0] shiftop = instr[25:22];
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wire [15:0] shl = {8'd0,a} << b[2:0];
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wire [15:0] shr = {a,8'd0} >> b[2:0];
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assign ov = 1'b0;
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always @*
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case(opcode)
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`RR:
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case(func)
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`SHIFTB:
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case(shiftop)
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`SHLI,`ASLI: res <= shl[DMSB:0];
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`SHL,`ASL: res <= shl[DMSB:0];
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`SHRI: res <= shr[`HIGHWORDB];
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`SHR: res <= shr[`HIGHWORDB];
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`ASRI: if (a[DMSB])
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res <= (shr[`HIGHWORDB]) | ~({8{1'b1}} >> b[2:0]);
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else
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res <= shr[`HIGHWORDB];
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`ASR: if (a[DMSB])
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res <= (shr[`HIGHWORDB]) | ~({8{1'b1}} >> b[2:0]);
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else
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res <= shr[`HIGHWORDB];
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`ROL: res <= ROTATE_INSN ? shl[DMSB:0]|shl[`HIGHWORDB] : 8'hDE;
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`ROLI: res <= ROTATE_INSN ? shl[DMSB:0]|shl[`HIGHWORDB] : 8'hDE;
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`ROR: res <= ROTATE_INSN ? shr[DMSB:0]|shr[`HIGHWORDB] : 8'hDE;
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`RORI: res <= ROTATE_INSN ? shr[DMSB:0]|shr[`HIGHWORDB] : 8'hDE;
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default: res <= 8'd0;
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endcase
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default: res <= 8'd0;
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endcase
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default: res <= 8'd0;
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endcase
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endmodule
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