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[/] [thor/] [trunk/] [FT64v5/] [rtl/] [fpUnit/] [fpLOOUnit.v] - Blame information for rev 51

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`timescale 1ns / 1ps
// ============================================================================
//        __
//   \\__/ o\    (C) 2006-2018  Robert Finch, Waterloo
//    \  __ /    All rights reserved.
//     \/_//     robfinch<remove>@finitron.ca
//       ||
//
//      fpLOOUnit.v
//              - single cycle latency floating point unit
//              - parameterized width
//              - IEEE 754 representation
//
//
// This source file is free software: you can redistribute it and/or modify 
// it under the terms of the GNU Lesser General Public License as published 
// by the Free Software Foundation, either version 3 of the License, or     
// (at your option) any later version.                                      
//                                                                          
// This source file is distributed in the hope that it will be useful,      
// but WITHOUT ANY WARRANTY; without even the implied warranty of           
// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the            
// GNU General Public License for more details.                             
//                                                                          
// You should have received a copy of the GNU General Public License        
// along with this program.  If not, see <http://www.gnu.org/licenses/>.    
//                                                                          
//      i2f - convert integer to floating point
//  f2i - convert floating point to integer
//
// ============================================================================
 
`define FVECTOR 6'h01
`define VFTOI   6'h24
`define VITOF   6'h25
`define FLOAT   6'h0F
`define FTOI    6'h12
`define ITOF    6'h13
 
module fpLOOUnit
#(parameter WID=32)
(
        input clk,
        input ce,
        input [39:0] ir,
        input [WID-1:0] a,
        output reg [WID-1:0] o,
        output done
);
localparam MSB = WID-1;
localparam EMSB = WID==128 ? 14 :
                  WID==96 ? 14 :
                  WID==80 ? 14 :
                  WID==64 ? 10 :
                                  WID==52 ? 10 :
                                  WID==48 ? 11 :
                                  WID==44 ? 10 :
                                  WID==42 ? 10 :
                                  WID==40 ?  9 :
                                  WID==32 ?  7 :
                                  WID==24 ?  6 : 4;
localparam FMSB = WID==128 ? 111 :
                  WID==96 ? 79 :
                  WID==80 ? 63 :
                  WID==64 ? 51 :
                                  WID==52 ? 39 :
                                  WID==48 ? 34 :
                                  WID==44 ? 31 :
                                  WID==42 ? 29 :
                                  WID==40 ? 28 :
                                  WID==32 ? 22 :
                                  WID==24 ? 15 : 9;
 
wire [WID-1:0] i2f_o;
wire [WID-1:0] f2i_o;
wire [7:0] op = ir[7:0];
wire [5:0] fn = ir[25:20];
wire [2:0] rm = ir[34:32];
wire [1:0] prec = ir[37:35];
 
delay1 u1 (
    .clk(clk),
    .ce(ce),
    .i((op==`FLOAT && (fn==`ITOF||fn==`FTOI)) || (op==`FVECTOR && (fn==`VFTOI || fn==`VITOF))),
    .o(done) );
i2f #(WID)  ui2fs (.clk(clk), .ce(ce), .rm(rm), .i(a), .o(i2f_o) );
f2i #(WID)  uf2is (.clk(clk), .ce(ce), .i(a), .o(f2i_o) );
 
always @*
        case (op)
        `FLOAT:
       case(fn)
       `ITOF:   o <= i2f_o;
       `FTOI:   o <= f2i_o;
       default: o <= 0;
       endcase
    `FVECTOR:
        case(fn)
        `VITOF:  o <= i2f_o;
        `VFTOI:  o <= f2i_o;
        default: o <= 0;
        endcase
    default:   o <= 0;
    endcase
 
endmodule

Line No.	Rev	Author	Line
1	51	robfinch	`timescale 1ns / 1ps
2			`// ============================================================================`
3			`// __`
4			`// \\__/ o\ (C) 2006-2018 Robert Finch, Waterloo`
5			`// \ __ / All rights reserved.`
6			`// \/_// robfinch<remove>@finitron.ca`
7			`// \|\|`
8			`//`
9			`// fpLOOUnit.v`
10			`// - single cycle latency floating point unit`
11			`// - parameterized width`
12			`// - IEEE 754 representation`
13			`//`
14			`//`
15			`// This source file is free software: you can redistribute it and/or modify`
16			`// it under the terms of the GNU Lesser General Public License as published`
17			`// by the Free Software Foundation, either version 3 of the License, or`
18			`// (at your option) any later version.`
19			`//`
20			`// This source file is distributed in the hope that it will be useful,`
21			`// but WITHOUT ANY WARRANTY; without even the implied warranty of`
22			`// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
23			`// GNU General Public License for more details.`
24			`//`
25			`// You should have received a copy of the GNU General Public License`
26			`// along with this program. If not, see <http://www.gnu.org/licenses/>.`
27			`//`
28			`// i2f - convert integer to floating point`
29			`// f2i - convert floating point to integer`
30			`//`
31			`// ============================================================================`
32
33			`define FVECTOR 6'h01
34			`define VFTOI 6'h24
35			`define VITOF 6'h25
36			`define FLOAT 6'h0F
37			`define FTOI 6'h12
38			`define ITOF 6'h13
39
40			`module fpLOOUnit`
41			`#(parameter WID=32)`
42			`(`
43			`input clk,`
44			`input ce,`
45			`input [39:0] ir,`
46			`input [WID-1:0] a,`
47			`output reg [WID-1:0] o,`
48			`output done`
49			`);`
50			`localparam MSB = WID-1;`
51			`localparam EMSB = WID==128 ? 14 :`
52			`WID==96 ? 14 :`
53			`WID==80 ? 14 :`
54			`WID==64 ? 10 :`
55			`WID==52 ? 10 :`
56			`WID==48 ? 11 :`
57			`WID==44 ? 10 :`
58			`WID==42 ? 10 :`
59			`WID==40 ? 9 :`
60			`WID==32 ? 7 :`
61			`WID==24 ? 6 : 4;`
62			`localparam FMSB = WID==128 ? 111 :`
63			`WID==96 ? 79 :`
64			`WID==80 ? 63 :`
65			`WID==64 ? 51 :`
66			`WID==52 ? 39 :`
67			`WID==48 ? 34 :`
68			`WID==44 ? 31 :`
69			`WID==42 ? 29 :`
70			`WID==40 ? 28 :`
71			`WID==32 ? 22 :`
72			`WID==24 ? 15 : 9;`
73
74			`wire [WID-1:0] i2f_o;`
75			`wire [WID-1:0] f2i_o;`
76			`wire [7:0] op = ir[7:0];`
77			`wire [5:0] fn = ir[25:20];`
78			`wire [2:0] rm = ir[34:32];`
79			`wire [1:0] prec = ir[37:35];`
80
81			`delay1 u1 (`
82			`.clk(clk),`
83			`.ce(ce),`
84			.i((op==`FLOAT && (fn==`ITOF\|\|fn==`FTOI)) \|\| (op==`FVECTOR && (fn==`VFTOI \|\| fn==`VITOF))),
85			`.o(done) );`
86			`i2f #(WID) ui2fs (.clk(clk), .ce(ce), .rm(rm), .i(a), .o(i2f_o) );`
87			`f2i #(WID) uf2is (.clk(clk), .ce(ce), .i(a), .o(f2i_o) );`
88
89			`always @*`
90			`case (op)`
91			`FLOAT:
92			`case(fn)`
93			`ITOF: o <= i2f_o;
94			`FTOI: o <= f2i_o;
95			`default: o <= 0;`
96			`endcase`
97			`FVECTOR:
98			`case(fn)`
99			`VITOF: o <= i2f_o;
100			`VFTOI: o <= f2i_o;
101			`default: o <= 0;`
102			`endcase`
103			`default: o <= 0;`
104			`endcase`
105
106			`endmodule`

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[/] [thor/] [trunk/] [FT64v5/] [rtl/] [fpUnit/] [fpLOOUnit.v] - Blame information for rev 51