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robfinch |
/* ===============================================================
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(C) 2006 Robert Finch
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All rights reserved.
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rob@birdcomputer.ca
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fpRes.v
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- floating point reciprocal estimate
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- zero clock cycle latency
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- IEEE 754 representation
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This source code is free for use and modification for
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non-commercial or evaluation purposes, provided this
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copyright statement and disclaimer remains present in
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the file.
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If the code is modified, please state the origin and
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note that the code has been modified.
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NO WARRANTY.
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THIS Work, IS PROVIDEDED "AS IS" WITH NO WARRANTIES OF
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ANY KIND, WHETHER EXPRESS OR IMPLIED. The user must assume
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the entire risk of using the Work.
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IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
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ANY INCIDENTAL, CONSEQUENTIAL, OR PUNITIVE DAMAGES
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WHATSOEVER RELATING TO THE USE OF THIS WORK, OR YOUR
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RELATIONSHIP WITH THE AUTHOR.
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IN ADDITION, IN NO EVENT DOES THE AUTHOR AUTHORIZE YOU
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TO USE THE WORK IN APPLICATIONS OR SYSTEMS WHERE THE
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WORK'S FAILURE TO PERFORM CAN REASONABLY BE EXPECTED
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TO RESULT IN A SIGNIFICANT PHYSICAL INJURY, OR IN LOSS
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OF LIFE. ANY SUCH USE BY YOU IS ENTIRELY AT YOUR OWN RISK,
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AND YOU AGREE TO HOLD THE AUTHOR AND CONTRIBUTORS HARMLESS
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FROM ANY CLAIMS OR LOSSES RELATING TO SUCH UNAUTHORIZED
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USE.
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This multiplier/divider handles denormalized numbers.
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The output format is of an internal expanded representation
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in preparation to be fed into a normalization unit, then
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rounding. Basically, it's the same as the regular format
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except the mantissa is doubled in size, the leading two
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bits of which are assumed to be whole bits.
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Floating Point Reciprocal Estimator
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- to estimate the reciprocal
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- negate the exponent
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- lookup the reciprocal of the fraction
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- NaN's are not altered
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Ref: Webpack8.1i Spartan3-4 xc3s1000-4ft256
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=============================================================== */
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module fpRes
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#( parameter WID=32)
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(
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input [WID:1] i,
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input [WID:1] o
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);
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// parameter WID = 32;
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localparam MSB = WID-1;
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localparam EMSB = WID==80 ? 14 : WID==64 ? 10 : WID==48 ? 10 : WID==42 ? 10 : WID==40 ? 9 : WID==32 ? 7 : WID==24 ? 6 : 4;
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localparam FMSB = WID==80 ? 63 : WID==64 ? 51 : WID==48 ? 35 : WID==42 ? 29 : WID==40 ? 28 : WID==32 ? 22 : WID==24 ? 15 : 9;
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localparam LSB = FMSB >= 32 ? 0 : WID-FMSB; // only the first 32 bits are in the table
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// Decompose the operands
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wire sa; // sign bit
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wire [EMSB:0] exp; // exponent bits
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wire [FMSB+1:0] fract;
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wire inf;
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wire nan;
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reg [WID+1:1] recip;
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// an extra '1' is added as it is used during negation of exponent
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wire [2:0] expInc = recip[31] ? 1 : recip[30] ? 2 : recip[29] ? 3 : recip[28] ? 4 : 5;
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fpDecomp #(WID) u1 (.i(a), .sgn(sa), .exp(exp), .fract(fract), .inf(inf), .nan(nan) );
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assign o = nan ? i : // nan's are not converted
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inf ? {sa,{WID-1{1'b0}}} : // reciprocal of infinity is zero
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{sa,~(exp+expInc),recip[31:LSB]<<expInc};
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// estimate 1/d 8-bit accuracy
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always @(fract)
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case(fract[FMSB+1:FMSB+1-7])
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8'd001: recip=32'h10000000;
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8'd002: recip=32'h80000000;
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8'd003: recip=32'h55555555;
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8'd004: recip=32'h40000000;
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8'd005: recip=32'h33333333;
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8'd006: recip=32'h2AAAAAAA;
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8'd007: recip=32'h24924924;
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8'd008: recip=32'h20000000;
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8'd009: recip=32'h1C71C71C;
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8'd010: recip=32'h19999999;
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8'd011: recip=32'h1745D174;
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8'd012: recip=32'h15555555;
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8'd013: recip=32'h13B13B13;
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8'd014: recip=32'h12492492;
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8'd015: recip=32'h11111111;
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8'd016: recip=32'h10000000;
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8'd017: recip=32'hF0F0F0F;
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8'd018: recip=32'hE38E38E;
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8'd019: recip=32'hD79435E;
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8'd020: recip=32'hCCCCCCC;
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8'd021: recip=32'hC30C30C;
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8'd022: recip=32'hBA2E8BA;
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8'd023: recip=32'hB21642C;
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8'd024: recip=32'hAAAAAAA;
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8'd025: recip=32'hA3D70A3;
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8'd026: recip=32'h9D89D89;
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8'd027: recip=32'h97B425E;
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8'd028: recip=32'h9249249;
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8'd029: recip=32'h8D3DCB0;
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8'd030: recip=32'h8888888;
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8'd031: recip=32'h8421084;
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8'd032: recip=32'h8000000;
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8'd033: recip=32'h7C1F07C;
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8'd034: recip=32'h7878787;
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8'd035: recip=32'h7507507;
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8'd036: recip=32'h71C71C7;
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8'd037: recip=32'h6EB3E45;
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8'd038: recip=32'h6BCA1AF;
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8'd039: recip=32'h6906906;
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8'd040: recip=32'h6666666;
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8'd041: recip=32'h63E7063;
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8'd042: recip=32'h6186186;
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8'd043: recip=32'h5F417D0;
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8'd044: recip=32'h5D1745D;
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8'd045: recip=32'h5B05B05;
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8'd046: recip=32'h590B216;
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8'd047: recip=32'h572620A;
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8'd048: recip=32'h5555555;
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8'd049: recip=32'h5397829;
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8'd050: recip=32'h51EB851;
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8'd051: recip=32'h5050505;
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8'd052: recip=32'h4EC4EC4;
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8'd053: recip=32'h4D4873E;
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8'd054: recip=32'h4BDA12F;
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8'd055: recip=32'h4A7904A;
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8'd056: recip=32'h4924924;
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8'd057: recip=32'h47DC11F;
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8'd058: recip=32'h469EE58;
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8'd059: recip=32'h456C797;
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8'd060: recip=32'h4444444;
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8'd061: recip=32'h4325C53;
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8'd062: recip=32'h4210842;
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8'd063: recip=32'h4104104;
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8'd064: recip=32'h4000000;
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8'd065: recip=32'h3F03F03;
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8'd066: recip=32'h3E0F83E;
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8'd067: recip=32'h3D22635;
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8'd068: recip=32'h3C3C3C3;
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8'd069: recip=32'h3B5CC0E;
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8'd070: recip=32'h3A83A83;
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8'd071: recip=32'h39B0AD1;
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8'd072: recip=32'h38E38E3;
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8'd073: recip=32'h381C0E0;
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8'd074: recip=32'h3759F22;
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8'd075: recip=32'h369D036;
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8'd076: recip=32'h35E50D7;
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8'd077: recip=32'h3531DEC;
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8'd078: recip=32'h3483483;
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8'd079: recip=32'h33D91D2;
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8'd080: recip=32'h3333333;
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8'd081: recip=32'h329161F;
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8'd082: recip=32'h31F3831;
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8'd083: recip=32'h3159721;
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8'd084: recip=32'h30C30C3;
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8'd085: recip=32'h3030303;
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8'd086: recip=32'h2FA0BE8;
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8'd087: recip=32'h2F14990;
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8'd088: recip=32'h2E8BA2E;
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8'd089: recip=32'h2E05C0B;
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8'd090: recip=32'h2D82D82;
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8'd091: recip=32'h2D02D02;
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8'd092: recip=32'h2C8590B;
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8'd093: recip=32'h2C0B02C;
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8'd094: recip=32'h2B93105;
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8'd095: recip=32'h2B1DA46;
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8'd096: recip=32'h2AAAAAA;
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8'd097: recip=32'h2A3A0FD;
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8'd098: recip=32'h29CBC14;
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8'd099: recip=32'h295FAD4;
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8'd100: recip=32'h28F5C28;
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8'd101: recip=32'h288DF0C;
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8'd102: recip=32'h2828282;
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8'd103: recip=32'h27C4597;
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8'd104: recip=32'h2762762;
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8'd105: recip=32'h2702702;
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8'd106: recip=32'h26A439F;
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8'd107: recip=32'h2647C69;
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8'd108: recip=32'h25ED097;
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8'd109: recip=32'h2593F69;
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8'd110: recip=32'h253C825;
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8'd111: recip=32'h24E6A17;
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8'd112: recip=32'h2492492;
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8'd113: recip=32'h243F6F0;
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8'd114: recip=32'h23EE08F;
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8'd115: recip=32'h239E0D5;
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8'd116: recip=32'h234F72C;
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8'd117: recip=32'h2302302;
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8'd118: recip=32'h22B63CB;
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8'd119: recip=32'h226B902;
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8'd120: recip=32'h2222222;
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8'd121: recip=32'h21D9EAD;
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8'd122: recip=32'h2192E29;
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8'd123: recip=32'h214D021;
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| 210 |
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8'd124: recip=32'h2108421;
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8'd125: recip=32'h20C49BA;
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8'd126: recip=32'h2082082;
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8'd127: recip=32'h2040810;
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8'd128: recip=32'h2000000;
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8'd129: recip=32'h1FC07F0;
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8'd130: recip=32'h1F81F81;
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8'd131: recip=32'h1F44659;
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8'd132: recip=32'h1F07C1F;
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| 219 |
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8'd133: recip=32'h1ECC07B;
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| 220 |
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8'd134: recip=32'h1E9131A;
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| 221 |
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8'd135: recip=32'h1E573AC;
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| 222 |
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8'd136: recip=32'h1E1E1E1;
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| 223 |
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8'd137: recip=32'h1DE5D6E;
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| 224 |
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8'd138: recip=32'h1DAE607;
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| 225 |
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8'd139: recip=32'h1D77B65;
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| 226 |
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8'd140: recip=32'h1D41D41;
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| 227 |
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8'd141: recip=32'h1D0CB58;
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| 228 |
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8'd142: recip=32'h1CD8568;
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| 229 |
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8'd143: recip=32'h1CA4B30;
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| 230 |
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8'd144: recip=32'h1C71C71;
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| 231 |
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8'd145: recip=32'h1C3F8F0;
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| 232 |
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8'd146: recip=32'h1C0E070;
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| 233 |
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8'd147: recip=32'h1BDD2B8;
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| 234 |
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8'd148: recip=32'h1BACF91;
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| 235 |
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8'd149: recip=32'h1B7D6C3;
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| 236 |
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8'd150: recip=32'h1B4E81B;
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| 237 |
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8'd151: recip=32'h1B20364;
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| 238 |
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8'd152: recip=32'h1AF286B;
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| 239 |
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8'd153: recip=32'h1AC5701;
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| 240 |
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8'd154: recip=32'h1A98EF6;
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| 241 |
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8'd155: recip=32'h1A6D01A;
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| 242 |
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8'd156: recip=32'h1A41A41;
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| 243 |
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8'd157: recip=32'h1A16D3F;
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| 244 |
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8'd158: recip=32'h19EC8E9;
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| 245 |
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8'd159: recip=32'h19C2D14;
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| 246 |
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8'd160: recip=32'h1999999;
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| 247 |
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8'd161: recip=32'h1970E4F;
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| 248 |
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8'd162: recip=32'h1948B0F;
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| 249 |
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8'd163: recip=32'h1920FB4;
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| 250 |
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8'd164: recip=32'h18F9C18;
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| 251 |
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8'd165: recip=32'h18D3018;
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| 252 |
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8'd166: recip=32'h18ACB90;
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| 253 |
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8'd167: recip=32'h1886E5F;
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| 254 |
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8'd168: recip=32'h1861861;
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| 255 |
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8'd169: recip=32'h183C977;
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| 256 |
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8'd170: recip=32'h1818181;
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| 257 |
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8'd171: recip=32'h17F405F;
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| 258 |
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8'd172: recip=32'h17D05F4;
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| 259 |
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8'd173: recip=32'h17AD220;
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| 260 |
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8'd174: recip=32'h178A4C8;
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| 261 |
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8'd175: recip=32'h1767DCE;
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| 262 |
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8'd176: recip=32'h1745D17;
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| 263 |
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8'd177: recip=32'h1724287;
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| 264 |
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8'd178: recip=32'h1702E05;
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| 265 |
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8'd179: recip=32'h16E1F76;
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| 266 |
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8'd180: recip=32'h16C16C1;
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| 267 |
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8'd181: recip=32'h16A13CD;
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| 268 |
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8'd182: recip=32'h1681681;
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| 269 |
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8'd183: recip=32'h1661EC6;
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| 270 |
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8'd184: recip=32'h1642C85;
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| 271 |
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8'd185: recip=32'h1623FA7;
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| 272 |
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8'd186: recip=32'h1605816;
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| 273 |
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8'd187: recip=32'h15E75BB;
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| 274 |
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8'd188: recip=32'h15C9882;
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| 275 |
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8'd189: recip=32'h15AC056;
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| 276 |
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8'd190: recip=32'h158ED23;
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| 277 |
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8'd191: recip=32'h1571ED3;
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| 278 |
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8'd192: recip=32'h1555555;
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| 279 |
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8'd193: recip=32'h1539094;
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| 280 |
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8'd194: recip=32'h151D07E;
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| 281 |
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8'd195: recip=32'h1501501;
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| 282 |
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8'd196: recip=32'h14E5E0A;
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| 283 |
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8'd197: recip=32'h14CAB88;
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| 284 |
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8'd198: recip=32'h14AFD6A;
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| 285 |
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8'd199: recip=32'h149539E;
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| 286 |
|
|
8'd200: recip=32'h147AE14;
|
| 287 |
|
|
8'd201: recip=32'h1460CBC;
|
| 288 |
|
|
8'd202: recip=32'h1446F86;
|
| 289 |
|
|
8'd203: recip=32'h142D662;
|
| 290 |
|
|
8'd204: recip=32'h1414141;
|
| 291 |
|
|
8'd205: recip=32'h13FB013;
|
| 292 |
|
|
8'd206: recip=32'h13E22CB;
|
| 293 |
|
|
8'd207: recip=32'h13C995A;
|
| 294 |
|
|
8'd208: recip=32'h13B13B1;
|
| 295 |
|
|
8'd209: recip=32'h13991C2;
|
| 296 |
|
|
8'd210: recip=32'h1381381;
|
| 297 |
|
|
8'd211: recip=32'h13698DF;
|
| 298 |
|
|
8'd212: recip=32'h13521CF;
|
| 299 |
|
|
8'd213: recip=32'h133AE45;
|
| 300 |
|
|
8'd214: recip=32'h1323E34;
|
| 301 |
|
|
8'd215: recip=32'h130D190;
|
| 302 |
|
|
8'd216: recip=32'h12F684B;
|
| 303 |
|
|
8'd217: recip=32'h12E025C;
|
| 304 |
|
|
8'd218: recip=32'h12C9FB4;
|
| 305 |
|
|
8'd219: recip=32'h12B404A;
|
| 306 |
|
|
8'd220: recip=32'h129E412;
|
| 307 |
|
|
8'd221: recip=32'h1288B01;
|
| 308 |
|
|
8'd222: recip=32'h127350B;
|
| 309 |
|
|
8'd223: recip=32'h125E227;
|
| 310 |
|
|
8'd224: recip=32'h1249249;
|
| 311 |
|
|
8'd225: recip=32'h1234567;
|
| 312 |
|
|
8'd226: recip=32'h121FB78;
|
| 313 |
|
|
8'd227: recip=32'h120B470;
|
| 314 |
|
|
8'd228: recip=32'h11F7047;
|
| 315 |
|
|
8'd229: recip=32'h11E2EF3;
|
| 316 |
|
|
8'd230: recip=32'h11CF06A;
|
| 317 |
|
|
8'd231: recip=32'h11BB4A4;
|
| 318 |
|
|
8'd232: recip=32'h11A7B96;
|
| 319 |
|
|
8'd233: recip=32'h1194538;
|
| 320 |
|
|
8'd234: recip=32'h1181181;
|
| 321 |
|
|
8'd235: recip=32'h116E068;
|
| 322 |
|
|
8'd236: recip=32'h115B1E5;
|
| 323 |
|
|
8'd237: recip=32'h11485F0;
|
| 324 |
|
|
8'd238: recip=32'h1135C81;
|
| 325 |
|
|
8'd239: recip=32'h112358E;
|
| 326 |
|
|
8'd240: recip=32'h1111111;
|
| 327 |
|
|
8'd241: recip=32'h10FEF01;
|
| 328 |
|
|
8'd242: recip=32'h10ECF56;
|
| 329 |
|
|
8'd243: recip=32'h10DB20A;
|
| 330 |
|
|
8'd244: recip=32'h10C9714;
|
| 331 |
|
|
8'd245: recip=32'h10B7E6E;
|
| 332 |
|
|
8'd246: recip=32'h10A6810;
|
| 333 |
|
|
8'd247: recip=32'h10953F3;
|
| 334 |
|
|
8'd248: recip=32'h1084210;
|
| 335 |
|
|
8'd249: recip=32'h1073260;
|
| 336 |
|
|
8'd250: recip=32'h10624DD;
|
| 337 |
|
|
8'd251: recip=32'h105197F;
|
| 338 |
|
|
8'd252: recip=32'h1041041;
|
| 339 |
|
|
8'd253: recip=32'h103091B;
|
| 340 |
|
|
8'd254: recip=32'h1020408;
|
| 341 |
|
|
8'd255: recip=32'h1010101;
|
| 342 |
|
|
endcase
|
| 343 |
|
|
|
| 344 |
|
|
endmodule
|
| 345 |
|
|
|
| 346 |
|
|
|
