OpenCores
URL https://opencores.org/ocsvn/thor/thor/trunk

Subversion Repositories thor

[/] [thor/] [trunk/] [FT64v5/] [rtl/] [fpUnit/] [fpdivr16_tb.v] - Blame information for rev 51

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 51 robfinch
module fpdivr16_tb();
2
 
3
reg rst;
4
reg clk;
5
reg ld;
6
reg [15:0] cnt;
7
 
8
wire ce = 1'b1;
9
wire [59:0] a = 32'h817654;
10
wire [59:0] b = 32'h17;
11
wire [119:0] q;
12
wire [119:0] r;
13
wire done;
14
 
15
initial begin
16
        clk = 1;
17
        rst = 0;
18
        #100 rst = 1;
19
        #100 rst = 0;
20
end
21
 
22
always #20 clk = ~clk;  //  25 MHz
23
 
24
always @(posedge clk)
25
        if (rst)
26
                cnt <= 0;
27
        else begin
28
                ld <= 0;
29
                cnt <= cnt + 1;
30
                if (cnt == 3)
31
                        ld <= 1;
32
                $display("%d: ld=%b q=%h r=%h done=%b", divu0.cnt, ld, q, r, done);
33
                if (cnt==2000)
34
                        $finish;
35
        end
36
 
37
 
38
fpdivr16 #(60) divu0(.clk(clk), .ld(ld), .a(a), .b(b), .q(q), .r(r), .done(done) );
39
 
40
endmodule
41
 
42
 
43
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.