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robfinch |
// ============================================================================
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// __
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// \\__/ o\ (C) 2012-2018 Robert Finch, Waterloo
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// \ __ / All rights reserved.
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// \/_// robfinch<remove>@finitron.ca
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// ||
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//
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// CC64 - 'C' derived language compiler
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// - 64 bit CPU
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//
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// This source file is free software: you can redistribute it and/or modify
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// it under the terms of the GNU Lesser General Public License as published
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// by the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This source file is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <http://www.gnu.org/licenses/>.
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//
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// ============================================================================
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//
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#include "stdafx.h"
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#define SUPPORT_BITFIELD false
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static void SignExtendBitfield(ENODE *node, Operand *ap3, uint64_t mask)
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{
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Operand *ap2;
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uint64_t umask;
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umask = 0x8000000000000000LL | ~(mask >> 1);
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ap2 = GetTempRegister();
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GenerateDiadic(op_ldi,0,ap2,make_immed(umask));
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GenerateTriadic(op_add,0,ap3,ap3,ap2);
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GenerateTriadic(op_xor,0,ap3,ap3,ap2);
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ReleaseTempRegister(ap2);
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}
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Operand *GenerateBitfieldDereference(ENODE *node, int flags, int size)
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{
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Operand *ap, *ap3;
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int width = node->bit_width + 1;
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int isSigned;
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uint64_t mask;
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isSigned = node->nodetype==en_wfieldref || node->nodetype==en_hfieldref || node->nodetype==en_cfieldref || node->nodetype==en_bfieldref;
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mask = 0;
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while (--width) mask = mask + mask + 1;
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ap3 = GetTempRegister();
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ap3->tempflag = TRUE;
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ap = GenerateDereference(node, flags, node->esize, isSigned);
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ap->MakeLegal(flags, node->esize);
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if (ap->mode == am_reg)
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GenerateDiadic(op_mov, 0, ap3, ap);
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else if (ap->mode == am_imm)
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GenerateDiadic(op_ldi, 0, ap3, ap);
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else // memory
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GenLoad(ap3, ap, node->esize, node->esize);
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// ReleaseTempRegister(ap);
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if (SUPPORT_BITFIELD) {
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if (isSigned)
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Generate4adic(op_bfext,0,ap3, ap3, make_immed((int) node->bit_offset), make_immed((int)(node->bit_width-1)));
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else
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Generate4adic(op_bfextu,0,ap3, ap3, make_immed((int) node->bit_offset), make_immed((int)(node->bit_width-1)));
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}
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else {
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if (node->bit_offset > 0)
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GenerateTriadic(op_shru, 0, ap3, ap3, make_immed((int) node->bit_offset));
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GenerateTriadic(op_and, 0, ap3, ap3, make_immed(mask));
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if (isSigned)
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SignExtendBitfield(node, ap3, mask);
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}
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ap3->MakeLegal(flags, node->esize);
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ap3->next = ap;
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ap3->offset = node;
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return (ap3);
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}
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void GenerateBitfieldInsert(Operand *ap1, Operand *ap2, int offset, int width)
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{
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int nn;
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uint64_t mask;
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/* Processor doesn't support bitfield insert except for immediates
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if (SUPPORT_BITFIELD)
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Generate4adic(op_bfins,0,ap1,ap2,make_immed(offset), make_immed(width-1));
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else
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*/
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{
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for (mask = nn = 0; nn < width; nn++)
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mask = (mask << 1) | 1;
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mask = ~mask;
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GenerateDiadic(op_and,0,ap2,make_immed(~mask)); // clear unwanted bits in source
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if (offset > 0)
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GenerateTriadic(op_ror,0,ap1,ap1,make_immed(offset));
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GenerateTriadic(op_and,0,ap1,ap1,make_immed(mask)); // clear bits in target field
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GenerateTriadic(op_or,0,ap1,ap1,ap2);
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if (offset > 0)
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GenerateTriadic(op_rol,0,ap1,ap1,make_immed(offset));
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}
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}
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Operand *GenerateBitfieldAssign(ENODE *node, int flags, int size)
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{
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Operand *ap1, *ap2 ,*ap3;
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// we don't want a bitfield dereference operation here.
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// We want all the bits.
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ap1 = GenerateExpression(node->p[0],F_REG|F_MEM|BF_ASSIGN,size);
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ap2 = GenerateExpression(node->p[1],F_REG,size);
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if (ap1->mode == am_reg) {
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GenerateBitfieldInsert(ap1, ap2, node->p[0]->bit_offset, node->p[0]->bit_width);
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}
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else {
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ap3 = GetTempRegister();
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GenLoad(ap3,ap1,size,size);
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GenerateBitfieldInsert(ap3, ap2, node->p[0]->bit_offset, node->p[0]->bit_width);
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GenStore(ap3,ap1,size);
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ReleaseTempRegister(ap3);
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}
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ReleaseTempRegister(ap2);
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ap1->MakeLegal( flags, size);
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return ap1;
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}
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