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[/] [tosnet/] [trunk/] [gateware/] [MicroBlaze_Peripheral_rev3_2/] [readme.txt] - Blame information for rev 5

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  TosNet rev3.2
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  MicroBlaze Peripheral, readme.txt
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  Simon Falsig
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  University of Southern Denmark
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  Copyright 2010
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  This file is part of the TosNet MicroBlaze Peripheral
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  The TosNet MicroBlaze peripheral is free software: you can redistribute it
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  and/or modify it under the terms of the GNU Lesser General Public License as
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  published by the Free Software Foundation, either version 3 of the License,
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  or (at your option) any later version.
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  The TosNet MicroBlaze peripheral is distributed in the hope that it will be
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  useful, but WITHOUT ANY WARRANTY; without even the implied warranty of
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  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU Lesser
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  General Public License for more details.
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  You should have received a copy of the GNU Lesser General Public License
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  along with the TosNet MicroBlaze peripheral. If not, see
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  .
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******************************************
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* Description
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******************************************
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  The TosNet MicroBlaze peripheral provides an implementation of the TosNet
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  core, interfaced to the MicroBlaze PLB bus, along with a software driver
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  to support the functionality.
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******************************************
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* Installation
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******************************************
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  Copy the contents of the 'drivers' and 'pcores' folders to an EDK peripheral
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  repository, preserving the original folder structure.
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  For instance:
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    c:\XilinxEDKRepository\MyProcessorIPLib\pcores\tosnet_v3_20_a
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    c:\XilinxEDKRepository\MyProcessorIPLib\drivers\tosnet_v3_20_a
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  You should now have access to the TosNet core from within EDKs IP Library.
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******************************************
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* Usage, XPS
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******************************************
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  1. Add the TosNet component to your design.
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  2. Make 'sig_in' and 'sig_out' external, and connect these to your
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     transmission components.
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  3. Connect 'clk_50M' to a 50 MHz clock signal.
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  4. Connect the 'sync_strobe' and 'system_halt' interrupt signals to an
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     interrupt controller, if necessary.
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  5. Connect the TosNet component to the PLB bus.
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  6. Configure the TosNet component to your likings ('Configure IP').
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     Important settings are the 'C_NODE_ID' and 'C_REG_ENABLE', that
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     configure the node id and register enables, respectively.
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  7. Generate addresses for the memory and register spaces. The memory space
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     needs 8 kB, the register space needs 40 B (in both cases, larger spaces
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     of course work fine too).
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  8. Done!
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******************************************
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* Usage, SDK
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******************************************
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  1. Make sure that SDK is using the TosNet driver for the TosNet component.
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  2. Initialize a TosNet structure.
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  3. Use the API described in 'tosnet.h' to access the TosNet component.
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******************************************
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* Important notes
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******************************************
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  The MicroBlaze peripheral uses the exact same source files as the standard
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  TosNet component. This also goes for the BlockRAM and FIFO cores. The cores
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  delivered with the peripheral are created for the xc6slx16,csg234 device.
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  If you need to use the peripheral with other devices, you may have to
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  recreate the cores, using the settings described in the readme in the
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  'pcores\tosnet_v3_20_a\netlist' folder.
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******************************************
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* End of file
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******************************************

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