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dbrochart |
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#### ####
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#### extInf.py ####
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#### ####
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#### This file is part of the turbo decoder IP core project ####
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#### http://www.opencores.org/projects/turbocodes/ ####
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#### ####
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#### Author(s): ####
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#### - David Brochart(dbrochart@opencores.org) ####
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#### ####
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#### All additional information is available in the README.txt ####
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#### file. ####
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#### ####
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######################################################################
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#### ####
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#### Copyright (C) 2005 Authors ####
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#### ####
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#### This source file may be used and distributed without ####
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#### restriction provided that this copyright statement is not ####
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#### removed from the file and that any derivative work contains ####
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#### the original copyright notice and the associated disclaimer. ####
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#### ####
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#### This source file is free software; you can redistribute it ####
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#### and/or modify it under the terms of the GNU Lesser General ####
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#### Public License as published by the Free Software Foundation; ####
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#### either version 2.1 of the License, or (at your option) any ####
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#### later version. ####
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#### ####
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#### This source is distributed in the hope that it will be ####
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#### useful, but WITHOUT ANY WARRANTY; without even the implied ####
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#### warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ####
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#### PURPOSE. See the GNU Lesser General Public License for more ####
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#### details. ####
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#### ####
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#### You should have received a copy of the GNU Lesser General ####
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#### Public License along with this source; if not, download it ####
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#### from http://www.opencores.org/lgpl.shtml ####
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#### ####
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######################################################################
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from myhdl import Signal, intbv, instance
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def extInf(llr0, llr1, llr2, llr3, zin, a, b, zout, r = 5, n = 4, q = 8):
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""" Extrinsic information.
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r -- extrinsic information width
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n -- systematic data width
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q -- accumulated distance width
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llr0 -- in : LLR for (a, b) = (0, 0)
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llr1 -- in : LLR for (a, b) = (0, 1)
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llr2 -- in : LLR for (a, b) = (1, 0)
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llr3 -- in : LLR for (a, b) = (1, 1)
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zin -- in : extrinsic information input signal
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a, b -- in : decoder systematic input signals
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zout -- out : extrinsic information output signal
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"""
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a_plus_b = intbv(0, -(2**(n-1)), 2**(n-1))
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a_min_b = intbv(0, -(2**(n-1)), 2**(n-1))
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tmp = [intbv(0, -(2**(n-1)) - (2**r), 2**q + 2**(n-1)) for i in range(7)]
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tmp2 = [intbv(0, 0, 2**q + 2**(n-1) + (2**(n-1)) + (2**r)) for i in range(4)]
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@instance
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def extInfLogic():
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while 1:
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a_plus_b = (a.val + b.val) / 2
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a_min_b = (a.val - b.val) / 2
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tmp[0] = llr0.val - a_plus_b - zin[0].val
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tmp[1] = llr1.val - a_min_b - zin[1].val
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tmp[2] = llr2.val + a_min_b - zin[2].val
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tmp[3] = llr3.val + a_plus_b - zin[3].val
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if tmp[0] < tmp[1]:
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tmp[4] = tmp[0]
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else:
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tmp[4] = tmp[1]
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if tmp[2] < tmp[3]:
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tmp[5] = tmp[2]
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else:
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tmp[5] = tmp[3]
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if tmp[4] < tmp[5]:
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tmp[6] = tmp[4]
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else:
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tmp[6] = tmp[5]
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tmp2[0] = intbv(tmp[0] - tmp[6])
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tmp2[1] = intbv(tmp[1] - tmp[6])
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tmp2[2] = intbv(tmp[2] - tmp[6])
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tmp2[3] = intbv(tmp[3] - tmp[6])
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if tmp2[0] >= 2**r:
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zout[0].next = 2**r - 1
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else:
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zout[0].next = tmp2[0]
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if tmp2[1] >= 2**r:
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zout[1].next = 2**r - 1
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else:
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zout[1].next = tmp2[1]
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if tmp2[2] >= 2**r:
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zout[2].next = 2**r - 1
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else:
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zout[2].next = tmp2[2]
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if tmp2[3] >= 2**r:
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zout[3].next = 2**r - 1
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else:
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zout[3].next = tmp2[3]
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yield llr0, llr1, llr2, llr3, zin[0], zin[1], zin[2], zin[3], a, b
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return extInfLogic
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