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[/] [uart2bus_testbench/] [trunk/] [tb/] [uvm_src/] [macros/] [uvm_reg_defines.svh] - Blame information for rev 16

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1 16 HanySalah
//----------------------------------------------------------------------
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//   Copyright 2010 Synopsys, Inc.
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//   Copyright 2010 Mentor Graphics Corporation
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//   All Rights Reserved Worldwide
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//
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//   Licensed under the Apache License, Version 2.0 (the
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//   "License"); you may not use this file except in
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//   compliance with the License.  You may obtain a copy of
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//   the License at
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//
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//       http://www.apache.org/licenses/LICENSE-2.0
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//
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//   Unless required by applicable law or agreed to in
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//   writing, software distributed under the License is
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//   distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
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//   CONDITIONS OF ANY KIND, either express or implied.  See
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//   the License for the specific language governing
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//   permissions and limitations under the License.
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//----------------------------------------------------------------------
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//------------------------
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// File: Register Defines
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//------------------------
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// Macro: `UVM_REG_ADDR_WIDTH
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//
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// Maximum address width in bits
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//
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// Default value is 64. Used to define the  type.
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//
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`ifndef UVM_REG_ADDR_WIDTH
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 `define UVM_REG_ADDR_WIDTH 64
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`endif
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// Macro: `UVM_REG_DATA_WIDTH
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//
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// Maximum data width in bits
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//
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// Default value is 64. Used to define the  type.
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//
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`ifndef UVM_REG_DATA_WIDTH
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 `define UVM_REG_DATA_WIDTH 64
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`endif
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// Macro: `UVM_REG_BYTENABLE_WIDTH
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//
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// Maximum number of byte enable bits
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//
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// Default value is one per byte in <`UVM_REG_DATA_WIDTH>.
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// Used to define the  type.
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//
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`ifndef UVM_REG_BYTENABLE_WIDTH
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  `define UVM_REG_BYTENABLE_WIDTH ((`UVM_REG_DATA_WIDTH-1)/8+1)
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`endif
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// Macro: `UVM_REG_CVR_WIDTH
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//
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// Maximum number of bits in a  coverage model set.
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//
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// Default value is 32.
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//
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`ifndef UVM_REG_CVR_WIDTH
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 `define UVM_REG_CVR_WIDTH 32
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`endif
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