OpenCores
URL https://opencores.org/ocsvn/uart2bus_testbench/uart2bus_testbench/trunk

Subversion Repositories uart2bus_testbench

[/] [uart2bus_testbench/] [trunk/] [tb/] [uvm_src/] [tlm1/] [uvm_tlm_ifs.svh] - Blame information for rev 16

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 16 HanySalah
//
2
//-----------------------------------------------------------------------------
3
//   Copyright 2007-2011 Mentor Graphics Corporation
4
//   Copyright 2007-2010 Cadence Design Systems, Inc.
5
//   Copyright 2010 Synopsys, Inc.
6
//   All Rights Reserved Worldwide
7
//
8
//   Licensed under the Apache License, Version 2.0 (the
9
//   "License"); you may not use this file except in
10
//   compliance with the License.  You may obtain a copy of
11
//   the License at
12
//
13
//       http://www.apache.org/licenses/LICENSE-2.0
14
//
15
//   Unless required by applicable law or agreed to in
16
//   writing, software distributed under the License is
17
//   distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
18
//   CONDITIONS OF ANY KIND, either express or implied.  See
19
//   the License for the specific language governing
20
//   permissions and limitations under the License.
21
//-----------------------------------------------------------------------------
22
 
23
`define UVM_TASK_ERROR "TLM interface task not implemented"
24
`define UVM_FUNCTION_ERROR "TLM interface function not implemented"
25
 
26
//-----------------------------------------------------------------------------
27
//
28
// CLASS: uvm_tlm_if_base #(T1,T2)
29
//
30
// This class declares all of the methods of the TLM API.
31
//
32
// Various subsets of these methods are combined to form primitive TLM
33
// interfaces, which are then paired in various ways to form more abstract
34
// "combination" TLM interfaces. Components that require a particular interface
35
// use ports to convey that requirement. Components that provide a particular
36
// interface use exports to convey its availability.
37
//
38
// Communication between components is established by connecting ports to
39
// compatible exports, much like connecting module signal-level output ports to
40
// compatible input ports. The difference is that UVM ports and exports bind
41
// interfaces (groups of methods), not signals and wires. The methods of the
42
// interfaces so bound pass data as whole transactions (e.g. objects).
43
// The set of primitive and combination TLM interfaces afford many choices for
44
// designing components that communicate at the transaction level.
45
//
46
//-----------------------------------------------------------------------------
47
 
48
virtual class uvm_tlm_if_base #(type T1=int, type T2=int);
49
 
50
  // Group: Blocking put
51
 
52
  // Task: put
53
  //
54
  // Sends a user-defined transaction of type T.
55
  //
56
  // Components implementing the put method will block the calling thread if
57
  // it cannot immediately accept delivery of the transaction.
58
 
59
  virtual task put( input T1 t );
60
    uvm_report_error("put", `UVM_TASK_ERROR, UVM_NONE);
61
  endtask
62
 
63
  // Group: Blocking get
64
 
65
  // Task: get
66
  //
67
  // Provides a new transaction of type T.
68
  //
69
  // The calling thread is blocked if the requested transaction cannot be
70
  // provided immediately. The new transaction is returned in the provided
71
  // output argument.
72
  //
73
  // The implementation of get must regard the transaction as consumed.
74
  // Subsequent calls to get must return a different transaction instance.
75
 
76
  virtual task get( output T2 t );
77
    uvm_report_error("get", `UVM_TASK_ERROR, UVM_NONE);
78
  endtask
79
 
80
 
81
  // Group: Blocking peek
82
 
83
  // Task: peek
84
  //
85
  // Obtain a new transaction without consuming it.
86
  //
87
  // If a transaction is available, then it is written to the provided output
88
  // argument. If a transaction is not available, then the calling thread is
89
  // blocked until one is available.
90
  //
91
  // The returned transaction is not consumed. A subsequent peek or get will
92
  // return the same transaction.
93
 
94
  virtual task peek( output T2 t );
95
    uvm_report_error("peek", `UVM_TASK_ERROR, UVM_NONE);
96
  endtask
97
 
98
 
99
  // Group: Non-blocking put
100
 
101
  // Function: try_put
102
  //
103
  // Sends a transaction of type T, if possible.
104
  //
105
  // If the component is ready to accept the transaction argument, then it does
106
  // so and returns 1, otherwise it returns 0.
107
 
108
  virtual function bit try_put( input T1 t );
109
    uvm_report_error("try_put", `UVM_FUNCTION_ERROR, UVM_NONE);
110
    return 0;
111
  endfunction
112
 
113
 
114
  // Function: can_put
115
  //
116
  // Returns 1 if the component is ready to accept the transaction; 0 otherwise.
117
 
118
  virtual function bit can_put();
119
    uvm_report_error("can_put", `UVM_FUNCTION_ERROR, UVM_NONE);
120
    return 0;
121
  endfunction
122
 
123
 
124
  // Group: Non-blocking get
125
 
126
  // Function: try_get
127
  //
128
  // Provides a new transaction of type T.
129
  //
130
  // If a transaction is immediately available, then it is written to the output
131
  // argument and 1 is returned. Otherwise, the output argument is not modified
132
  // and 0 is returned.
133
 
134
  virtual function bit try_get( output T2 t );
135
    uvm_report_error("try_get", `UVM_FUNCTION_ERROR, UVM_NONE);
136
    return 0;
137
  endfunction
138
 
139
 
140
  // Function: can_get
141
  //
142
  // Returns 1 if a new transaction can be provided immediately upon request,
143
  // 0 otherwise.
144
 
145
  virtual function bit can_get();
146
    uvm_report_error("can_get", `UVM_FUNCTION_ERROR, UVM_NONE);
147
    return 0;
148
  endfunction
149
 
150
 
151
  // Group: Non-blocking peek
152
 
153
  // Function: try_peek
154
  //
155
  // Provides a new transaction without consuming it.
156
  //
157
  // If available, a transaction is written to the output argument and 1 is
158
  // returned. A subsequent peek or get will return the same transaction. If a
159
  // transaction is not available, then the argument is unmodified and 0 is
160
  // returned.
161
 
162
  virtual function bit try_peek( output T2 t );
163
    uvm_report_error("try_peek", `UVM_FUNCTION_ERROR, UVM_NONE);
164
    return 0;
165
  endfunction
166
 
167
 
168
  // Function: can_peek
169
  //
170
  // Returns 1 if a new transaction is available; 0 otherwise.
171
 
172
  virtual function bit can_peek();
173
    uvm_report_error("can_ppeek", `UVM_FUNCTION_ERROR, UVM_NONE);
174
    return 0;
175
  endfunction
176
 
177
 
178
  // Group: Blocking transport
179
 
180
  // Task: transport
181
  //
182
  // Executes the given request and returns the response in the given output
183
  // argument. The calling thread may block until the operation is complete.
184
 
185
  virtual task transport( input T1 req , output T2 rsp );
186
    uvm_report_error("transport", `UVM_TASK_ERROR, UVM_NONE);
187
  endtask
188
 
189
 
190
  // Group: Non-blocking transport
191
 
192
  // Task: nb_transport
193
  //
194
  // Executes the given request and returns the response in the given output
195
  // argument. Completion of this operation must occur without blocking.
196
  //
197
  // If for any reason the operation could not be executed immediately, then
198
  // a 0 must be returned; otherwise 1.
199
 
200
  virtual function bit nb_transport(input T1 req, output T2 rsp);
201
    uvm_report_error("nb_transport", `UVM_FUNCTION_ERROR, UVM_NONE);
202
    return 0;
203
  endfunction
204
 
205
 
206
  // Group: Analysis
207
 
208
  // Function: write
209
  //
210
  // Broadcasts a user-defined transaction of type T to any number of listeners.
211
  // The operation must complete without blocking.
212
 
213
  virtual function void write( input T1 t );
214
    uvm_report_error("write", `UVM_FUNCTION_ERROR, UVM_NONE);
215
  endfunction
216
 
217
endclass
218
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.