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[/] [udp_ip_stack/] [trunk/] [bench/] [vhdl/] [IP_complete_nomac_tb.vhd] - Blame information for rev 8

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1 2 pjf
--------------------------------------------------------------------------------
2
-- Company: 
3
-- Engineer:
4
--
5
-- Create Date:   13:54:32 06/04/2011
6
-- Design Name:   
7
-- Module Name:   C:/Users/pjf/Documents/projects/fpga/xilinx/Network/ip1/IP_complete_nomac_tb.vhd
8
-- Project Name:  ip1
9
-- Target Device:  
10
-- Tool versions:  
11
-- Description:   
12
-- 
13
-- VHDL Test Bench Created by ISE for module: IP_complete_nomac
14
-- 
15
-- Dependencies:
16
-- 
17
-- Revision:
18
-- Revision 0.01 - File Created
19
-- Additional Comments:
20
--
21
-- Notes: 
22
-- This testbench has been automatically generated using types std_logic and
23
-- std_logic_vector for the ports of the unit under test.  Xilinx recommends
24
-- that these types always be used for the top-level I/O of a design in order
25
-- to guarantee that the testbench will bind correctly to the post-implementation 
26
-- simulation model.
27
--------------------------------------------------------------------------------
28
LIBRARY ieee;
29
USE ieee.std_logic_1164.ALL;
30
use IEEE.NUMERIC_STD.ALL;
31
use work.axi.all;
32
use work.ipv4_types.all;
33
use work.arp_types.all;
34
 
35
ENTITY IP_complete_nomac_tb IS
36
END IP_complete_nomac_tb;
37
 
38
ARCHITECTURE behavior OF IP_complete_nomac_tb IS
39
 
40
    -- Component Declaration for the Unit Under Test (UUT)
41
 
42
    COMPONENT IP_complete_nomac
43 8 pjf
         generic (
44
                        CLOCK_FREQ                      : integer := 125000000;                                                 -- freq of data_in_clk -- needed to timout cntr
45
                        ARP_TIMEOUT                     : integer := 60                                                                 -- ARP response timeout (s)
46
                        );
47
    Port (
48 2 pjf
                        -- IP Layer signals
49
                        ip_tx_start                             : in std_logic;
50
                        ip_tx                                           : in ipv4_tx_type;                                                              -- IP tx cxns
51
                        ip_tx_result                    : out std_logic_vector (1 downto 0);             -- tx status (changes during transmission)
52
                        ip_tx_data_out_ready    : out std_logic;                                                                        -- indicates IP TX is ready to take data
53
                        ip_rx_start                             : out std_logic;                                                                        -- indicates receipt of ip frame.
54
                        ip_rx                                           : out ipv4_rx_type;
55
                        -- system signals
56
                        rx_clk                                  : in  STD_LOGIC;
57
                        tx_clk                                  : in  STD_LOGIC;
58
                        reset                                   : in  STD_LOGIC;
59
                        our_ip_address          : in STD_LOGIC_VECTOR (31 downto 0);
60
                        our_mac_address                 : in std_logic_vector (47 downto 0);
61 8 pjf
                        control                                 : in ip_control_type;
62 2 pjf
                        -- status signals
63
                        arp_pkt_count                   : out STD_LOGIC_VECTOR(7 downto 0);                      -- count of arp pkts received
64
                        ip_pkt_count                    : out STD_LOGIC_VECTOR(7 downto 0);                      -- number of IP pkts received for us
65
                        -- MAC Transmitter
66
                        mac_tx_tdata         : out  std_logic_vector(7 downto 0);        -- data byte to tx
67
                        mac_tx_tvalid        : out  std_logic;                                                  -- tdata is valid
68
                        mac_tx_tready        : in std_logic;                                                    -- mac is ready to accept data
69 4 pjf
                        mac_tx_tfirst        : out  std_logic;                                                  -- indicates first byte of frame
70 2 pjf
                        mac_tx_tlast         : out  std_logic;                                                  -- indicates last byte of frame
71
                        -- MAC Receiver
72
                        mac_rx_tdata         : in std_logic_vector(7 downto 0);  -- data byte received
73
                        mac_rx_tvalid        : in std_logic;                                                    -- indicates tdata is valid
74
                        mac_rx_tready        : out  std_logic;                                                  -- tells mac that we are ready to take data
75
                        mac_rx_tlast         : in std_logic                                                             -- indicates last byte of the trame
76 8 pjf
                        );
77 2 pjf
    END COMPONENT;
78
 
79
 
80
   --Inputs
81
   signal ip_tx_start : std_logic := '0';
82
   signal ip_tx : ipv4_tx_type;
83
 
84
   signal clk : std_logic := '0';
85
   signal reset : std_logic := '0';
86
   signal our_ip_address : std_logic_vector(31 downto 0) := (others => '0');
87
   signal our_mac_address : std_logic_vector(47 downto 0) := (others => '0');
88
   signal mac_tx_tready : std_logic := '0';
89
   signal mac_rx_tdata : std_logic_vector(7 downto 0) := (others => '0');
90
   signal mac_rx_tvalid : std_logic := '0';
91
   signal mac_rx_tlast : std_logic := '0';
92 8 pjf
        signal control                  : ip_control_type;
93
 
94 2 pjf
        --Outputs
95
        signal ip_tx_result : std_logic_vector (1 downto 0);                                             -- tx status (changes during transmission)
96
        signal ip_tx_data_out_ready     :  std_logic;                                                                   -- indicates IP TX is ready to take data
97
   signal ip_rx_start : std_logic;
98
   signal ip_rx : ipv4_rx_type;
99
   signal arp_pkt_count : std_logic_vector(7 downto 0);
100
   signal mac_tx_tdata : std_logic_vector(7 downto 0);
101
   signal mac_tx_tvalid : std_logic;
102 4 pjf
   signal mac_tx_tfirst : std_logic;
103 2 pjf
   signal mac_tx_tlast : std_logic;
104
   signal mac_rx_tready : std_logic;
105
 
106
   -- Clock period definitions
107
   constant clk_period : time := 8 ns;
108
 
109
BEGIN
110
 
111
        -- Instantiate the Unit Under Test (UUT)
112
   uut: IP_complete_nomac PORT MAP (
113
          ip_tx_start => ip_tx_start,
114
          ip_tx => ip_tx,
115
          ip_tx_result => ip_tx_result,
116
          ip_tx_data_out_ready => ip_tx_data_out_ready,
117
          ip_rx_start => ip_rx_start,
118
          ip_rx => ip_rx,
119
          rx_clk => clk,
120
          tx_clk => clk,
121
          reset => reset,
122
          our_ip_address => our_ip_address,
123
          our_mac_address => our_mac_address,
124 8 pjf
                         control => control,
125 2 pjf
          arp_pkt_count => arp_pkt_count,
126
          mac_tx_tdata => mac_tx_tdata,
127
          mac_tx_tvalid => mac_tx_tvalid,
128
          mac_tx_tready => mac_tx_tready,
129 4 pjf
                         mac_tx_tfirst => mac_tx_tfirst,
130 2 pjf
          mac_tx_tlast => mac_tx_tlast,
131
          mac_rx_tdata => mac_rx_tdata,
132
          mac_rx_tvalid => mac_rx_tvalid,
133
          mac_rx_tready => mac_rx_tready,
134
          mac_rx_tlast => mac_rx_tlast
135
        );
136
 
137
   -- Clock process definitions
138
   clk_process :process
139
   begin
140
                clk <= '1';
141
                wait for clk_period/2;
142
                clk <= '0';
143
                wait for clk_period/2;
144
   end process;
145
 
146
 
147
   -- Stimulus process
148
   stim_proc: process
149
   begin
150
      -- hold reset state for 100 ns.
151
      wait for 80 ns;
152
 
153
                our_ip_address <= x"c0a80509";          -- 192.168.5.9
154
                our_mac_address <= x"002320212223";
155 8 pjf
                control.arp_controls.clear_cache <= '0';
156 2 pjf
                ip_tx_start <= '0';
157
      mac_tx_tready <= '0';
158
 
159
                reset <= '1';
160
      wait for clk_period*10;
161
                reset <= '0';
162
      wait for clk_period*5;
163
 
164
                -- check reset conditions
165
                assert ip_tx_result = IPTX_RESULT_NONE                  report "ip_tx_result not initialised correctly on reset";
166
                assert ip_tx_data_out_ready = '0'                report "ip_tx_data_out_ready not initialised correctly on reset";
167
                assert mac_tx_tvalid = '0'                                               report "mac_tx_tvalid not initialised correctly on reset";
168
                assert mac_tx_tlast = '0'                                                        report " mac_tx_tlast not initialised correctly on reset";
169
                assert arp_pkt_count = x"00"                                            report " arp_pkt_count not initialised correctly on reset";
170
                assert ip_rx_start = '0'                                                         report "ip_rx_start not initialised correctly on reset";
171
                assert ip_rx.hdr.is_valid = '0'                                  report "ip_rx.hdr.is_valid not initialised correctly on reset";
172
                assert ip_rx.hdr.protocol = x"00"                               report "ip_rx.hdr.protocol not initialised correctly on reset";
173
                assert ip_rx.hdr.data_length = x"0000"                  report "ip_rx.hdr.data_length not initialised correctly on reset";
174
                assert ip_rx.hdr.src_ip_addr = x"00000000"      report "ip_rx.hdr.src_ip_addr not initialised correctly on reset";
175
                assert ip_rx.hdr.num_frame_errors = x"00"               report "ip_rx.hdr.num_frame_errors not initialised correctly on reset";
176
                assert ip_rx.data.data_in = x"00"                               report "ip_rx.data.data_in not initialised correctly on reset";
177
                assert ip_rx.data.data_in_valid = '0'                    report "ip_rx.data.data_in_valid not initialised correctly on reset";
178
                assert ip_rx.data.data_in_last = '0'                     report "ip_rx.data.data_in_last not initialised correctly on reset";
179
 
180
      -- insert stimulus here 
181
 
182
                ------------
183
                -- TEST 1 -- basic functional rx test with received ip pkt
184
                ------------
185
 
186
                report "T1: Send an eth frame with IP pkt dst ip_address c0a80509, dst mac 002320212223";
187
 
188
      mac_tx_tready <= '1';
189
                mac_rx_tvalid <= '1';
190
                -- dst MAC (bc)
191
                mac_rx_tdata <= x"00"; wait for clk_period;
192
                mac_rx_tdata <= x"23"; wait for clk_period;
193
                mac_rx_tdata <= x"20"; wait for clk_period;
194
                mac_rx_tdata <= x"21"; wait for clk_period;
195
                mac_rx_tdata <= x"22"; wait for clk_period;
196
                mac_rx_tdata <= x"23"; wait for clk_period;
197
                -- src MAC
198
                mac_rx_tdata <= x"00"; wait for clk_period;
199
                mac_rx_tdata <= x"23"; wait for clk_period;
200
                mac_rx_tdata <= x"18"; wait for clk_period;
201
                mac_rx_tdata <= x"29"; wait for clk_period;
202
                mac_rx_tdata <= x"26"; wait for clk_period;
203
                mac_rx_tdata <= x"7c"; wait for clk_period;
204
                -- type
205
                mac_rx_tdata <= x"08"; wait for clk_period;             -- IP pkt
206
                mac_rx_tdata <= x"00"; wait for clk_period;
207
                -- ver & HL / service type
208
                mac_rx_tdata <= x"45"; wait for clk_period;
209
                mac_rx_tdata <= x"00"; wait for clk_period;
210
                -- total len
211
                mac_rx_tdata <= x"00"; wait for clk_period;
212
                mac_rx_tdata <= x"18"; wait for clk_period;
213
                -- ID
214
                mac_rx_tdata <= x"00"; wait for clk_period;
215
                mac_rx_tdata <= x"00"; wait for clk_period;
216
                -- flags & frag
217
                mac_rx_tdata <= x"00"; wait for clk_period;
218
                mac_rx_tdata <= x"00"; wait for clk_period;
219
                -- TTL
220
                mac_rx_tdata <= x"00"; wait for clk_period;
221
                -- Protocol
222
                mac_rx_tdata <= x"11"; wait for clk_period;
223
                -- Header CKS
224
                mac_rx_tdata <= x"00"; wait for clk_period;
225
                mac_rx_tdata <= x"00"; wait for clk_period;
226
                -- SRC IP
227
                mac_rx_tdata <= x"c0"; wait for clk_period;
228
                mac_rx_tdata <= x"a8"; wait for clk_period;
229
                mac_rx_tdata <= x"05"; wait for clk_period;
230
                mac_rx_tdata <= x"01"; wait for clk_period;
231
                -- DST IP
232
                mac_rx_tdata <= x"c0"; wait for clk_period;
233
                mac_rx_tdata <= x"a8"; wait for clk_period;
234
                mac_rx_tdata <= x"05"; wait for clk_period;
235
                mac_rx_tdata <= x"09"; wait for clk_period;
236
 
237
                -- user data
238
                mac_rx_tdata <= x"24"; wait for clk_period;
239
 
240
                -- since we are up to the user data stage, the header should be valid and the data_in_valid should be set
241
                assert ip_rx.hdr.is_valid = '1'                                 report "T1: ip_rx.hdr.is_valid not set";
242
                assert ip_rx.hdr.protocol = x"11"                               report "T1: ip_rx.hdr.protocol not set correctly";
243
                assert ip_rx.hdr.data_length = x"0004"                  report "T1: ip_rx.hdr.data_length not set correctly";
244
                assert ip_rx.hdr.src_ip_addr = x"c0a80501"      report "T1: ip_rx.hdr.src_ip_addr not set correctly";
245
                assert ip_rx.hdr.num_frame_errors = x"00"               report "T1: ip_rx.hdr.num_frame_errors not set correctly";
246
                assert ip_rx.hdr.last_error_code = x"0"          report "T1: ip_rx.hdr.last_error_code not set correctly";
247
                assert ip_rx_start = '1'                                                        report "T1: ip_rx_start not set";
248
                assert ip_rx.data.data_in_valid = '1'                   report "T1: ip_rx.data.data_in_valid not set";
249
 
250
                mac_rx_tdata <= x"25"; wait for clk_period;
251
                mac_rx_tdata <= x"26"; wait for clk_period;
252
                mac_rx_tdata <= x"27"; mac_rx_tlast <= '1'; wait for clk_period;
253
 
254
                assert ip_rx.data.data_in_last = '1'                    report "T1: ip_rx.data.data_in_last not set";
255
 
256
 
257
                mac_rx_tdata <= x"00";
258
                mac_rx_tlast <= '0';
259
                mac_rx_tvalid <= '0';
260
                wait for clk_period;
261
 
262
                assert ip_rx.data.data_in_valid = '0'                    report "T1: ip_rx.data.data_in_valid not cleared";
263
                assert ip_rx.data.data_in_last = '0'                     report "T1: ip_rx.data.data_in_last not cleared";
264
                assert ip_rx.hdr.num_frame_errors = x"00"               report "T1: ip_rx.hdr.num_frame_errors non zero at end of test";
265
                assert ip_rx.hdr.last_error_code = x"0"          report "T1: ip_rx.hdr.last_error_code indicates error at end of test";
266
                assert ip_rx_start = '0'                                                 report "T1: ip_rx_start not cleared";
267
 
268
                ------------
269
                -- TEST 2 -- respond with IP TX
270
                ------------
271
 
272
                report "T2: respond with IP TX";
273
 
274
                ip_tx.hdr.protocol <= x"35";
275
                ip_tx.hdr.data_length <= x"0006";
276
                ip_tx.hdr.dst_ip_addr <= x"c0123478";
277
                ip_tx.data.data_out_valid <= '0';
278
                ip_tx.data.data_out_last <= '0';
279
                wait for clk_period;
280
 
281
                ip_tx_start <= '1'; wait for clk_period;
282
 
283
                ip_tx_start <= '0'; wait for clk_period;
284
 
285
                assert ip_tx_result = IPTX_RESULT_SENDING               report "T1: result should be IPTX_RESULT_SENDING";
286
 
287
                wait for clk_period*2;
288
 
289
                assert ip_tx_data_out_ready = '0'                        report "T2: IP data out ready asserted too early";
290
 
291
                -- need to wait for ARP tx to complete
292
 
293
                wait for clk_period*50;
294
 
295
                assert mac_tx_tvalid = '0'                                               report "T2: mac_tx_tvalid not cleared after ARP tx";
296
                assert mac_tx_tlast = '0'                                                        report "T2: mac_tx_tlast not cleared after ARP tx";
297
 
298
                -- now create the ARP response (rx)
299
 
300
                -- Send the reply
301
                -- Send an ARP reply: x"c0123478" has mac 02:12:03:23:04:54
302
                mac_rx_tvalid <= '1';
303
                -- dst MAC (bc)
304
                mac_rx_tdata <= x"ff"; wait for clk_period;
305
                mac_rx_tdata <= x"ff"; wait for clk_period;
306
                mac_rx_tdata <= x"ff"; wait for clk_period;
307
                mac_rx_tdata <= x"ff"; wait for clk_period;
308
                mac_rx_tdata <= x"ff"; wait for clk_period;
309
                mac_rx_tdata <= x"ff"; wait for clk_period;
310
                -- src MAC
311
                mac_rx_tdata <= x"02"; wait for clk_period;
312
                mac_rx_tdata <= x"12"; wait for clk_period;
313
                mac_rx_tdata <= x"03"; wait for clk_period;
314
                mac_rx_tdata <= x"23"; wait for clk_period;
315
                mac_rx_tdata <= x"04"; wait for clk_period;
316
                mac_rx_tdata <= x"54"; wait for clk_period;
317
                -- type
318
                mac_rx_tdata <= x"08"; wait for clk_period;
319
                mac_rx_tdata <= x"06"; wait for clk_period;
320
                -- HW type
321
                mac_rx_tdata <= x"00"; wait for clk_period;
322
                mac_rx_tdata <= x"01"; wait for clk_period;
323
                -- Protocol type
324
                mac_rx_tdata <= x"08"; wait for clk_period;
325
                mac_rx_tdata <= x"00"; wait for clk_period;
326
                -- HW size
327
                mac_rx_tdata <= x"06"; wait for clk_period;
328
                -- protocol size
329
                mac_rx_tdata <= x"04"; wait for clk_period;
330
                -- Opcode
331
                mac_rx_tdata <= x"00"; wait for clk_period;
332
                mac_rx_tdata <= x"02"; wait for clk_period;
333
                -- Sender MAC
334
                mac_rx_tdata <= x"02"; wait for clk_period;
335
                mac_rx_tdata <= x"12"; wait for clk_period;
336
                mac_rx_tdata <= x"03"; wait for clk_period;
337
                mac_rx_tdata <= x"23"; wait for clk_period;
338
                mac_rx_tdata <= x"04"; wait for clk_period;
339
                mac_rx_tdata <= x"54"; wait for clk_period;
340
                -- Sender IP
341
                mac_rx_tdata <= x"c0"; wait for clk_period;
342
                mac_rx_tdata <= x"12"; wait for clk_period;
343
                mac_rx_tdata <= x"34"; wait for clk_period;
344
                mac_rx_tdata <= x"78"; wait for clk_period;
345
                -- Target MAC
346
                mac_rx_tdata <= x"00"; wait for clk_period;
347
                mac_rx_tdata <= x"23"; wait for clk_period;
348
                mac_rx_tdata <= x"20"; wait for clk_period;
349
                mac_rx_tdata <= x"21"; wait for clk_period;
350
                mac_rx_tdata <= x"22"; wait for clk_period;
351
                mac_rx_tdata <= x"23"; wait for clk_period;
352
                -- Target IP
353
                mac_rx_tdata <= x"c0"; wait for clk_period;
354
                mac_rx_tdata <= x"a8"; wait for clk_period;
355
                mac_rx_tdata <= x"05"; wait for clk_period;
356
                mac_rx_tdata <= x"09"; wait for clk_period;
357
                mac_rx_tdata <= x"00"; wait for clk_period;
358
                mac_rx_tdata <= x"00"; wait for clk_period;
359
                mac_rx_tdata <= x"00"; wait for clk_period;
360
                mac_rx_tlast <= '1';
361
                mac_rx_tdata <= x"00"; wait for clk_period;
362
                mac_rx_tlast <= '0';
363
                mac_rx_tvalid <= '0';
364
 
365
                wait until ip_tx_data_out_ready = '1';
366
 
367
                -- start to tx IP data
368
                ip_tx.data.data_out_valid <= '1';
369
                ip_tx.data.data_out <= x"56"; wait for clk_period;
370
                ip_tx.data.data_out <= x"57"; wait for clk_period;
371
                ip_tx.data.data_out <= x"58"; wait for clk_period;
372
                ip_tx.data.data_out <= x"59"; wait for clk_period;
373
                ip_tx.data.data_out <= x"5a"; wait for clk_period;
374
 
375
                ip_tx.data.data_out <= x"5b";
376
                ip_tx.data.data_out_last <= '1';
377
                wait for clk_period;
378
 
379
                assert mac_tx_tlast = '1'                       report "T1: mac_tx_tlast not set on last byte";
380
 
381
                wait for clk_period;
382
 
383
                ip_tx.data.data_out_valid <= '0';
384
                ip_tx.data.data_out_last <= '0';
385
                wait for clk_period*2;
386
 
387
                assert ip_tx_result = IPTX_RESULT_SENT  report "T1: result should be SENT";
388
                wait for clk_period*2;
389
 
390
 
391
                report "-- end of tests --";
392
 
393
      wait;
394
   end process;
395
 
396
END;

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