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[/] [udp_ip_stack/] [trunk/] [bench/] [vhdl/] [UDP_RX_tb.vhd] - Blame information for rev 6

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1 2 pjf
--------------------------------------------------------------------------------
2
-- Company: 
3
-- Engineer:
4
--
5
-- Create Date:   16:53:03 06/10/2011
6
-- Design Name:   
7
-- Module Name:   C:/Users/pjf/Documents/projects/fpga/xilinx/Network/ip1/UDP_RX_tb.vhd
8
-- Project Name:  ip1
9
-- Target Device:  
10
-- Tool versions:  
11
-- Description:   
12
-- 
13
-- VHDL Test Bench Created by ISE for module: UDP_RX
14
-- 
15
-- Dependencies:
16
-- 
17
-- Revision:
18
-- Revision 0.01 - File Created
19
-- Additional Comments:
20
--
21
-- Notes: 
22
-- This testbench has been automatically generated using types std_logic and
23
-- std_logic_vector for the ports of the unit under test.  Xilinx recommends
24
-- that these types always be used for the top-level I/O of a design in order
25
-- to guarantee that the testbench will bind correctly to the post-implementation 
26
-- simulation model.
27
--------------------------------------------------------------------------------
28
library IEEE;
29
use IEEE.STD_LOGIC_1164.ALL;
30
use IEEE.NUMERIC_STD.ALL;
31
use work.axi.all;
32
use work.ipv4_types.all;
33
 
34
ENTITY UDP_RX_tb IS
35
END UDP_RX_tb;
36
 
37
ARCHITECTURE behavior OF UDP_RX_tb IS
38
 
39
    -- Component Declaration for the Unit Under Test (UUT)
40
 
41
    COMPONENT UDP_RX
42
    PORT(
43
                        -- UDP Layer signals
44
                        udp_rxo                                 : inout udp_rx_type;
45
                        udp_rx_start                    : out std_logic;                                                        -- indicates receipt of udp header
46
                        -- system signals
47
                        clk                                             : in  STD_LOGIC;
48
                        reset                                   : in  STD_LOGIC;
49
                        -- IP layer RX signals
50
                        ip_rx_start                             : in std_logic;                                                         -- indicates receipt of ip header
51
                        ip_rx                                           : inout ipv4_rx_type
52
        );
53
    END COMPONENT;
54
 
55
 
56
   --Inputs
57
   signal clk : std_logic := '0';
58
   signal reset : std_logic := '0';
59
   signal ip_rx_start : std_logic := '0';
60
 
61
        --BiDirs
62
   signal udp_rxo : udp_rx_type;
63
   signal ip_rx : ipv4_rx_type;
64
 
65
        --Outputs
66
   signal udp_rx_start : std_logic;
67
 
68
   -- Clock period definitions
69
   constant clk_period : time := 8 ns;
70
 
71
BEGIN
72
 
73
        -- Instantiate the Unit Under Test (UUT)
74
   uut: UDP_RX PORT MAP (
75
          udp_rxo => udp_rxo,
76
          udp_rx_start => udp_rx_start,
77
          clk => clk,
78
          reset => reset,
79
          ip_rx_start => ip_rx_start,
80
          ip_rx => ip_rx
81
        );
82
 
83
   -- Clock process definitions
84
   clk_process :process
85
   begin
86
                clk <= '0';
87
                wait for clk_period/2;
88
                clk <= '1';
89
                wait for clk_period/2;
90
   end process;
91
 
92
 
93
   -- Stimulus process
94
   stim_proc: process
95
   begin
96
      -- hold reset state for 100 ns.
97
      wait for 100 ns;
98
                ip_rx_start <= '0';
99
                ip_rx.data.data_in_valid <= '0';
100
      ip_rx.data.data_in_last <= '0';
101
                ip_rx.hdr.is_valid <= '0';
102
                ip_rx.hdr.protocol <= (others => '0');
103
                ip_rx.hdr.num_frame_errors <= (others => '0');
104
                ip_rx.hdr.last_error_code <= (others => '0');
105 6 pjf
                ip_rx.hdr.is_broadcast <= '0';
106 2 pjf
 
107
                reset <= '1';
108
      wait for clk_period*10;
109
                reset <= '0';
110
      wait for clk_period*5;
111
                reset <= '0';
112
 
113
                -- check reset conditions
114
                assert udp_rx_start = '0'                                                        report "udp_rx_start not initialised correctly on reset";
115
                assert udp_rxo.hdr.is_valid = '0'                                        report "udp_rxo.hdr.is_valid not initialised correctly on reset";
116
                assert udp_rxo.data.data_in = x"00"                             report "udp_rxo.data.data_in not initialised correctly on reset";
117
                assert udp_rxo.data.data_in_valid = '0'                  report "udp_rxo.data.data_in_valid not initialised correctly on reset";
118
                assert udp_rxo.data.data_in_last = '0'                   report "udp_rxo.data.data_in_last not initialised correctly on reset";
119
 
120
      -- insert stimulus here 
121
 
122
                ------------
123
                -- TEST 1 -- basic functional rx test with received ip pkt
124
                ------------
125
 
126
                report "T1: Send an ip frame with IP src ip_address c0a80501, udp protocol from port x1498 to port x8724 and 3 bytes data";
127
 
128
                ip_rx_start <= '1';
129
                ip_rx.data.data_in_valid <= '0';
130
      ip_rx.data.data_in_last <= '0';
131
                ip_rx.hdr.is_valid <= '1';
132
                ip_rx.hdr.protocol <= x"11";    -- UDP
133
                ip_rx.hdr.data_length <= x"000b";
134
                ip_rx.hdr.src_ip_addr<= x"c0a80501";
135
                wait for clk_period*3;
136
                -- now send the data
137
                ip_rx.data.data_in_valid <= '1';
138
                ip_rx.data.data_in <= x"14"; wait for clk_period;       -- src port
139
                ip_rx.data.data_in <= x"98"; wait for clk_period;
140
                ip_rx.data.data_in <= x"87"; wait for clk_period;       -- dst port
141
                ip_rx.data.data_in <= x"24"; wait for clk_period;
142
                ip_rx.data.data_in <= x"00"; wait for clk_period;       -- len (hdr + data)
143
                ip_rx.data.data_in <= x"0b"; wait for clk_period;
144
                ip_rx.data.data_in <= x"00"; wait for clk_period;       -- mty cks
145
                ip_rx.data.data_in <= x"00"; wait for clk_period;
146
                -- udp hdr should be valid
147
                assert udp_rxo.hdr.is_valid = '1'                                       report "T1: udp_rxo.hdr.is_valid not set";
148
 
149
                ip_rx.data.data_in <= x"41"; wait for clk_period;       -- data
150
 
151
                assert udp_rxo.hdr.src_ip_addr = x"c0a80501"    report "T1: udp_rxo.hdr.src_ip_addr not set correctly";
152
                assert udp_rxo.hdr.src_port = x"1498"                   report "T1: udp_rxo.hdr.src_port not set correctly";
153
                assert udp_rxo.hdr.dst_port = x"8724"                   report "T1: udp_rxo.hdr.dst_port not set correctly";
154
                assert udp_rxo.hdr.data_length = x"0003"                report "T1: udp_rxo.hdr.data_length not set correctly";
155
                assert udp_rx_start = '1'                                                       report "T1: udp_rx_start not set";
156
                assert udp_rxo.data.data_in_valid = '1'         report "T1: udp_rxo.data.data_in_valid not set";
157
 
158
                ip_rx.data.data_in <= x"45"; wait for clk_period;       -- data
159
                ip_rx.data.data_in <= x"49"; ip_rx.data.data_in_last <= '1'; wait for clk_period;
160
                assert udp_rxo.data.data_in_last = '1'                  report "T1: udp_rxo.data.data_in_last not set";
161
                ip_rx_start <= '0';
162
                ip_rx.data.data_in_valid <= '0';
163
      ip_rx.data.data_in_last <= '0';
164
                ip_rx.hdr.is_valid <= '0';
165
                wait for clk_period;
166
                assert udp_rxo.data.data_in = x"00"                             report "T1: udp_rxo.data.data_in not cleared";
167
                assert udp_rxo.data.data_in_valid = '0'                  report "T1: udp_rxo.data.data_in_valid not cleared";
168
                assert udp_rxo.data.data_in_last = '0'                   report "T1: udp_rxo.data.data_in_last not cleared";
169
 
170
                wait for clk_period;
171
 
172
                ------------
173
                -- TEST 2 -- ability to receive 2nd ip pkt
174
                ------------
175
 
176
                report "T2: Send an ip frame with IP src ip_address c0a80501, udp protocol from port x7623 to port x0365 and 5 bytes data";
177
 
178
                ip_rx_start <= '1';
179
                ip_rx.data.data_in_valid <= '0';
180
      ip_rx.data.data_in_last <= '0';
181
                ip_rx.hdr.is_valid <= '1';
182
                ip_rx.hdr.protocol <= x"11";    -- UDP
183
                ip_rx.hdr.data_length <= x"000b";
184
                ip_rx.hdr.src_ip_addr<= x"c0a80501";
185
                wait for clk_period*3;
186
                -- now send the data
187
                ip_rx.data.data_in_valid <= '1';
188
                ip_rx.data.data_in <= x"76"; wait for clk_period;       -- src port
189
                ip_rx.data.data_in <= x"23"; wait for clk_period;
190
                ip_rx.data.data_in <= x"03"; wait for clk_period;       -- dst port
191
                ip_rx.data.data_in <= x"65"; wait for clk_period;
192
                ip_rx.data.data_in <= x"00"; wait for clk_period;       -- len (hdr + data)
193
                ip_rx.data.data_in <= x"0d"; wait for clk_period;
194
                ip_rx.data.data_in <= x"00"; wait for clk_period;       -- mty cks
195
                ip_rx.data.data_in <= x"00"; wait for clk_period;
196
                -- udp hdr should be valid
197
                assert udp_rxo.hdr.is_valid = '1'                                       report "T2: udp_rxo.hdr.is_valid not set";
198
 
199
                ip_rx.data.data_in <= x"17"; wait for clk_period;       -- data
200
 
201
                assert udp_rxo.hdr.src_ip_addr = x"c0a80501"    report "T2: udp_rxo.hdr.src_ip_addr not set correctly";
202
                assert udp_rxo.hdr.src_port = x"7623"                   report "T2: udp_rxo.hdr.src_port not set correctly";
203
                assert udp_rxo.hdr.dst_port = x"0365"                   report "T2: udp_rxo.hdr.dst_port not set correctly";
204
                assert udp_rxo.hdr.data_length = x"0005"                report "T2: udp_rxo.hdr.data_length not set correctly";
205
                assert udp_rx_start = '1'                                                       report "T2: udp_rx_start not set";
206
                assert udp_rxo.data.data_in_valid = '1'         report "T2: udp_rxo.data.data_in_valid not set";
207
 
208
                ip_rx.data.data_in <= x"37"; wait for clk_period;       -- data
209
                ip_rx.data.data_in <= x"57"; wait for clk_period;       -- data
210
                ip_rx.data.data_in <= x"73"; wait for clk_period;       -- data
211
                ip_rx.data.data_in <= x"f9"; ip_rx.data.data_in_last <= '1'; wait for clk_period;
212
                assert udp_rxo.data.data_in_last = '1'                  report "T2: udp_rxo.data.data_in_last not set";
213
                ip_rx_start <= '0';
214
                ip_rx.data.data_in_valid <= '0';
215
      ip_rx.data.data_in_last <= '0';
216
                ip_rx.hdr.is_valid <= '0';
217
                wait for clk_period;
218
                assert udp_rxo.data.data_in = x"00"                             report "T2: udp_rxo.data.data_in not cleared";
219
                assert udp_rxo.data.data_in_valid = '0'                  report "T2: udp_rxo.data.data_in_valid not cleared";
220
                assert udp_rxo.data.data_in_last = '0'                   report "T2: udp_rxo.data.data_in_last not cleared";
221
 
222
                ------------
223
                -- TEST 3 -- ability to reject non-udp protocols
224
                ------------
225
 
226
                report "T3: Send an ip frame with IP src ip_address c0a80501, protocol x12 from port x7623 to port x0365 and 5 bytes data";
227
 
228
                ip_rx_start <= '1';
229
                ip_rx.data.data_in_valid <= '0';
230
      ip_rx.data.data_in_last <= '0';
231
                ip_rx.hdr.is_valid <= '1';
232
                ip_rx.hdr.protocol <= x"12";    -- non-UDP
233
                ip_rx.hdr.data_length <= x"000b";
234
                ip_rx.hdr.src_ip_addr<= x"c0a80501";
235
                wait for clk_period*3;
236
                -- now send the data
237
                ip_rx.data.data_in_valid <= '1';
238
                ip_rx.data.data_in <= x"76"; wait for clk_period;       -- src port
239
                ip_rx.data.data_in <= x"23"; wait for clk_period;
240
                ip_rx.data.data_in <= x"03"; wait for clk_period;       -- dst port
241
                ip_rx.data.data_in <= x"65"; wait for clk_period;
242
                ip_rx.data.data_in <= x"00"; wait for clk_period;       -- len (hdr + data)
243
                ip_rx.data.data_in <= x"0d"; wait for clk_period;
244
                ip_rx.data.data_in <= x"00"; wait for clk_period;       -- mty cks
245
                ip_rx.data.data_in <= x"00"; wait for clk_period;
246
                -- udp hdr should be valid
247
                assert udp_rxo.hdr.is_valid = '0'                                        report "T3: udp_rxo.hdr.is_valid incorrectly set";
248
 
249
                ip_rx.data.data_in <= x"17"; wait for clk_period;       -- data
250
 
251
                assert udp_rx_start = '0'                                                        report "T3: udp_rx_start incorrectly set";
252
                assert udp_rxo.data.data_in_valid = '0'          report "T3: udp_rxo.data.data_in_valid not set";
253
 
254
                ip_rx.data.data_in <= x"37"; wait for clk_period;       -- data
255
                ip_rx.data.data_in <= x"57"; wait for clk_period;       -- data
256
                ip_rx.data.data_in <= x"73"; wait for clk_period;       -- data
257
                ip_rx.data.data_in <= x"f9"; ip_rx.data.data_in_last <= '1'; wait for clk_period;
258
                assert udp_rxo.data.data_in_last = '0'                   report "T3: udp_rxo.data.data_in_last incorrectly set";
259
                ip_rx_start <= '0';
260
                ip_rx.data.data_in_valid <= '0';
261
      ip_rx.data.data_in_last <= '0';
262
                ip_rx.hdr.is_valid <= '0';
263
                wait for clk_period;
264
                assert udp_rxo.data.data_in = x"00"                             report "T3: udp_rxo.data.data_in not cleared";
265
                assert udp_rxo.data.data_in_valid = '0'                  report "T3: udp_rxo.data.data_in_valid not cleared";
266
                assert udp_rxo.data.data_in_last = '0'                   report "T3: udp_rxo.data.data_in_last not cleared";
267
 
268
                wait for clk_period;
269
 
270
                ------------
271
                -- TEST 4 -- Ability to receive UDP pkt after non-UDP pkt
272
                ------------
273
 
274
                report "T4: Send an ip frame with IP src ip_address c0a80501, udp protocol from port x1498 to port x8724 and 3 bytes data";
275
 
276
                ip_rx_start <= '1';
277
                ip_rx.data.data_in_valid <= '0';
278
      ip_rx.data.data_in_last <= '0';
279
                ip_rx.hdr.is_valid <= '1';
280
                ip_rx.hdr.protocol <= x"11";    -- UDP
281
                ip_rx.hdr.data_length <= x"000b";
282
                ip_rx.hdr.src_ip_addr<= x"c0a80501";
283
                wait for clk_period*3;
284
                -- now send the data
285
                ip_rx.data.data_in_valid <= '1';
286
                ip_rx.data.data_in <= x"14"; wait for clk_period;       -- src port
287
                ip_rx.data.data_in <= x"98"; wait for clk_period;
288
                ip_rx.data.data_in <= x"87"; wait for clk_period;       -- dst port
289
                ip_rx.data.data_in <= x"24"; wait for clk_period;
290
                ip_rx.data.data_in <= x"00"; wait for clk_period;       -- len (hdr + data)
291
                ip_rx.data.data_in <= x"0b"; wait for clk_period;
292
                ip_rx.data.data_in <= x"00"; wait for clk_period;       -- mty cks
293
                ip_rx.data.data_in <= x"00"; wait for clk_period;
294
                -- udp hdr should be valid
295
                assert udp_rxo.hdr.is_valid = '1'                                       report "T4: udp_rxo.hdr.is_valid not set";
296
 
297
                ip_rx.data.data_in <= x"41"; wait for clk_period;       -- data
298
 
299
                assert udp_rxo.hdr.src_ip_addr = x"c0a80501"    report "T4: udp_rxo.hdr.src_ip_addr not set correctly";
300
                assert udp_rxo.hdr.src_port = x"1498"                   report "T4: udp_rxo.hdr.src_port not set correctly";
301
                assert udp_rxo.hdr.dst_port = x"8724"                   report "T4: udp_rxo.hdr.dst_port not set correctly";
302
                assert udp_rxo.hdr.data_length = x"0003"                report "T4: udp_rxo.hdr.data_length not set correctly";
303
                assert udp_rx_start = '1'                                                       report "T4: udp_rx_start not set";
304
                assert udp_rxo.data.data_in_valid = '1'         report "T4: udp_rxo.data.data_in_valid not set";
305
 
306
                ip_rx.data.data_in <= x"45"; wait for clk_period;       -- data
307
                ip_rx.data.data_in <= x"49"; ip_rx.data.data_in_last <= '1'; wait for clk_period;
308
                assert udp_rxo.data.data_in_last = '1'                  report "T4: udp_rxo.data.data_in_last not set";
309
                ip_rx_start <= '0';
310
                ip_rx.data.data_in_valid <= '0';
311
      ip_rx.data.data_in_last <= '0';
312
                ip_rx.hdr.is_valid <= '0';
313
                wait for clk_period;
314
                assert udp_rxo.data.data_in = x"00"                             report "T4: udp_rxo.data.data_in not cleared";
315
                assert udp_rxo.data.data_in_valid = '0'                  report "T4: udp_rxo.data.data_in_valid not cleared";
316
                assert udp_rxo.data.data_in_last = '0'                   report "T4: udp_rxo.data.data_in_last not cleared";
317
 
318
                wait for clk_period;
319
 
320
                report "--- end of tests ---";
321
 
322
                wait;
323
        end process;
324
 
325
END;

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