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[/] [udp_ip_stack/] [trunk/] [rtl/] [vhdl/] [UDP_TX.vhd] - Blame information for rev 8

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1 2 pjf
----------------------------------------------------------------------------------
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-- Company: 
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-- Engineer:            Peter Fall
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-- 
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-- Create Date:    5 June 2011 
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-- Design Name: 
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-- Module Name:    UDP_TX - Behavioral 
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-- Project Name: 
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-- Target Devices: 
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-- Tool versions: 
11
-- Description: 
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--              handle simple UDP TX
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--              doesnt generate the checksum(supposedly optional)
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-- Dependencies: 
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--
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-- Revision: 
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-- Revision 0.01 - File Created
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-- Additional Comments: 
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--
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----------------------------------------------------------------------------------
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.NUMERIC_STD.ALL;
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use work.axi.all;
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use work.ipv4_types.all;
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entity UDP_TX is
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    Port (
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                        -- UDP Layer signals
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                        udp_tx_start                    : in std_logic;                                                 -- indicates req to tx UDP
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                        udp_txi                                 : in udp_tx_type;                                                       -- UDP tx cxns
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                        udp_tx_result                   : out std_logic_vector (1 downto 0);-- tx status (changes during transmission)
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                        udp_tx_data_out_ready: out std_logic;                                                   -- indicates udp_tx is ready to take data
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                        -- system signals
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                        clk                                             : in  STD_LOGIC;                                                        -- same clock used to clock mac data and ip data
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                        reset                                   : in  STD_LOGIC;
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                        -- IP layer TX signals
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                        ip_tx_start                             : out std_logic;
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                        ip_tx                                           : out ipv4_tx_type;                                                     -- IP tx cxns
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                        ip_tx_result                    : in std_logic_vector (1 downto 0);              -- tx status (changes during transmission)
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                        ip_tx_data_out_ready    : in std_logic                                                                  -- indicates IP TX is ready to take data
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                        );
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end UDP_TX;
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architecture Behavioral of UDP_TX is
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        type tx_state_type is (IDLE,    PAUSE, SEND_UDP_HDR, SEND_USER_DATA);
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        type count_mode_type is (RST, INCR, HOLD);
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        type settable_cnt_type is (RST, SET, INCR, HOLD);
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        type set_clr_type is (SET, CLR, HOLD);
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        -- TX state variables
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        signal udp_tx_state             : tx_state_type;
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        signal tx_count                         : unsigned (15 downto 0);
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        signal tx_result_reg            : std_logic_vector (1 downto 0);
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        signal ip_tx_start_reg  : std_logic;
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        signal data_out_ready_reg       : std_logic;
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        -- tx control signals
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        signal next_tx_state    : tx_state_type;
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        signal set_tx_state             : std_logic;
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        signal next_tx_result   : std_logic_vector (1 downto 0);
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        signal set_tx_result            : std_logic;
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        signal tx_count_val             : unsigned (15 downto 0);
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        signal tx_count_mode            : settable_cnt_type;
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        signal tx_data                          : std_logic_vector (7 downto 0);
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        signal set_last                 : std_logic;
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        signal set_ip_tx_start  : set_clr_type;
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        signal tx_data_valid            : std_logic;                    -- indicates whether data is valid to tx or not
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71
        -- tx temp signals
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        signal total_length             : std_logic_vector (15 downto 0);        -- computed combinatorially from header size
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74
 
75
-- IP datagram header format
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--
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--      0          4          8                      16      19             24                    31
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--      --------------------------------------------------------------------------------------------
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--      |              source port number            |              dest port number               |
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--      |                                            |                                             |
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--      --------------------------------------------------------------------------------------------
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--      |                length (bytes)              |                checksum                     |
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--      |          (header and data combined)        |                                             |
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--      --------------------------------------------------------------------------------------------
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--      |                                          Data                                            |
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--      |                                                                                          |
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--      --------------------------------------------------------------------------------------------
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--      |                                          ....                                            |
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--      |                                                                                          |
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--      --------------------------------------------------------------------------------------------
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92
begin
93
        -----------------------------------------------------------------------
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        -- combinatorial process to implement FSM and determine control signals
95
        -----------------------------------------------------------------------
96
 
97
        tx_combinatorial : process(
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                -- input signals
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                udp_tx_start, udp_txi, clk, ip_tx_result, ip_tx_data_out_ready,
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                -- state variables
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                udp_tx_state, tx_count, tx_result_reg, ip_tx_start_reg, data_out_ready_reg,
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                -- control signals
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                next_tx_state, set_tx_state, next_tx_result, set_tx_result, tx_count_mode, tx_count_val,
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                tx_data, set_last, total_length, set_ip_tx_start, tx_data_valid
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                )
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107
        begin
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                -- set output followers
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                ip_tx_start <= ip_tx_start_reg;
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                ip_tx.hdr.protocol <= x"11";    -- UDP protocol
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                ip_tx.hdr.data_length <= total_length;
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                ip_tx.hdr.dst_ip_addr <= udp_txi.hdr.dst_ip_addr;
113 8 pjf
                if udp_tx_start = '1' and ip_tx_start_reg = '0' then
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                        udp_tx_result <= UDPTX_RESULT_NONE;             -- kill the result until have started the IP layer
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                else
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                        udp_tx_result <= tx_result_reg;
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                end if;
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119 2 pjf
                case udp_tx_state is
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                        when SEND_USER_DATA =>
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                                ip_tx.data.data_out <= udp_txi.data.data_out;
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                                tx_data_valid <= udp_txi.data.data_out_valid;
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                                ip_tx.data.data_out_last <= udp_txi.data.data_out_last;
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125
                        when SEND_UDP_HDR =>
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                                ip_tx.data.data_out <= tx_data;
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                                tx_data_valid <= ip_tx_data_out_ready;
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                                ip_tx.data.data_out_last <= set_last;
129
 
130
                        when others =>
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                                ip_tx.data.data_out <= (others => '0');
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                                tx_data_valid <= '0';
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                                ip_tx.data.data_out_last <= set_last;
134
                end case;
135
 
136
                ip_tx.data.data_out_valid <= tx_data_valid and ip_tx_data_out_ready;
137
 
138
                -- set signal defaults
139
                next_tx_state <= IDLE;
140
                set_tx_state <= '0';
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                tx_count_mode <= HOLD;
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                tx_data <= x"00";
143
                set_last <= '0';
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                next_tx_result <= UDPTX_RESULT_NONE;
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                set_tx_result <= '0';
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                set_ip_tx_start <= HOLD;
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                tx_count_val <= (others => '0');
148 8 pjf
                udp_tx_data_out_ready <= '0';
149 2 pjf
 
150
                -- set temp signals
151
                total_length <= std_logic_vector(unsigned(udp_txi.hdr.data_length) + 8);                -- total length = user data length + header length (bytes)
152
 
153
                -- TX FSM
154
                case udp_tx_state is
155
                        when IDLE =>
156
                                udp_tx_data_out_ready <= '0';            -- in this state, we are unable to accept user data for tx
157
                                tx_count_mode <= RST;
158
                                if udp_tx_start = '1' then
159
                                        -- check header count for error if too high
160
                                        if unsigned(udp_txi.hdr.data_length) > 1472 then
161
                                                next_tx_result <= UDPTX_RESULT_ERR;
162
                                                set_tx_result <= '1';
163
                                        else
164
                                                -- start to send UDP header
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                                                tx_count_mode <= RST;
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                                                next_tx_result <= UDPTX_RESULT_SENDING;
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                                                set_ip_tx_start <= SET;
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                                                set_tx_result <= '1';
169 8 pjf
                                                next_tx_state <= PAUSE;
170 2 pjf
                                                set_tx_state <= '1';
171
                                        end if;
172
                                end if;
173 8 pjf
 
174
                        when PAUSE =>
175
                                -- delay one clock for IP layer to respond to ip_tx_start and remove any tx error result
176
                                next_tx_state <= SEND_UDP_HDR;
177
                                set_tx_state <= '1';
178
 
179 2 pjf
                        when SEND_UDP_HDR =>
180
                                udp_tx_data_out_ready <= '0';            -- in this state, we are unable to accept user data for tx
181 8 pjf
                                if ip_tx_result = IPTX_RESULT_ERR then
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                                        set_ip_tx_start <= CLR;
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                                        next_tx_result <= UDPTX_RESULT_ERR;
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                                        set_tx_result <= '1';
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                                        next_tx_state <= IDLE;
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                                        set_tx_state <= '1';
187
                                elsif ip_tx_data_out_ready = '1' then
188 2 pjf
                                        if tx_count = x"0007" then
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                                                tx_count_val <= x"0001";
190
                                                tx_count_mode <= SET;
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                                                next_tx_state <= SEND_USER_DATA;
192
                                                set_tx_state <= '1';
193
                                        else
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                                                tx_count_mode <= INCR;
195
                                        end if;
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                                        case tx_count is
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                                                when x"0000"  => tx_data <= udp_txi.hdr.src_port (15 downto 8); -- src port
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                                                when x"0001"  => tx_data <= udp_txi.hdr.src_port (7 downto 0);
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                                                when x"0002"  => tx_data <= udp_txi.hdr.dst_port (15 downto 8); -- dst port
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                                                when x"0003"  => tx_data <= udp_txi.hdr.dst_port (7 downto 0);
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                                                when x"0004"  => tx_data <= total_length (15 downto 8);                         -- length
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                                                when x"0005"  => tx_data <= total_length (7 downto 0);
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                                                when x"0006"  => tx_data <= udp_txi.hdr.checksum (15 downto 8); -- checksum (set by upstream)
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                                                when x"0007"  => tx_data <= udp_txi.hdr.checksum (7 downto 0);
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                                                when others =>
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                                                        -- shouldnt get here - handle as error
207
                                                        next_tx_result <= IPTX_RESULT_ERR;
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                                                        set_tx_result <= '1';
209
                                        end case;
210
                                end if;
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212
                        when SEND_USER_DATA =>
213
                                udp_tx_data_out_ready <= '1';           -- in this state, we are always ready to accept user data for tx
214
                                if ip_tx_data_out_ready = '1' then
215
                                        if udp_txi.data.data_out_valid = '1' or tx_count = x"000" then
216
                                                -- only increment if ready and valid has been subsequently established, otherwise data count moves on too fast
217
                                                if unsigned(tx_count) = unsigned(udp_txi.hdr.data_length) then
218
                                                        set_last <= '1';
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                                                        tx_data <= udp_txi.data.data_out;
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                                                        next_tx_result <= UDPTX_RESULT_SENT;
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                                                        set_ip_tx_start <= CLR;
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                                                        set_tx_result <= '1';
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                                                        next_tx_state <= IDLE;
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                                                        set_tx_state <= '1';
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                                                else
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                                                        tx_count_mode <= INCR;
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                                                        tx_data <= udp_txi.data.data_out;
228
                                                end if;
229
                                        end if;
230
                                end if;
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232
                end case;
233
        end process;
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        -----------------------------------------------------------------------------
236
        -- sequential process to action control signals and change states and outputs
237
        -----------------------------------------------------------------------------
238
 
239
        tx_sequential : process (clk,reset,data_out_ready_reg)
240
        begin
241
                if rising_edge(clk) then
242
                        data_out_ready_reg <= ip_tx_data_out_ready;
243
                else
244
                        data_out_ready_reg <= data_out_ready_reg;
245
                end if;
246
 
247
                if rising_edge(clk) then
248
                        if reset = '1' then
249
                                -- reset state variables
250
                                udp_tx_state <= IDLE;
251
                                tx_count <= x"0000";
252
                                tx_result_reg <= IPTX_RESULT_NONE;
253
                                ip_tx_start_reg <= '0';
254
                        else
255
                                -- Next udp_tx_state processing
256
                                if set_tx_state = '1' then
257
                                        udp_tx_state <= next_tx_state;
258
                                else
259
                                        udp_tx_state <= udp_tx_state;
260
                                end if;
261
 
262
                                -- ip_tx_start_reg processing
263
                                case set_ip_tx_start is
264
                                        when SET  => ip_tx_start_reg <= '1';
265
                                        when CLR  => ip_tx_start_reg <= '0';
266
                                        when HOLD => ip_tx_start_reg <= ip_tx_start_reg;
267
                                end case;
268
 
269
                                -- tx result processing
270
                                if set_tx_result = '1' then
271
                                        tx_result_reg <= next_tx_result;
272
                                else
273
                                        tx_result_reg <= tx_result_reg;
274
                                end if;
275
 
276
                                -- tx_count processing
277
                                case tx_count_mode is
278
                                        when RST  =>    tx_count <= x"0000";
279
                                        when SET  =>    tx_count <= tx_count_val;
280
                                        when INCR =>    tx_count <= tx_count + 1;
281
                                        when HOLD =>    tx_count <= tx_count;
282
                                end case;
283
 
284
                        end if;
285
                end if;
286
        end process;
287
 
288
 
289
end Behavioral;
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