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[/] [usb2uart/] [trunk/] [rtl/] [usb1_core/] [usb1_crc16.v] - Blame information for rev 2

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1 2 dinesha
/////////////////////////////////////////////////////////////////////
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////                                                             ////
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////  USB CRC16 Modules                                          ////
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////                                                             ////
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////                                                             ////
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////  Author: Rudolf Usselmann                                   ////
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////          rudi@asics.ws                                      ////
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////                                                             ////
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////                                                             ////
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////  Downloaded from: http://www.opencores.org/cores/usb1_funct/////
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////                                                             ////
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/////////////////////////////////////////////////////////////////////
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////                                                             ////
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//// Copyright (C) 2000-2002 Rudolf Usselmann                    ////
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////                         www.asics.ws                        ////
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////                         rudi@asics.ws                       ////
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////                                                             ////
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//// This source file may be used and distributed without        ////
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//// restriction provided that this copyright statement is not   ////
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//// removed from the file and that any derivative work contains ////
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//// the original copyright notice and the associated disclaimer.////
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////                                                             ////
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////     THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY     ////
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//// EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED   ////
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//// TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS   ////
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//// FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL THE AUTHOR      ////
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//// OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,         ////
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//// INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES    ////
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//// (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE   ////
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//// GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR        ////
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//// BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF  ////
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//// LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT  ////
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//// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT  ////
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//// OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE         ////
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//// POSSIBILITY OF SUCH DAMAGE.                                 ////
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////                                                             ////
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/////////////////////////////////////////////////////////////////////
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//  CVS Log
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//
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//  $Id: usb1_crc16.v,v 1.1.1.1 2002-09-19 12:07:39 rudi Exp $
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//
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//  $Date: 2002-09-19 12:07:39 $
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//  $Revision: 1.1.1.1 $
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//  $Author: rudi $
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//  $Locker:  $
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//  $State: Exp $
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//
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// Change History:
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//               $Log: not supported by cvs2svn $
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//
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//
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//
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//
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//
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//
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//                            
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`include "usb1_defines.v"
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///////////////////////////////////////////////////////////////////
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//
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// CRC16
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//
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///////////////////////////////////////////////////////////////////
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module usb1_crc16(crc_in, din, crc_out);
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input   [15:0]   crc_in;
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input   [7:0]    din;
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output  [15:0]   crc_out;
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assign crc_out[0] =      din[7] ^ din[6] ^ din[5] ^ din[4] ^ din[3] ^
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                        din[2] ^ din[1] ^ din[0] ^ crc_in[8] ^ crc_in[9] ^
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                        crc_in[10] ^ crc_in[11] ^ crc_in[12] ^ crc_in[13] ^
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                        crc_in[14] ^ crc_in[15];
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assign crc_out[1] =     din[7] ^ din[6] ^ din[5] ^ din[4] ^ din[3] ^ din[2] ^
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                        din[1] ^ crc_in[9] ^ crc_in[10] ^ crc_in[11] ^
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                        crc_in[12] ^ crc_in[13] ^ crc_in[14] ^ crc_in[15];
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assign crc_out[2] =     din[1] ^ din[0] ^ crc_in[8] ^ crc_in[9];
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assign crc_out[3] =     din[2] ^ din[1] ^ crc_in[9] ^ crc_in[10];
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assign crc_out[4] =     din[3] ^ din[2] ^ crc_in[10] ^ crc_in[11];
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assign crc_out[5] =     din[4] ^ din[3] ^ crc_in[11] ^ crc_in[12];
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assign crc_out[6] =     din[5] ^ din[4] ^ crc_in[12] ^ crc_in[13];
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assign crc_out[7] =     din[6] ^ din[5] ^ crc_in[13] ^ crc_in[14];
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assign crc_out[8] =     din[7] ^ din[6] ^ crc_in[0] ^ crc_in[14] ^ crc_in[15];
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assign crc_out[9] =     din[7] ^ crc_in[1] ^ crc_in[15];
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assign crc_out[10] =    crc_in[2];
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assign crc_out[11] =    crc_in[3];
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assign crc_out[12] =    crc_in[4];
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assign crc_out[13] =    crc_in[5];
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assign crc_out[14] =    crc_in[6];
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assign crc_out[15] =    din[7] ^ din[6] ^ din[5] ^ din[4] ^ din[3] ^ din[2] ^
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                        din[1] ^ din[0] ^ crc_in[7] ^ crc_in[8] ^ crc_in[9] ^
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                        crc_in[10] ^ crc_in[11] ^ crc_in[12] ^ crc_in[13] ^
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                        crc_in[14] ^ crc_in[15];
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endmodule
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