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Subversion Repositories usb_fpga_2_14

[/] [usb_fpga_2_14/] [trunk/] [default/] [fpga-fx3/] [ezusb_gpio.v] - Blame information for rev 2

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Line No. Rev Author Line
1 2 ZTEX
/*%
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   Common communication interface of default firmwares
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   Copyright (C) 2009-2017 ZTEX GmbH.
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   http://www.ztex.de
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   Copyright and related rights are licensed under the Solderpad Hardware
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   License, Version 0.51 (the "License"); you may not use this file except
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   in compliance with the License. You may obtain a copy of the License at
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       http://solderpad.org/licenses/SHL-0.51.
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   Unless required by applicable law or agreed to in writing, software, hardware
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   and materials distributed under this License is distributed on an "AS IS"
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   BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
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   implied. See the License for the specific language governing permissions
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   and limitations under the License.
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%*/
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/*
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   Implements the 4 bi-directional GPIO's of the default interface.
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   On FX3 outputs on both ends are or-wired.
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   Remember (because it's not implemented here) default interface always
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   contains a reset signal.
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*/
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module ezusb_gpio (
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        // control signals
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        input clk,                      // system clock
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        // hardware pins
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        inout [3:0] gpio_n,              // wired or: low-active open-drain output
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        // interface
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        output reg [3:0] in,
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        input [3:0] out                  // wired or: GPIO's not used for output should be 0
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    );
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    assign gpio_n[0] = !out[0] ? 1'bz : 1'b0;
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    assign gpio_n[1] = !out[1] ? 1'bz : 1'b0;
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    assign gpio_n[2] = !out[2] ? 1'bz : 1'b0;
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    assign gpio_n[3] = !out[3] ? 1'bz : 1'b0;
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    always @ (posedge clk)
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    begin
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        in <= ~gpio_n;
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    end
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endmodule

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