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[/] [usb_fpga_2_14/] [trunk/] [examples/] [lightshow/] [fpga-2.18/] [lightshow.vhd] - Blame information for rev 2

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1 2 ZTEX 
library ieee;
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use IEEE.std_logic_1164.all;
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use IEEE.std_logic_arith.all;
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use IEEE.std_logic_unsigned.all;
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entity lightshow is
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   port(
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      led0     : out std_logic;                      -- LED on FPGA Board
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      led1     : out std_logic_vector(9 downto 0);   -- LED1 on Debug Board
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      led2     : out std_logic_vector(19 downto 0);  -- LED2 + LED3 on Debug Board
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      sw       : in std_logic_vector(3 downto 0);
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      fxclk    : in std_logic
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   );
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end lightshow;
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--signal declaration
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architecture RTL of lightshow is
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type tPattern1 is array(9 downto 0) of integer range 0 to 255;
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type tPattern2 is array(19 downto 0) of integer range 0 to 255;
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signal pattern1  : tPattern1 := (0, 10, 41, 92, 163, 255, 163, 92, 41, 10);                                      -- pattern for LED1
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signal pattern20 : tPattern2 := (0, 1, 2, 9, 16, 25, 36, 49, 64, 81, 64, 49, 36, 25, 16, 9, 2, 1, 0, 0);   -- 1st pattern for LED2
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signal pattern21 : tPattern2 := (0, 19, 77, 174, 77, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);            -- 2nd pattern for LED2
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signal pattern2  : tPattern2;                                                                                   -- pattern20 + pattern21
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signal cnt1,cnt20, cnt21  : std_logic_vector(21 downto 0);
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signal cnt3               : std_logic_vector(231 downto 0);
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signal pwm_cnt            : std_logic_vector(18 downto 0);
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signal pwm_cnt8           : std_logic_vector(7 downto 0);
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signal led0_buf           : std_logic;
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begin
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    pwm_cnt8 <= pwm_cnt(18 downto 11);
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    led0 <= led0_buf;
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    dp_fxclk: process(fxclk)
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    begin
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         if fxclk' event and fxclk = '1' then
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            -- pattern for led 0
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            if ( cnt3 >= conv_std_logic_vector(13000000,24) )  -- 1 Hz
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            then
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                led0_buf <= not led0_buf;
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                cnt3  <= (others => '0');
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            else
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                cnt3 <= cnt3 + 1;
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            end if;
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            -- pattern for led 1
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            if ( cnt1 >= conv_std_logic_vector(3900000,22) )  -- 1/1.5 Hz
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            then
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                if ( sw(0) = '1' )
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                then
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                    pattern1(8 downto 0) <= pattern1(9 downto 1);
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                    pattern1(9) <= pattern1(0);
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                else
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                    pattern1(9 downto 1) <= pattern1(8 downto 0);
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                    pattern1(0) <= pattern1(9);
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                end if;
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                cnt1  <= (others => '0');
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            else
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                cnt1 <= cnt1  + 1;
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            end if;
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            -- pattern for led 2
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            if ( ( cnt20 >= conv_std_logic_vector(2600000,22) ) or ( (sw(2)= '1') and (cnt20 >= conv_std_logic_vector(1040000,22)) ) )  -- SW1 off: 0.2Hz, SW1 on: 0.5Hz
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            then
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                pattern20(18 downto 0) <= pattern20(19 downto 1);
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                pattern20(19) <= pattern20(0);
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                cnt20 <= (others => '0');
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            else
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                cnt20 <= cnt20 + 1;
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            end if;
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            if ( ( cnt21 >= conv_std_logic_vector(1000000,22) ) or ( (sw(3)= '1') and (cnt21 >= conv_std_logic_vector(250000,22)) ) )
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            then
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                if ( sw(1) = '1' )
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                then
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                    pattern21(18 downto 0) <= pattern21(19 downto 1);
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                    pattern21(19) <= pattern21(0);
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                else
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                    pattern21(19 downto 1) <= pattern21(18 downto 0);
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                    pattern21(0) <= pattern21(19);
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                end if;
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                cnt21 <= (others => '0');
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            else
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                cnt21 <= cnt21 + 1;
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            end if;
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            for i in 0 to 19 loop
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                pattern2(i) <= pattern20(i) + pattern21(i);
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            end loop;
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            -- pwm
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            if ( pwm_cnt8 = conv_std_logic_vector(255,8) )
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            then
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                pwm_cnt <= ( others => '0' );
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            else
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                pwm_cnt <= pwm_cnt + 1;
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            end if;
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            -- led1
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            for i in 0 to 9 loop
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                if ( pwm_cnt8 < pattern1(i) )
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                then
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                    led1(i) <= '1';
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                else
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                    led1(i) <= '0';
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                end if;
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            end loop;
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            for i in 0 to 19 loop
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                if (pwm_cnt8 < pattern2(i) )
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                then
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                    led2(i) <= '1';
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                else
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                    led2(i) <= '0';
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                end if;
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            end loop;
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        end if;
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    end process dp_fxclk;
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end RTL;

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