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URL https://opencores.org/ocsvn/usb_fpga_2_14/usb_fpga_2_14/trunk

Subversion Repositories usb_fpga_2_14

[/] [usb_fpga_2_14/] [trunk/] [examples/] [memfifo/] [fpga-2.04b/] [memfifo.ucf] - Blame information for rev 2

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1 2 ZTEX
# CLKOUT/FXCLK
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NET "fxclk_in" TNM_NET = "fxclk_in";
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TIMESPEC "ts_fxclk_in" = PERIOD "fxclk_in" 48 MHz HIGH 50 %;
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NET "fxclk_in"  LOC = "J16" | IOSTANDARD = LVCMOS33 ;
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# IFCLK
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NET "ifclk_in" TNM_NET = "ifclk_in";
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TIMESPEC "ts_ifclk_in" = PERIOD "ifclk_in" 100 MHz HIGH 50 %;
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NET "ifclk_in"  LOC = "J14" | IOSTANDARD = LVCMOS33 ;
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NET "reset"     LOC = "R3" | IOSTANDARD = LVCMOS33 ;                    # PA7/FLAGD/SLCS#
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# GPIO
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NET "gpio_clk"  LOC = "N12" | IOSTANDARD = LVCMOS33 ;           # PC1/GPIFADR1
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NET "gpio_dir"  LOC = "P12" | IOSTANDARD = LVCMOS33 ;           # PC2/GPIFADR2
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NET "gpio_dat"  LOC = "N5" | IOSTANDARD = LVCMOS33 | PULLUP;    # PC3/GPIFADR3
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# led1
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NET "led1<0>"      LOC = "B16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # A6
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NET "led1<1>"      LOC = "C16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # B6
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NET "led1<2>"      LOC = "B15" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # A7
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NET "led1<3>"      LOC = "C15" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # B7
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NET "led1<4>"      LOC = "A14" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # A8
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NET "led1<5>"      LOC = "B14" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # B8
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NET "led1<6>"      LOC = "A13" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # A9
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NET "led1<7>"      LOC = "C13" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # B9
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NET "led1<8>"      LOC = "A12" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # A10
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NET "led1<9>"      LOC = "B12" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # B10
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NET "led2<0>"      LOC = "R15" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # C6
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NET "led2<1>"      LOC = "R16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # D6
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NET "led2<2>"      LOC = "N16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # C7
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NET "led2<3>"      LOC = "P16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # D7
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NET "led2<4>"      LOC = "N14" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # C8
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NET "led2<5>"      LOC = "P15" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # D8
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NET "led2<6>"      LOC = "T15" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # C9
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NET "led2<7>"      LOC = "T14" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # D9
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NET "led2<8>"      LOC = "R14" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # C10
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NET "led2<9>"      LOC = "T13" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # D10
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NET "led2<10>"      LOC = "R12" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # C11
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NET "led2<11>"      LOC = "T12" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # D11
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NET "led2<12>"      LOC = "L16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # C12
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NET "led2<13>"      LOC = "M16" | IOSTANDARD = LVCMOS33 | DRIVE = 12 ;              # D12
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NET "sw8"       LOC = "E11" | IOSTANDARD = LVCMOS33 | PULLUP ;          # B11
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NET "sw10"      LOC = "F10" | IOSTANDARD = LVCMOS33 | PULLUP ;          # B12
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NET "fd<0>"        LOC = "D16" | IOSTANDARD = LVCMOS33 ;           # PB0/FD0
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NET "fd<1>"        LOC = "F15" | IOSTANDARD = LVCMOS33 ;           # PB1/FD1
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NET "fd<2>"        LOC = "E15" | IOSTANDARD = LVCMOS33 ;           # PB2/FD2
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NET "fd<3>"        LOC = "D14" | IOSTANDARD = LVCMOS33 ;           # PB3/FD3
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NET "fd<4>"        LOC = "F13" | IOSTANDARD = LVCMOS33 ;           # PB4/FD4
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NET "fd<5>"        LOC = "E12" | IOSTANDARD = LVCMOS33 ;           # PB5/FD5
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NET "fd<6>"        LOC = "F12" | IOSTANDARD = LVCMOS33 ;           # PB6/FD6
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NET "fd<7>"        LOC = "G12" | IOSTANDARD = LVCMOS33 ;           # PB7/FD7
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NET "fd<8>"        LOC = "H14" | IOSTANDARD = LVCMOS33 ;           # PD0/FD8
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NET "fd<9>"        LOC = "J11" | IOSTANDARD = LVCMOS33 ;           # PD1/FD9
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NET "fd<10>"        LOC = "J12" | IOSTANDARD = LVCMOS33 ;           # PD2/FD10
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NET "fd<11>"        LOC = "J13" | IOSTANDARD = LVCMOS33 ;           # PD3/FD11
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NET "fd<12>"        LOC = "K12" | IOSTANDARD = LVCMOS33 ;           # PD4/FD12
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NET "fd<13>"        LOC = "K15" | IOSTANDARD = LVCMOS33 ;           # PD5/FD13
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NET "fd<14>"        LOC = "K16" | IOSTANDARD = LVCMOS33 ;           # PD6/FD14
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NET "fd<15>"        LOC = "M14" | IOSTANDARD = LVCMOS33 ;           # PD7/FD15
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NET "SLRD"      LOC = "H16" | IOSTANDARD = LVCMOS33 ;           # RDY0/SLRD
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NET "SLWR"      LOC = "H15" | IOSTANDARD = LVCMOS33 ;           # RDY1/SLWR
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NET "FLAGA"     LOC = "G14" | IOSTANDARD = LVCMOS33 ;           # CTL0/FLAGA
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NET "FLAGB"     LOC = "G16" | IOSTANDARD = LVCMOS33 ;           # CTL1/FLAGB
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NET "SLOE"      LOC = "H13" | IOSTANDARD = LVCMOS33 ;           # PA2/SLOE
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NET "FIFOADDR0" LOC = "T11" | IOSTANDARD = LVCMOS33 ;           # PA4/FIFOADR0
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NET "FIFOADDR1" LOC = "N11" | IOSTANDARD = LVCMOS33 ;           # PA5/FIFOADR1
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NET "PKTEND"    LOC = "T5" | IOSTANDARD = LVCMOS33 ;            # PA6/PKTEND

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