URL https://opencores.org/ocsvn/usb_fpga_2_14/usb_fpga_2_14/trunk

Subversion Repositories usb_fpga_2_14

[/] [usb_fpga_2_14/] [trunk/] [examples/] [memfifo/] [fpga-2.18/] [memfifo.runs/] [synth_2_18b/] [dont_touch.xdc] - Blame information for rev 2

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# This file is automatically generated.
# It contains project source information necessary for synthesis and implementation.
 
# XDC: /drv_s2/usb-fpga/ztex/examples/memfifo/fpga-2.18/memfifo.xdc
 
# XDC: /drv_s2/usb-fpga/ztex/examples/memfifo/fpga-2.18/usb_fpga-2.18b-mem.xdc
 
# IP: ip/mig_7series_0/mig_7series_0.xci
set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==mig_7series_0 || ORIG_REF_NAME==mig_7series_0}]
 
# XDC: ip/mig_7series_0/mig_7series_0/user_design/constraints/mig_7series_0.xdc
#dup# set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==mig_7series_0 || ORIG_REF_NAME==mig_7series_0}]
 
# XDC: ip/mig_7series_0/mig_7series_0/user_design/constraints/mig_7series_0_ooc.xdc

Line No.	Rev	Author	Line
1	2	ZTEX	`# This file is automatically generated.`
2			`# It contains project source information necessary for synthesis and implementation.`
3
4			`# XDC: /drv_s2/usb-fpga/ztex/examples/memfifo/fpga-2.18/memfifo.xdc`
5
6			`# XDC: /drv_s2/usb-fpga/ztex/examples/memfifo/fpga-2.18/usb_fpga-2.18b-mem.xdc`
7
8			`# IP: ip/mig_7series_0/mig_7series_0.xci`
9			`set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==mig_7series_0 \|\| ORIG_REF_NAME==mig_7series_0}]`
10
11			`# XDC: ip/mig_7series_0/mig_7series_0/user_design/constraints/mig_7series_0.xdc`
12			`#dup# set_property DONT_TOUCH TRUE [get_cells -hier -filter {REF_NAME==mig_7series_0 \|\| ORIG_REF_NAME==mig_7series_0}]`
13
14			`# XDC: ip/mig_7series_0/mig_7series_0/user_design/constraints/mig_7series_0_ooc.xdc`

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Subversion Repositories usb_fpga_2_14

[/] [usb_fpga_2_14/] [trunk/] [examples/] [memfifo/] [fpga-2.18/] [memfifo.runs/] [synth_2_18b/] [dont_touch.xdc] - Blame information for rev 2