| 1 |
2 |
ZTEX |
# CLKOUT/FXCLK
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| 2 |
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create_clock -name fxclk_in -period 20.833 [get_ports fxclk_in]
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| 3 |
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set_property PACKAGE_PIN Y18 [get_ports fxclk_in]
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| 4 |
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set_property IOSTANDARD LVCMOS33 [get_ports fxclk_in]
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| 5 |
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| 6 |
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set_property PACKAGE_PIN R17 [get_ports {MM_A[0]}] ;# A0
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| 7 |
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set_property PACKAGE_PIN P16 [get_ports {MM_A[1]}] ;# A1
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| 8 |
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set_property PACKAGE_PIN R16 [get_ports {MM_A[2]}] ;# A2
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| 9 |
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set_property PACKAGE_PIN T18 [get_ports {MM_A[3]}] ;# A3
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| 10 |
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set_property PACKAGE_PIN V19 [get_ports {MM_A[4]}] ;# A4
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| 11 |
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set_property PACKAGE_PIN V20 [get_ports {MM_A[5]}] ;# A5
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| 12 |
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set_property PACKAGE_PIN V22 [get_ports {MM_A[6]}] ;# A6
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| 13 |
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set_property PACKAGE_PIN W17 [get_ports {MM_A[7]}] ;# A7
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| 14 |
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set_property PACKAGE_PIN Y19 [get_ports {MM_A[8]}] ;# A8
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| 15 |
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set_property PACKAGE_PIN Y21 [get_ports {MM_A[9]}] ;# A9
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| 16 |
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set_property PACKAGE_PIN Y22 [get_ports {MM_A[10]}] ;# A10
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| 17 |
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set_property PACKAGE_PIN G20 [get_ports {MM_A[11]}] ;# A11
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| 18 |
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set_property PACKAGE_PIN G18 [get_ports {MM_A[12]}] ;# A12
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| 19 |
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set_property PACKAGE_PIN G17 [get_ports {MM_A[13]}] ;# A13
|
| 20 |
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set_property PACKAGE_PIN G16 [get_ports {MM_A[14]}] ;# A14
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| 21 |
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set_property PACKAGE_PIN G15 [get_ports {MM_A[15]}] ;# A15
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| 22 |
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| 23 |
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set_property PACKAGE_PIN J22 [get_ports {MM_D[0]}] ;# D0
|
| 24 |
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set_property PACKAGE_PIN J21 [get_ports {MM_D[1]}] ;# D1
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| 25 |
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set_property PACKAGE_PIN J20 [get_ports {MM_D[2]}] ;# D2
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| 26 |
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set_property PACKAGE_PIN K17 [get_ports {MM_D[3]}] ;# D3
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| 27 |
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set_property PACKAGE_PIN J17 [get_ports {MM_D[4]}] ;# D4
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| 28 |
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set_property PACKAGE_PIN M17 [get_ports {MM_D[5]}] ;# D5
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| 29 |
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set_property PACKAGE_PIN N22 [get_ports {MM_D[6]}] ;# D6
|
| 30 |
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set_property PACKAGE_PIN N20 [get_ports {MM_D[7]}] ;# D7
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| 31 |
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set_property DRIVE 4 [get_ports {MM_D[*]}]
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| 32 |
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| 33 |
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set_property PACKAGE_PIN H14 [get_ports {MM_WRN}] ;# WR_N
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| 34 |
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set_property PACKAGE_PIN H17 [get_ports {MM_RDN}] ;# RD_N
|
| 35 |
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set_property PACKAGE_PIN H18 [get_ports {MM_PSENN}] ;# PSEN_N
|
| 36 |
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|
| 37 |
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set_property IOSTANDARD LVCMOS33 [get_ports {MM_*}]
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| 38 |
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|
| 39 |
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# bitstream settings
|
| 40 |
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set_property BITSTREAM.CONFIG.CONFIGRATE 66 [current_design]
|
| 41 |
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set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR No [current_design]
|
| 42 |
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set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 2 [current_design]
|
| 43 |
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set_property BITSTREAM.GENERAL.COMPRESS true [current_design]
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