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URL https://opencores.org/ocsvn/usb_fpga_2_14/usb_fpga_2_14/trunk

Subversion Repositories usb_fpga_2_14

[/] [usb_fpga_2_14/] [trunk/] [examples/] [ucecho/] [fpga-2.01b/] [ucecho.ucf] - Blame information for rev 2

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Line No. Rev Author Line
1 2 ZTEX
# fxclk_in
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NET "fxclk_in" TNM_NET = "fxclk_in";
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TIMESPEC "ts_fxclk_in" = PERIOD "fxclk_in" 48 MHz HIGH 50 %;
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NET "fxclk_in"  LOC = "T7" | IOSTANDARD = LVCMOS33 ;
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# reset_in
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NET "reset_in"  LOC = "R3" | IOSTANDARD = LVCMOS33 ;            # PA7/FLAGD/SLCS#
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# GPIO signals
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#NET "gpio_clk" LOC = "N12" | IOSTANDARD = LVCMOS33 ;           # PC1/GPIFADR1
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#NET "gpio_dir" LOC = "P12" | IOSTANDARD = LVCMOS33 ;           # PC2/GPIFADR2
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#NET "gpio_dat" LOC = "N5" | IOSTANDARD = LVCMOS33 | PULLUP;    # PC3/GPIFADR3
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# LSI signals
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NET "lsi_miso"  LOC = "P5" | IOSTANDARD = LVCMOS33 ;            # PC4/GPIFADR4
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NET "lsi_mosi"  LOC = "L8" | IOSTANDARD = LVCMOS33 ;            # PC5/GPIFADR5
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NET "lsi_clk"   LOC = "L7" | IOSTANDARD = LVCMOS33 ;            # PC6/GPIFADR6
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NET "lsi_stop"  LOC = "R5" | IOSTANDARD = LVCMOS33 ;            # PC7/GPIFADR7
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