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[/] [usb_fpga_2_14/] [trunk/] [fx2/] [ztex-conf.h] - Blame information for rev 2

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1 2 ZTEX
/*%
2
   ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers
3
   Copyright (C) 2009-2017 ZTEX GmbH.
4
   http://www.ztex.de
5
 
6
   This Source Code Form is subject to the terms of the Mozilla Public
7
   License, v. 2.0. If a copy of the MPL was not distributed with this file,
8
   You can obtain one at http://mozilla.org/MPL/2.0/.
9
 
10
   Alternatively, the contents of this file may be used under the terms
11
   of the GNU General Public License Version 3, as described below:
12
 
13
   This program is free software; you can redistribute it and/or modify
14
   it under the terms of the GNU General Public License version 3 as
15
   published by the Free Software Foundation.
16
 
17
   This program is distributed in the hope that it will be useful, but
18
   WITHOUT ANY WARRANTY; without even the implied warranty of
19
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20
   General Public License for more details.
21
 
22
   You should have received a copy of the GNU General Public License
23
   along with this program; if not, see http://www.gnu.org/licenses/.
24
%*/
25
 
26
/*
27
   Configuration macros
28
*/
29
 
30
#ifndef[ZTEX_CONF_H]
31
#define[ZTEX_CONF_H]
32
 
33
/*
34
   Don't expand macros in comments
35
*/
36
#disablelineinfo
37
#define[//][
38
][#noexpand[!dnapxeon!]//$0!dnapxeon!
39
]
40
#disablelineinfo
41
#define[/*][*/][#noexpand[!dnapxeon!]/*$0*/!dnapxeon!]
42
 
43
/*
44
   This macro defines the USB Vendor ID and USB Product ID  (not the product ID
45
   from the ZTEX descriptor). The Vendor ID must be purchased from the USB-IF
46
   (http://www.usb.org).
47
 
48
   The default vendor ID is the ZTEX vendor ID 0x221A, default product ID is
49
   0x100 which is assigned to ZTEX modules. These ID's can be shared by many
50
   different products which are identified by the product ID of the ZTEX
51
   descriptor. According to the USB-IF rules these ID's must not be used by
52
   hardware which is not manufactured by ZTEX. (Of course, this ID's can be
53
   used during the development process or for internal purposes.)
54
 
55
   Please read the http://www.ztex.de/firmware-kit/usb_ids.e.html for more
56
   informations about this topic.
57
 
58
   Usage:
59
        SET_VPID(<Vendor ID>,<Product ID>);
60
*/
61
#define[SET_VPID(][,$1);][#define[USB_VENDOR_ID][$0]
62
#define[USB_PRODUCT_ID][$1]]
63
SET_VPID(0x221a,0x100);
64
 
65
/*
66
   This macro is called before FPGA Firmware is reset, e.g. to save some
67
   settings. After this macro is called the I/O ports are set to default
68
   states in order to avoid damage during / after the FPGA configuration.
69
   To append something to this macro use the following definition:
70
#define[PRE_FPGA_RESET][PRE_FPGA_RESET
71
...]
72
*/
73
#define[PRE_FPGA_RESET][]
74
 
75
 
76
/*
77
   This macro is called after FPGA Firmware has been configured. This is
78
   usually used to configure the I/O ports.
79
   To append something to this macro use the following definition:
80
#define[POST_FW_LOAD][POST_FW_LOAD
81
...]
82
*/
83
#define[POST_FPGA_CONFIG][]
84
 
85
/*
86
   On multi FPGA boards this macro is called betwen deselection and
87
   selection of a FPGA. This can be used to store / resore I/O contents.
88
   To append something to this macro use the following definition:
89
#define[PRE_FPGA_SELECT][PRE_FPGA_SELECT
90
...]
91
*/
92
#define[PRE_FPGA_SELECT][]
93
 
94
 
95
/*
96
  Add a vedor request for endpoint 0,
97
 
98
   Usage:
99
     ADD_EP0_VENDOR_REQUEST((<request number>,,<code executed after setup package received>,,<code executed after data package received>''));
100
   Example:
101
     ADD_EP0_VENDOR_REQUEST((0x33,,initHSFPGAConfiguration();,,));;
102
...]
103
*/
104
#define[EP0_VENDOR_REQUESTS_SU;][]
105
#define[EP0_VENDOR_REQUESTS_DAT;][]
106
#define[ADD_EP0_VENDOR_REQUEST((][,,$1,,$2));;][#define[EP0_VENDOR_REQUESTS_SU;][EP0_VENDOR_REQUESTS_SU;
107
case $0:
108
    $1
109
    break;
110
]
111
#define[EP0_VENDOR_REQUESTS_DAT;][EP0_VENDOR_REQUESTS_DAT;
112
case $0:
113
    $2
114
    break;
115
]]
116
 
117
 
118
/*
119
   Add a vedor command for endpoint 0,
120
 
121
   Usage:
122
     ADD_EP0_VENDOR_COMMAND((<request number>,,<code executed after setup package received>,,<code executed after data package received>''));
123
   Example:
124
     ADD_EP0_VENDOR_COMMAND((0x33,,initHSFPGAConfiguration();,,));;
125
...]
126
*/
127
#define[EP0_VENDOR_COMMANDS_SU;][]
128
#define[EP0_VENDOR_COMMANDS_DAT;][]
129
#define[ADD_EP0_VENDOR_COMMAND((][,,$1,,$2));;][#define[EP0_VENDOR_COMMANDS_SU;][EP0_VENDOR_COMMANDS_SU;
130
case $0:
131
    $1
132
    break;
133
]
134
#define[EP0_VENDOR_COMMANDS_DAT;][EP0_VENDOR_COMMANDS_DAT;
135
case $0:
136
    $2
137
    break;
138
]]
139
 
140
/*
141
  This macro generates a EP0 stall and aborts the current loop. Stalls are usually used to indicate errors.
142
*/
143
#define[EP0_STALL;][{
144
    EP0CS |= 0x01;      // set stall
145
    ep0_payload_remaining = 0;
146
    break;
147
}]
148
 
149
 
150
/*
151
   Endoint 1,2,4,5,8 configuration:
152
 
153
   EP_CONFIG(<EP number>,<interface>,<type>,<direction>,<size>,<buffers>)
154
        <EP number> = 1IN | 1OUT | 2 | 4 | 6 | 8        Endpoint number
155
        <INTERFACE> = 0 | 1 | 2 | 3                     To which interface this endpoint belongs
156
        <type>      = BULK  | ISO | INT
157
        <dir>       = IN | OUT
158
        <size>      = 512 | 1024
159
        <buffers>   = 1 | 2 | 3 | 4
160
   Example: EP_CONFIG(2,0,ISO,OUT,1024,4);
161
   Important note: No spaces next to the commas
162
 
163
 
164
   Endpoint 1 configuration:
165
 
166
   These Endpoints are defined by default as bulk endpoints and are assigned to interface 0.
167
   Endpoint size is always 64 bytes, but reported Endpoint size will be 512 bytes for USB 2.0 compliance.
168
 
169
   These Endpoints can be redefined using EP_CONFIG or using:
170
 
171
   EP1IN_CONFIG(<interface>);
172
           <INTERFACE> = 0 | 1 | 2 | 3          Interface to which EP1IN belongs; default: 0
173
   EP1OUT_CONFIG(<interface>);
174
           <INTERFACE> = 0 | 1 | 2 | 3          Interface to which EP1OUT belongs; default: 0
175
   EP1_CONFIG(<interface>);
176
           <INTERFACE> = 0 | 1 | 2 | 3          Interface to which EP1IN and EP1OUT belongs; default: 0
177
 
178
   The following (maximum) configurations are possible:
179
   EP2          EP4     EP6     EP8
180
   2x512        2x512   2x512   2x512
181
   2x512        2x512   4x512
182
   2x512        2x512   2x1024
183
   4x512                2x512   2x512
184
   4x512                4x512
185
   4x512                2x1024
186
   2x1024               2x512   2x512
187
   2x1024               4x512
188
   2x1024               2x1024
189
   3x512                3x512   2x512
190
   3x1024                       2x512
191
   4x1024
192
*/
193
#define[EP_CONFIG(][,$1,$2,$3,$4,$5);][
194
#ifeq[$0][1IN]
195
#elifeq[$0][1OUT]
196
#elifeq[$0][2]
197
#elifeq[$0][4]
198
#elifeq[$0][6]
199
#elifneq[$0][8]
200
#error[EP_CONFIG: Invalid 1st parameter: `$0'. Expected `2', `4', `6' or '8']
201
#endif
202
#ifeq[$1][0]
203
#elifeq[$1][1]
204
#elifeq[$1][2]
205
#elifneq[$1][3]
206
#error[EP_CONFIG: Invalid 2nd parameter: `$1'. Expected `0', `1', `2' or '3']
207
#endif
208
#ifeq[$2][BULK]
209
#elifeq[$2][ISO]
210
#elifneq[$2][INT]
211
#error[EP_CONFIG: Invalid 3nd parameter: `$2'. Expected `BULK', `ISO' or 'INT']
212
#endif
213
#ifeq[$3][IN]
214
#elifneq[$3][OUT]
215
#error[EP_CONFIG: Invalid 4th parameter: `$3'. Expected `IN' or 'OUT']
216
#endif
217
#ifeq[$4][512]
218
#elifneq[$4][1024]
219
#error[EP_CONFIG: Invalid 5th parameter: `$4'. Expected `512' or '1024']
220
#endif
221
#ifeq[$5][1]
222
#elifeq[$5][2]
223
#elifeq[$5][3]
224
#elifneq[$5][4]
225
#error[EP_CONFIG: Invalid 6th parameter: `$5'. Expected `1', `2', `3' or `4']
226
#endif
227
#define[EP$0_INTERFACE][$1]
228
#define[EP$0_TYPE][$2]
229
#define[EP$0_DIR][$3]
230
#define[EP$0_SIZE][$4]
231
#define[EP$0_BUFFERS][$5]]
232
 
233
#define[EP1IN_CONFIG(][);][#define[EP1IN_INTERFACE][$0]]
234
#define[EP1OUT_CONFIG(][);][#define[EP1OUT_INTERFACE][$0]]
235
#define[EP1_CONFIG(][);][#define[EP1IN_INTERFACE][$0]
236
#define[EP1OUT_INTERFACE][$0]]
237
 
238
EP_CONFIG(1IN,0,BULK,IN,512,1);
239
EP_CONFIG(1OUT,0,BULK,OUT,512,1);
240
 
241
/*
242
   ISO and INT Transactions per microframe:
243
 
244
   Default value is 1 for all endpoints.
245
 
246
   EP_PPMF(<EP number>,<transactions per microframe>)
247
        <EP number>                  = 1IN | 1OUT | 2 | 4 | 6 | 8       Endpoint
248
        <transactions per microframe> = 1 | 2 | 3                       Transactions per microframe
249
 
250
   Example: EP_PPMF(2,3);
251
   Important note: No spaces next to the commas
252
*/
253
#define[EP_PPMF(][,$1);][
254
#ifeq[$0][1IN]
255
#elifeq[$0][1OUT]
256
#elifeq[$0][2]
257
#elifeq[$0][4]
258
#elifeq[$0][6]
259
#elifneq[$0][8]
260
#error[EP_CONFIG: Invalid 1st parameter: `$0'. Expected `1IN', `1OUT', `2', `4', `6' or '8']
261
#endif
262
#ifeq[$1][1]
263
#elifeq[$1][2]
264
#elifneq[$1][3]
265
#error[EP_CONFIG: Invalid 2nd parameter: `$1'. Expected `1', `2' or '3']
266
#endif
267
#define[EP$0_PPMF][$1]]
268
 
269
EP_PPMF(1IN,1);
270
EP_PPMF(1OUT,1);
271
EP_PPMF(2,1);
272
EP_PPMF(4,1);
273
EP_PPMF(6,1);
274
EP_PPMF(8,1);
275
 
276
/*
277
   Polling interval in microframes for INT transactions:
278
 
279
   Default value is 1 for all endpoints.
280
 
281
   EP_POLL(<EP number>,<polling interval>)
282
        <EP number>        = 1IN | 1OUT | 2 | 4 | 6 | 8         Endpoint
283
        <polling interval> = 1 | 2 | 3                          Polling interval
284
 
285
   Example: EP_POLL(2,1);
286
   Important note: No spaces next to the commas
287
*/
288
#define[EP_POLL(][,$1);][
289
#ifeq[$0][1IN]
290
#elifeq[$0][1OUT]
291
#elifeq[$0][2]
292
#elifeq[$0][4]
293
#elifeq[$0][6]
294
#elifneq[$0][8]
295
#error[EP_CONFIG: Invalid 1st parameter: `$0'. Expected `1IN', `1OUT', `2', `4', `6' or '8']
296
#endif
297
#define[EP$0_POLL][$1]]
298
 
299
EP_POLL(1IN,1);
300
EP_POLL(1OUT,1);
301
EP_POLL(2,1);
302
EP_POLL(4,1);
303
EP_POLL(6,1);
304
EP_POLL(8,1);
305
 
306
 
307
 
308
/*
309
   Settings which depends PRODUCT_ID, e.g extra capabilities.
310
   Overwrite this macros as desired.
311
*/
312
#define[MODULE_RESERVED_00][0]
313
#define[MODULE_RESERVED_01][0]
314
#define[MODULE_RESERVED_02][0]
315
#define[MODULE_RESERVED_03][0]
316
#define[MODULE_RESERVED_04][0]
317
#define[MODULE_RESERVED_05][0]
318
#define[MODULE_RESERVED_06][0]
319
#define[MODULE_RESERVED_07][0]
320
#define[MODULE_RESERVED_08][0]
321
#define[MODULE_RESERVED_09][0]
322
#define[MODULE_RESERVED_10][0]
323
#define[MODULE_RESERVED_11][0]
324
 
325
#define[FWVER][0]
326
 
327
#define[PRODUCT_ID_0][0]
328
#define[PRODUCT_ID_1][0]
329
#define[PRODUCT_ID_2][0]
330
#define[PRODUCT_ID_3][0]
331
 
332
 
333
/*
334
   Identify as ZTEX USB FPGA Module 1.0
335
   Usage: IDENTITY_UFM_1_0(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
336
*/
337
#define[IDENTITY_UFM_1_0(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
338
#define[PRODUCT_ID_1][$1]
339
#define[PRODUCT_ID_2][$2]
340
#define[PRODUCT_ID_3][$3]
341
#define[FWVER][$4]
342
#define[PRODUCT_IS][UFM-1_0]
343
#define[PRODUCT_STRING]["USB-FPGA Module 1.0"]]
344
 
345
 
346
/*
347
   Identify as ZTEX USB FPGA Module 1.1
348
   Usage: IDENTITY_UFM_1_1(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
349
*/
350
#define[IDENTITY_UFM_1_1(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
351
#define[PRODUCT_ID_1][$1]
352
#define[PRODUCT_ID_2][$2]
353
#define[PRODUCT_ID_3][$3]
354
#define[FWVER][$4]
355
#define[PRODUCT_IS][UFM-1_1]
356
#define[PRODUCT_STRING]["USB-FPGA Module 1.1"]]
357
 
358
 
359
/*
360
   Identify as ZTEX USB FPGA Module 1.2
361
   Usage: IDENTITY_UFM_1_2(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
362
*/
363
#define[IDENTITY_UFM_1_2(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
364
#define[PRODUCT_ID_1][$1]
365
#define[PRODUCT_ID_2][$2]
366
#define[PRODUCT_ID_3][$3]
367
#define[FWVER][$4]
368
#define[PRODUCT_IS][UFM-1_2]
369
#define[PRODUCT_STRING]["USB-FPGA Module 1.2"]]
370
 
371
/*
372
   Identify as ZTEX USB FPGA Module 1.10
373
   Usage: IDENTITY_UFM_1_10(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
374
*/
375
#define[IDENTITY_UFM_1_10(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
376
#define[PRODUCT_ID_1][$1]
377
#define[PRODUCT_ID_2][$2]
378
#define[PRODUCT_ID_3][$3]
379
#define[FWVER][$4]
380
#define[PRODUCT_IS][UFM-1_10]
381
#define[PRODUCT_STRING]["USB-FPGA Module 1.10"]]
382
 
383
/*
384
   Identify as ZTEX USB FPGA Module 1.11
385
   Usage: IDENTITY_UFM_1_11(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
386
*/
387
#define[IDENTITY_UFM_1_11(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
388
#define[PRODUCT_ID_1][$1]
389
#define[PRODUCT_ID_2][$2]
390
#define[PRODUCT_ID_3][$3]
391
#define[FWVER][$4]
392
#define[PRODUCT_IS][UFM-1_11]
393
#define[PRODUCT_STRING]["USB-FPGA Module 1.11"]]
394
 
395
/*
396
   Identify as ZTEX USB FPGA Module 1.15
397
   Usage: IDENTITY_UFM_1_15(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
398
*/
399
#define[IDENTITY_UFM_1_15(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
400
#define[PRODUCT_ID_1][$1]
401
#define[PRODUCT_ID_2][$2]
402
#define[PRODUCT_ID_3][$3]
403
#define[FWVER][$4]
404
#define[PRODUCT_IS][UFM-1_15]
405
#define[PRODUCT_STRING]["USB-FPGA Module 1.15"]
406
#define[NUMBER_OF_FPGAS][1]]
407
 
408
/*
409
   Identify as ZTEX USB FPGA Module 1.15y
410
   Usage: IDENTITY_UFM_1_15Y(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
411
*/
412
#define[IDENTITY_UFM_1_15Y(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
413
#define[PRODUCT_ID_1][$1]
414
#define[PRODUCT_ID_2][$2]
415
#define[PRODUCT_ID_3][$3]
416
#define[FWVER][$4]
417
#define[PRODUCT_IS][UFM-1_15Y]
418
#define[PRODUCT_STRING]["USB-FPGA Module 1.15y"]
419
#define[NUMBER_OF_FPGAS][4]]
420
 
421
/*
422
   Identify as ZTEX USB FPGA Module 2.16
423
   Usage: IDENTITY_UFM_2_16(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
424
*/
425
#define[IDENTITY_UFM_2_16(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
426
#define[PRODUCT_ID_1][$1]
427
#define[PRODUCT_ID_2][$2]
428
#define[PRODUCT_ID_3][$3]
429
#define[FWVER][$4]
430
#define[PRODUCT_IS][UFM-2_16]
431
#define[PRODUCT_STRING]["USB-FPGA Module 2.16"]
432
#define[NUMBER_OF_FPGAS][1]]
433
 
434
/*
435
   Identify as ZTEX USB FPGA Module 2.13
436
   Usage: IDENTITY_UFM_2_13(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
437
*/
438
#define[IDENTITY_UFM_2_13(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
439
#define[PRODUCT_ID_1][$1]
440
#define[PRODUCT_ID_2][$2]
441
#define[PRODUCT_ID_3][$3]
442
#define[FWVER][$4]
443
#define[PRODUCT_IS][UFM-2_13]
444
#define[PRODUCT_STRING]["USB-FPGA Module 2.13"]
445
#define[NUMBER_OF_FPGAS][1]]
446
 
447
/*
448
   Identify as ZTEX USB FPGA Module 2.01
449
   Usage: IDENTITY_UFM_2_13(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
450
*/
451
#define[IDENTITY_UFM_2_01(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
452
#define[PRODUCT_ID_1][$1]
453
#define[PRODUCT_ID_2][$2]
454
#define[PRODUCT_ID_3][$3]
455
#define[FWVER][$4]
456
#define[PRODUCT_IS][UFM-2_01]
457
#define[PRODUCT_STRING]["USB-FPGA Module 2.01"]
458
#define[NUMBER_OF_FPGAS][1]]
459
 
460
/*
461
   Identify as ZTEX USB FPGA Module 2.04
462
   Usage: IDENTITY_UFM_2_13(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
463
*/
464
#define[IDENTITY_UFM_2_04(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
465
#define[PRODUCT_ID_1][$1]
466
#define[PRODUCT_ID_2][$2]
467
#define[PRODUCT_ID_3][$3]
468
#define[FWVER][$4]
469
#define[PRODUCT_IS][UFM-2_04]
470
#define[PRODUCT_STRING]["USB-FPGA Module 2.04"]
471
#define[NUMBER_OF_FPGAS][1]]
472
 
473
/*
474
   Identify as ZTEX USB Module 1.0
475
   Usage: IDENTITY_UM_1_0(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
476
*/
477
#define[IDENTITY_UM_1_0(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
478
#define[PRODUCT_ID_1][$1]
479
#define[PRODUCT_ID_2][$2]
480
#define[PRODUCT_ID_3][$3]
481
#define[FWVER][$4]
482
#define[PRODUCT_IS][UM-1_0]
483
#define[PRODUCT_STRING]["USB Module 1.0"]]
484
 
485
 
486
/*
487
   Identify as ZTEX USB XMEGA Module 1.0
488
   Usage: IDENTITY_UM_1_0(<PRODUCT_ID_0>.<PRODUCT_ID_1><PRODUCT_ID_2>.<PRODUCT_ID_3>,<FW_VERSION>);
489
*/
490
#define[IDENTITY_UXM_1_0(][.$1.$2.$3,$4);][#define[PRODUCT_ID_0][$0]
491
#define[PRODUCT_ID_1][$1]
492
#define[PRODUCT_ID_2][$2]
493
#define[PRODUCT_ID_3][$3]
494
#define[FWVER][$4]
495
#define[PRODUCT_IS][UXM-1_0]
496
#define[PRODUCT_STRING]["USB XMEGA Module 1.0"]]
497
 
498
 
499
/*
500
   This macro defines the Manufacturer string. Limited to 31 characters.
501
*/
502
#define[MANUFACTURER_STRING]["ZTEX"]
503
 
504
 
505
/*
506
   This macro defines the Product string. Limited to 31 characters.
507
*/
508
#define[PRODUCT_STRING]["USB-FPGA Module"]
509
 
510
/*
511
   This macro enables defines the Configuration string. Limited to 31 characters.
512
*/
513
#define[CONFIGURATION_STRING]["default"]
514
 
515
 
516
/*
517
   This macro disables EEPROM interface, I2C helper functions and all other I2C devices (enabled by default)
518
   Usage: DISABLE_EEPROM;
519
*/
520
#define[DISABLE_EEPROM;][#define[EEPROM_DISABLED][1]]
521
 
522
 
523
/*
524
   This macro enables the Flash interface, if available
525
   Usage: ENABLE_FLASH;
526
*/
527
#define[ENABLE_FLASH;][#define[FLASH_ENABLED][1]]
528
 
529
/*
530
   This macro enables the MMC/SD interface for 2nd Flash,
531
   see http://wiki.ztex.de/doku.php?id=en:ztex_boards:ztex_fpga_boards:flash2
532
*/
533
#define[ENABLE_FLASH2;][#define[FLASH2_ENABLED][1]]
534
 
535
/*
536
   This macro enables the FPGA configuration using a bitstream from the Flash memory
537
   Usage: ENABLE_FLASH_BITSTREAM;
538
*/
539
#define[ENABLE_FLASH_BITSTREAM;][#define[FLASH_BITSTREAM_ENABLED][1]]
540
 
541
/*
542
   This macro enables the FPGA configuration using a bitstream from the Flash memory
543
   Usage: ENABLE_FLASH_BITSTREAM;
544
*/
545
#define[ENABLE_FLASH_BITSTREAM_FORCE;][#define[FLASH_BITSTREAM_ENABLED][1]
546
#define[FLASH_BITSTREAM_FORCE_ENABLED][1]]
547
 
548
/*
549
   Define this macro to use 4k sectors instead of 64k sectors of SPI Flash, if possible
550
   This is usually much slower and only recommended if you do not use the Flash for storing the Bitstream.
551
   Usage: USE_4KSECTORS;
552
*/
553
#define[USE_4KSECTORS;][#define[USE_4KSECTORS_ENABLED][1]]
554
 
555
/*
556
   This enables the debug helper. The debug helper consists in a stack of messages which can be read out from host software.
557
   See ../examples/all/debug/Readme.
558
   Usage: ENABLE_DEBUG(<stack size>,<message_size>);
559
        <stack size>    number of messages in stack
560
        <message size>  message size in bytes
561
*/
562
#define[ENABLE_DEBUG(][,$1);][#define[DEBUG_ENABLED][1]
563
#define[DEBUG_STACK_SIZE][$0]
564
#define[DEBUG_MSG_SIZE][$1]]
565
 
566
/*
567
   This macro disables XMEGA support, if available
568
   Usage: XMEGA_DISABLE;
569
*/
570
#define[XMEGA_DISABLE;][#define[XMEGA_DISABLED][1]]
571
 
572
/*
573
   Enables support for ZTEX Experimantal Board 1.10
574
   Usage: EXTENSION_EXP_1_10;
575
*/
576
#define[EXTENSION_EXP_1_10;][#define[EXP_1_10_ENABLED][1]]
577
 
578
/*
579
   Enables high speed FPGA configuration for ZTEX USB-FPGA Module 1.15 and 1.15y
580
   Usage: ENABLE_HS_FPGA_CONF(<ENDPOINT>);
581
        <endpoint>      endpoint which shall be used (any bulk output can be used)
582
*/
583
#define[ENABLE_HS_FPGA_CONF(][);][
584
#ifeq[$0][2]
585
#elifeq[$0][4]
586
#elifeq[$0][6]
587
#elifneq[$0][8]
588
#error[ENABLE_HS_FPGA_CONF: Invalid Endpoint. Valid values are: `2', `4', `6', `8'.]
589
#endif
590
#define[HS_FPGA_CONF_EP][$0]]
591
 
592
/*
593
   This macro disables MAC EEPROM support, if available
594
   Usage: MAC_EEPROM_DISABLE;
595
*/
596
#define[DISABLE_MAC_EEPROM;][#define[EEPROM_MAC_DISABLED][1]]
597
 
598
/*
599
   Enables detection of USB-FPGA Modules 1.15x. This avoids some warnings and makes the variable is_ufm_1_15x available.
600
   Usage: ENABLE_UFM_1_15X_DETECTION;
601
*/
602
#define[ENABLE_UFM_1_15X_DETECTION;][#define[UFM_1_15X_DETECTION_ENABLED][1]]
603
 
604
/*
605
   This macro disables temperature sensor support
606
   Usage: TEMP_SENSOR_DISABLE;
607
*/
608
#define[TEMP_SENSOR_DISABLE;][#define[TEMP_SENSOR_DISABLED][1]]
609
 
610
#endif // ZTEX_CONF_H

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