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[/] [usb_fpga_2_16/] [trunk/] [include/] [ztex-flash2.h] - Blame information for rev 3

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1 2 ZTEX
/*!
2
   ZTEX Firmware Kit for EZ-USB FX2 Microcontrollers
3 3 ZTEX
   Copyright (C) 2009-2014 ZTEX GmbH.
4 2 ZTEX
   http://www.ztex.de
5
 
6
   This program is free software; you can redistribute it and/or modify
7
   it under the terms of the GNU General Public License version 3 as
8
   published by the Free Software Foundation.
9
 
10
   This program is distributed in the hope that it will be useful, but
11
   WITHOUT ANY WARRANTY; without even the implied warranty of
12
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13
   General Public License for more details.
14
 
15
   You should have received a copy of the GNU General Public License
16
   along with this program; if not, see http://www.gnu.org/licenses/.
17
!*/
18
 
19
/*
20
    Support for standard SPI flash.
21
*/
22
 
23
#ifeq[SPI_PORT][A]
24
#elifeq[SPI_PORT][B]
25
#elifeq[SPI_PORT][C]
26
#elifneq[SPI_PORT][D]
27
#error[Macro `SPI_PORT' is not defined correctly. Valid values are: `A', `B', `C' and `D'.]
28
#endif
29
 
30
#ifndef[ZTEX_FLASH1_H]
31
#define[ZTEX_FLASH1_H]
32
 
33
#define[@CAPABILITY_FLASH;]
34
 
35
#ifndef[SPI_PORT]
36
#error[SPI_PORT not defined]
37
#endif
38
 
39
#ifndef[SPI_BIT_CS]
40
#error[SPI_BIT_CS not defined]
41
#endif
42
 
43
#ifndef[SPI_BIT_DI]
44
#error[SPI_BIT_DI not defined]
45
#endif
46
 
47
#ifndef[SPI_BIT_DO]
48
#error[SPI_BIT_DO not defined]
49
#endif
50
 
51
#ifndef[SPI_BIT_CLK]
52
#error[SPI_BIT_CLK not defined]
53
#endif
54
 
55
#ifndef[SPI_DOPORT]
56
#define[SPI_OPORT][SPI_PORT]
57
#endif
58
 
59
#define[SPI_IO@][IOSPI_PORT]
60
#define[SPI_OIO@][IOSPI_OPORT]
61
 
62
#define[SPI_CS][SPI_IO@SPI_BIT_CS]
63
#define[SPI_CLK][SPI_IO@SPI_BIT_CLK]
64
#define[SPI_DI][SPI_IO@SPI_BIT_DI]
65
#define[SPI_DO][SPI_OIO@SPI_BIT_DO]
66
 
67
// may be redefined if the first sectors are reserved (e.g. for a FPGA bitstream)
68
#define[FLASH_FIRST_FREE_SECTOR][0]
69
 
70
__xdata BYTE flash_enabled;     // 0    1: enabled, 0:disabled
71
__xdata WORD flash_sector_size; // 1    sector size <sector size> = MSB==0 : flash_sector_size and 0x7fff ? 1<<(flash_sector_size and 0x7fff)
72
__xdata DWORD flash_sectors;    // 3    number of sectors
73
__xdata BYTE flash_ec;          // 7    error code
74
 
75
__xdata BYTE spi_vendor;        // 0
76
__xdata BYTE spi_device;        // 1
77
__xdata BYTE spi_memtype;       // 2
78
__xdata BYTE spi_erase_cmd;     // 3
79
__xdata BYTE spi_last_cmd;      // 4
80
__xdata BYTE spi_buffer[4];     // 5
81
 
82
__xdata WORD spi_write_addr_hi;
83
__xdata BYTE spi_write_addr_lo;
84
__xdata BYTE spi_need_pp;
85
__xdata WORD spi_write_sector;
86
__xdata BYTE ep0_read_mode;
87
__xdata BYTE ep0_write_mode;
88
 
89
#define[FLASH_EC_TIMEOUT][2]
90
#define[FLASH_EC_BUSY][3]
91
#define[FLASH_EC_PENDING][4]
92
#define[FLASH_EC_NOTSUPPORTED][7]
93
 
94
/* *********************************************************************
95
   ***** spi_clocks ****************************************************
96
   ********************************************************************* */
97
// perform c (256 if c=0) clocks
98
void spi_clocks (BYTE c) {
99
        c;                                      // this avoids stupid warnings
100
__asm
101
        mov     r2,dpl
102
010014$:
103
        setb    _SPI_CLK        // 1
104
        nop                     // 1
105
        nop                     // 1
106
        nop                     // 1
107
        clr     _SPI_CLK        // 1
108
        djnz    r2,010014$      // 3
109
__endasm;
110
}
111
 
112
 
113
/* *********************************************************************
114
   ***** flash_read_byte ***********************************************
115
   ********************************************************************* */
116
// read a single byte from the flash
117
BYTE flash_read_byte() { // uses r2,r3,r4
118
__asm
119
        // 8*7 + 6 = 62 clocks 
120
        mov     c,_SPI_DO       // 7
121
        setb    _SPI_CLK
122
        rlc     a
123
        clr     _SPI_CLK
124
 
125
        mov     c,_SPI_DO       // 6
126
        setb    _SPI_CLK
127
        rlc     a
128
        clr     _SPI_CLK
129
 
130
        mov     c,_SPI_DO       // 5
131
        setb    _SPI_CLK
132
        rlc     a
133
        clr     _SPI_CLK
134
 
135
        mov     c,_SPI_DO       // 4
136
        setb    _SPI_CLK
137
        rlc     a
138
        clr     _SPI_CLK
139
 
140
        mov     c,_SPI_DO       // 3
141
        setb    _SPI_CLK
142
        rlc     a
143
        clr     _SPI_CLK
144
 
145
        mov     c,_SPI_DO       // 2
146
        setb    _SPI_CLK
147
        rlc     a
148
        clr     _SPI_CLK
149
 
150
        mov     c,_SPI_DO       // 1
151
        setb    _SPI_CLK
152
        rlc     a
153
        clr     _SPI_CLK
154
 
155
        mov     c,_SPI_DO       // 0
156
        setb    _SPI_CLK
157
        rlc     a
158
        clr     _SPI_CLK
159
        mov     dpl,a
160
        ret
161
__endasm;
162
        return 0;                // never ever called (just to avoid warnings)
163
}
164
 
165
/* *********************************************************************
166
   ***** flash_read ****************************************************
167
   ********************************************************************* */
168
// read len (256 if len=0) bytes from the flash to the buffer
169
void flash_read(__xdata BYTE *buf, BYTE len) {
170
        *buf;                                   // this avoids stupid warnings
171
        len;                                    // this too
172
__asm                                           // *buf is in dptr, len is in _flash_read_PARM_2
173
        mov     r2,_flash_read_PARM_2
174
010012$:
175
        // 2 + len*(8*7 + 9) + 4 = 6 + len*65 clocks
176
        mov     c,_SPI_DO       // 7
177
        setb    _SPI_CLK
178
        rlc     a
179
        clr     _SPI_CLK
180
 
181
        mov     c,_SPI_DO       // 6
182
        setb    _SPI_CLK
183
        rlc     a
184
        clr     _SPI_CLK
185
 
186
        mov     c,_SPI_DO       // 5
187
        setb    _SPI_CLK
188
        rlc     a
189
        clr     _SPI_CLK
190
 
191
        mov     c,_SPI_DO       // 4
192
        setb    _SPI_CLK
193
        rlc     a
194
        clr     _SPI_CLK
195
 
196
        mov     c,_SPI_DO       // 3
197
        setb    _SPI_CLK
198
        rlc     a
199
        clr     _SPI_CLK
200
 
201
        mov     c,_SPI_DO       // 2
202
        setb    _SPI_CLK
203
        rlc     a
204
        clr     _SPI_CLK
205
 
206
        mov     c,_SPI_DO       // 1
207
        setb    _SPI_CLK
208
        rlc     a
209
        clr     _SPI_CLK
210
 
211
        mov     c,_SPI_DO       // 0
212
        setb    _SPI_CLK
213
        rlc     a
214
        clr     _SPI_CLK
215
 
216
        movx    @dptr,a
217
        inc     dptr
218
        djnz    r2,010012$
219
__endasm;
220
}
221
 
222
/* *********************************************************************
223
   ***** spi_write_byte ************************************************
224
   ********************************************************************* */
225
// send one bytes from buffer buf to the card
226
void spi_write_byte (BYTE b) {  // b is in dpl
227
        b;                              // this avoids stupid warnings
228
__asm
229
        // 3 + 8*7 + 4 = 63 clocks 
230
        mov     a,dpl
231
        rlc     a               // 7
232
 
233
        mov     _SPI_DI,c
234
        setb    _SPI_CLK
235
        rlc     a               // 6
236
        clr     _SPI_CLK
237
 
238
        mov     _SPI_DI,c
239
        setb    _SPI_CLK
240
        rlc     a               // 5
241
        clr     _SPI_CLK
242
 
243
        mov     _SPI_DI,c
244
        setb    _SPI_CLK
245
        rlc     a               // 4
246
        clr     _SPI_CLK
247
 
248
        mov     _SPI_DI,c
249
        setb    _SPI_CLK
250
        rlc     a               // 3
251
        clr     _SPI_CLK
252
 
253
        mov     _SPI_DI,c
254
        setb    _SPI_CLK
255
        rlc     a               // 2
256
        clr     _SPI_CLK
257
 
258
        mov     _SPI_DI,c
259
        setb    _SPI_CLK
260
        rlc     a               // 1
261
        clr     _SPI_CLK
262
 
263
        mov     _SPI_DI,c
264
        setb    _SPI_CLK
265
        rlc     a               // 0
266
        clr     _SPI_CLK
267
 
268
        mov     _SPI_DI,c
269
        setb    _SPI_CLK
270
        nop
271
        clr     _SPI_CLK
272
__endasm;
273
}
274
 
275
/* *********************************************************************
276
   ***** spi_write *****************************************************
277
   ********************************************************************* */
278
// write len (256 if len=0) bytes from the buffer to the flash
279
void spi_write(__xdata BYTE *buf, BYTE len) {
280
        *buf;                                   // this avoids stupid warnings
281
        len;                                    // this too
282
__asm                                           // *buf is in dptr, len is in _flash_read_PARM_2
283
        mov     r2,_flash_read_PARM_2
284
010013$:
285
        // 2 + len*(3 + 8*7 - 1 + 7 ) + 4 = 6 + len*65 clocks
286
        movx    a,@dptr
287
        rlc     a               // 7
288
 
289
        mov     _SPI_DI,c
290
        setb    _SPI_CLK
291
        rlc     a               // 6
292
        clr     _SPI_CLK
293
 
294
        mov     _SPI_DI,c
295
        setb    _SPI_CLK
296
        rlc     a               // 5
297
        clr     _SPI_CLK
298
 
299
        mov     _SPI_DI,c
300
        setb    _SPI_CLK
301
        rlc     a               // 4
302
        clr     _SPI_CLK
303
 
304
        mov     _SPI_DI,c
305
        setb    _SPI_CLK
306
        rlc     a               // 3
307
        clr     _SPI_CLK
308
 
309
        mov     _SPI_DI,c
310
        setb    _SPI_CLK
311
        rlc     a               // 2
312
        clr     _SPI_CLK
313
 
314
        mov     _SPI_DI,c
315
        setb    _SPI_CLK
316
        rlc     a               // 1
317
        clr     _SPI_CLK
318
 
319
        mov     _SPI_DI,c
320
        setb    _SPI_CLK
321
        rlc     a               // 0
322
        clr     _SPI_CLK
323
 
324
        mov     _SPI_DI,c
325
        setb    _SPI_CLK
326
        inc     dptr
327
        clr     _SPI_CLK
328
 
329
        djnz    r2,010013$
330
__endasm;
331
}
332
 
333
/* *********************************************************************
334
   ***** spi_select ****************************************************
335
   ********************************************************************* */
336
/*
337
   select the flash (CS)
338
*/
339
void spi_select() {
340
    SPI_CS = 1;                                 // CS = 1;
341
    spi_clocks(8);                              // 8 dummy clocks to finish a previous command
342
    SPI_CS = 0;
343
}
344
 
345
/* *********************************************************************
346
   ***** spi_deselect **************************************************
347
   ********************************************************************* */
348
// de-select the flash (CS)
349
void spi_deselect() {
350
    SPI_CS = 1;                                 // CS = 1;
351
    spi_clocks(8);                              // 8 dummy clocks to finish a previous command
352
}
353
 
354
/* *********************************************************************
355
   ***** spi_start_cmd *************************************************
356
   ********************************************************************* */
357
// send a command   
358
#define[spi_start_cmd(][);][{                   // send a command, argument=0
359
    spi_last_cmd = $0;
360
    spi_select();                               // select
361
    spi_write_byte($0);                          // CMD 90h
362
}]
363
 
364
/* *********************************************************************
365
   ***** spi_wait ******************************************************
366
   ********************************************************************* */
367
/*
368
   wait if prvious read/write command is still prcessed
369
   result is flash_ec (FLASH_EC_TIMEOUT or 0)
370
*/
371
BYTE spi_wait() {
372
    WORD i;
373
    // wait up to 11s
374
    spi_start_cmd(0x05);
375
    for (i=0; (flash_read_byte() & bmBIT0) && i<65535; i++ ) {
376
        spi_clocks(0);                           // 256 dummy clocks
377
//      uwait(20);
378
    }
379
    flash_ec = flash_read_byte() & bmBIT0 ? FLASH_EC_TIMEOUT : 0;
380
    spi_deselect();
381
    return flash_ec;
382
}
383
 
384
/* *********************************************************************
385
   ***** flash_read_init ***********************************************
386
   ********************************************************************* */
387
/*
388
   Start the initialization sequence for reading sector s.
389
   returns an error code (FLASH_EC_*). 0 means no error.
390
*/
391
BYTE flash_read_init(WORD s) {
392
    if ( (SPI_CS) == 0 ) {
393
        flash_ec = FLASH_EC_PENDING;
394
        return FLASH_EC_PENDING;                // we interrupted a pending Flash operation
395
    }
396
    if ( spi_wait() ) {
397
        return flash_ec;
398
    }
399
 
400
    s = s << ((BYTE)flash_sector_size - 8);
401
    spi_start_cmd(0x0b);                        // read command
402
    spi_write_byte(s >> 8);                     // 24 byte address
403
    spi_write_byte(s & 255);
404
    spi_write_byte(0);
405
    spi_clocks(8);                              // 8 dummy clocks
406
    return 0;
407
}
408
 
409
/* *********************************************************************
410
   ***** flash_read_next ***********************************************
411
   ********************************************************************* */
412
/*
413
   dummy function for compatibilty
414
*/
415
BYTE flash_read_next() {
416
    return 0;
417
}
418
 
419
 
420
/* *********************************************************************
421
   ***** flash_read_finish *********************************************
422
   ********************************************************************* */
423
/*
424
    Runs the finalization sequence for the read operation.
425
*/
426
void flash_read_finish(WORD n) {
427
   n;                                   // avoids warnings
428
   spi_deselect();
429
}
430
 
431
 
432
/* *********************************************************************
433
   ***** spi_pp ********************************************************
434
   ********************************************************************* */
435
BYTE spi_pp () {
436
    spi_deselect();                             // finish previous write cmd
437
 
438
    spi_need_pp = 0;
439
 
440
    if ( spi_wait() ) {
441
        return flash_ec;
442
    }
443
    spi_start_cmd(0x06);                        // write enable command
444
    spi_deselect();
445
 
446
    spi_start_cmd(0x02);                        // page write
447
    spi_write_byte(spi_write_addr_hi >> 8);     // 24 byte address
448
    spi_write_byte(spi_write_addr_hi & 255);
449
    spi_write_byte(0);
450
    return 0;
451
}
452
 
453
 
454
/* *********************************************************************
455
   ***** flash_write_byte **********************************************
456
   ********************************************************************* */
457
BYTE flash_write_byte (BYTE b) {
458
    if ( spi_need_pp && spi_pp() ) return flash_ec;
459
    spi_write_byte(b);
460
    spi_write_addr_lo++;
461
    if ( spi_write_addr_lo == 0 ) {
462
        spi_write_addr_hi++;
463
        spi_deselect();                         // finish write cmd
464
        spi_need_pp = 1;
465
    }
466
    return 0;
467
}
468
 
469
 
470
/* *********************************************************************
471
   ***** flash_write ***************************************************
472
   ********************************************************************* */
473
// write len (256 if len=0) bytes from the buffer to the flash
474
BYTE flash_write(__xdata BYTE *buf, BYTE len) {
475
    BYTE b;
476
    if ( spi_need_pp && spi_pp() ) return flash_ec;
477
 
478
    if ( spi_write_addr_lo == 0 ) {
479
        spi_write(buf,len);
480
    }
481
    else {
482
        b = (~spi_write_addr_lo) + 1;
483
        if ( len==0 || len>b ) {
484
            spi_write(buf,b);
485
            len-=b;
486
            spi_write_addr_hi++;
487
            spi_write_addr_lo=0;
488
            buf+=b;
489
            if ( spi_pp() ) return flash_ec;
490
        }
491
        spi_write(buf,len);
492
    }
493
 
494
    spi_write_addr_lo+=len;
495
 
496
    if ( spi_write_addr_lo == 0 ) {
497
        spi_write_addr_hi++;
498
        spi_deselect();                         // finish write cmd
499
        spi_need_pp = 1;
500
    }
501
 
502
    return 0;
503
}
504
 
505
 
506
/* *********************************************************************
507
   ***** flash_write_init **********************************************
508
   ********************************************************************* */
509
/*
510
   Start the initialization sequence for writing sector s
511
   The whole sector will be modified
512
   returns an error code (FLASH_EC_*). 0 means no error.
513
*/
514
BYTE flash_write_init(WORD s) {
515
    if ( !SPI_CS ) {
516
        flash_ec = FLASH_EC_PENDING;
517
        return FLASH_EC_PENDING;                // we interrupted a pending Flash operation
518
    }
519
    if ( spi_wait() ) {
520
        return flash_ec;
521
    }
522
    spi_write_sector = s;
523
    s = s << ((BYTE)flash_sector_size - 8);
524
    spi_write_addr_hi = s;
525
    spi_write_addr_lo = 0;
526
 
527
    spi_start_cmd(0x06);                        // write enable command
528
    spi_deselect();
529
 
530
    spi_start_cmd(spi_erase_cmd);               // erase command
531
    spi_write_byte(s >> 8);                     // 24 byte address
532
    spi_write_byte(s & 255);
533
    spi_write_byte(0);
534
    spi_deselect();
535
 
536
    spi_need_pp = 1;
537
    return 0;
538
}
539
 
540
 
541
/* *********************************************************************
542
   ***** flash_write_finish_sector *************************************
543
   ********************************************************************* */
544
/*
545
   Dummy function for compatibilty.
546
*/
547
BYTE flash_write_finish_sector (WORD n) {
548
    n;
549
    spi_deselect();
550
    return 0;
551
}
552
 
553
 
554
/* *********************************************************************
555
   ***** flash_write_finish ********************************************
556
   ********************************************************************* */
557
/*
558
   Dummy function for compatibilty.
559
*/
560
void flash_write_finish () {
561
    spi_deselect();
562
}
563
 
564
 
565
/* *********************************************************************
566
   ***** flash_write_next **********************************************
567
   ********************************************************************* */
568
/*
569
   Prepare the next sector for writing, see flash_write_finish1.
570
*/
571
BYTE flash_write_next () {
572
    spi_deselect();
573
    return flash_write_init(spi_write_sector+1);
574
}
575
 
576
 
577
/* *********************************************************************
578
   ***** flash_init ****************************************************
579
   ********************************************************************* */
580
// init the flash
581
void flash_init() {
582
    BYTE i;
583
 
584
    PORTCCFG = 0;
585
 
586
    flash_enabled = 1;
587
    flash_ec = 0;
588
    flash_sector_size = 0x8010;  // 64 KByte
589
    spi_erase_cmd = 0xd8;
590
 
591
    OESPI_OPORT &= ~bmBITSPI_BIT_DO;
592
    OESPI_PORT |= bmBITSPI_BIT_CS | bmBITSPI_BIT_DI | bmBITSPI_BIT_CLK;
593
    SPI_CS = 1;
594
    spi_clocks(0);                               // 256 clocks
595
 
596
    spi_start_cmd(0x90);                        // CMD 90h, not supported by all chips
597
    spi_clocks(24);                             // ADDR=0
598
    spi_device = flash_read_byte();
599
    spi_deselect();                             // deselect
600
 
601
    spi_start_cmd(0x9F);                        // CMD 9Fh
602
    flash_read(spi_buffer,3);                   // read data
603
    spi_deselect();                             // deselect
604
    if ( spi_buffer[2]<16 || spi_buffer[2]>24 ) {
605
        goto  disable;
606
    }
607
    spi_vendor = spi_buffer[0];
608
    spi_memtype = spi_buffer[1];
609
 
610
#ifeq[USE_4KSECTORS_ENABLED][1]
611
    if ( ( spi_vendor==1 && spi_memtype == 0x40 ) ||
612
         ( spi_vendor==0x20 && spi_memtype == 0xba )
613
       ) {
614
        // support of uniform 4 kbyte (logical) sectors
615
        flash_sector_size = 0x800C;  // 4 KByte
616
        spi_erase_cmd = 0x20;
617
        i=spi_buffer[2]-12;
618
    }
619
    else {
620
        // support of uniform 64 kbyte (logical) sectors
621
        i=spi_buffer[2]-16;
622
    }
623
#else    
624
    i=spi_buffer[2]-16;
625
#endif    
626
    flash_sectors = 1 << i;
627
 
628
    return;
629
 
630
disable:
631
    flash_enabled = 0;
632
    flash_ec = FLASH_EC_NOTSUPPORTED;
633
    OESPI_PORT &= ~( bmBITSPI_BIT_CS | bmBITSPI_BIT_DI | bmBITSPI_BIT_CLK );
634
}
635
 
636
 
637
/* *********************************************************************
638
   ***** EP0 vendor request 0x40 ***************************************
639
   ********************************************************************* */
640
// send flash information structure (card size, error status,  ...) to the host
641
ADD_EP0_VENDOR_REQUEST((0x40,,
642
    if ( flash_ec == 0 && SPI_CS == 0 ) {
643
        flash_ec = FLASH_EC_PENDING;
644
    }
645
    MEM_COPY1(flash_enabled,EP0BUF,8);
646
    EP0BCH = 0;
647
    EP0BCL = 8;
648
,,
649
));;
650
 
651
/* *********************************************************************
652
   ***** EP0 vendor request 0x41 ***************************************
653
   ********************************************************************* */
654
/* read modes (ep0_read_mode)
655
        0: start read
656
        1: continue read
657
        2: finish read
658
*/
659
void spi_read_ep0 () {
660
    flash_read(EP0BUF, ep0_payload_transfer);
661
    if ( ep0_read_mode==2 && ep0_payload_remaining==0 ) {
662
        spi_deselect();
663
    }
664
}
665
 
666
ADD_EP0_VENDOR_REQUEST((0x41,,                  // read data
667
    ep0_read_mode = SETUPDAT[5];
668
    if ( (ep0_read_mode==0) && flash_read_init((SETUPDAT[3] << 8) | SETUPDAT[2]) ) {
669
        EP0_STALL;
670
    }
671
    spi_read_ep0();
672
    EP0BCH = 0;
673
    EP0BCL = ep0_payload_transfer;
674
,,
675
    if ( ep0_payload_transfer != 0 ) {
676
        flash_ec = 0;
677
        spi_read_ep0();
678
    }
679
    EP0BCH = 0;
680
    EP0BCL = ep0_payload_transfer;
681
));;
682
 
683
/* *********************************************************************
684
   ***** EP0 vendor command 0x42 ***************************************
685
   ********************************************************************* */
686
void spi_send_ep0 () {
687
    flash_write(EP0BUF, ep0_payload_transfer);
688
    if ( ep0_write_mode==2 && ep0_payload_remaining==0 ) {
689
        spi_deselect();
690
    }
691
}
692
 
693
ADD_EP0_VENDOR_COMMAND((0x42,,                  // write integer number of sectors
694
    ep0_write_mode = SETUPDAT[5];
695
    if ( (ep0_write_mode == 0) && flash_write_init((SETUPDAT[3] << 8) | SETUPDAT[2]) ) {
696
        EP0_STALL;
697
    }
698
,,
699
    if ( ep0_payload_transfer != 0 ) {
700
        flash_ec = 0;
701
        spi_send_ep0();
702
        if ( flash_ec != 0 ) {
703
            spi_deselect();
704
            EP0_STALL;
705
        }
706
    }
707
));;
708
 
709
/* *********************************************************************
710
   ***** EP0 vendor request 0x43 ***************************************
711
   ********************************************************************* */
712
// send detailed SPI status plus debug information
713
ADD_EP0_VENDOR_REQUEST((0x43,,
714
    MEM_COPY1(flash_ec,EP0BUF,10);
715
    EP0BCH = 0;
716
    EP0BCL = 10;
717
,,
718
));;
719
 
720
#endif  /*ZTEX_FLASH1_H*/

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