URL https://opencores.org/ocsvn/usb_nand_reader/usb_nand_reader/trunk

Subversion Repositories usb_nand_reader

[/] [usb_nand_reader/] [trunk/] [mini32/] [CMD_ReadPage.asm] - Blame information for rev 7

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_cmd_chip_read_page:
;CMD_ReadPage.c,5 ::            void cmd_chip_read_page(unsigned char* inBuffer, unsigned char* outBuffer, int len, int addressCycles)
ADDIU   SP, SP, -24
SW      RA, 0(SP)
;CMD_ReadPage.c,7 ::            nand_send_command(NC_READ_MODE);
SW      R25, 4(SP)
SH      R28, 8(SP)
SH      R27, 10(SP)
SW      R26, 12(SP)
SW      R25, 16(SP)
MOVZ    R25, R0, R0
JAL     _nand_send_command+0
NOP
LW      R25, 16(SP)
LW      R26, 12(SP)
LH      R27, 10(SP)
LH      R28, 8(SP)
;CMD_ReadPage.c,8 ::            nand_send_address(inBuffer + 1, addressCycles);
ADDIU   R2, R25, 1
SH      R27, 8(SP)
SW      R26, 12(SP)
SEH     R26, R28
MOVZ    R25, R2, R0
JAL     _nand_send_address+0
NOP
;CMD_ReadPage.c,9 ::            nand_send_command(NC_READ_PAGE);
ORI     R25, R0, 48
JAL     _nand_send_command+0
NOP
;CMD_ReadPage.c,10 ::           do_delay(5);
ORI     R25, R0, 5
JAL     _do_delay+0
NOP
LW      R26, 12(SP)
LH      R27, 8(SP)
;CMD_ReadPage.c,11 ::           while(!nand_is_ready());
L_cmd_chip_read_page0:
SH      R28, 8(SP)
SH      R27, 10(SP)
SW      R26, 12(SP)
SW      R25, 16(SP)
JAL     _nand_is_ready+0
NOP
LW      R25, 16(SP)
LW      R26, 12(SP)
LH      R27, 10(SP)
LH      R28, 8(SP)
BEQ     R2, R0, L__cmd_chip_read_page17
NOP
J       L_cmd_chip_read_page1
NOP
L__cmd_chip_read_page17:
J       L_cmd_chip_read_page0
NOP
L_cmd_chip_read_page1:
;CMD_ReadPage.c,16 ::           for(i = 0; i < len; i += 64)
SH      R0, 20(SP)
L_cmd_chip_read_page2:
SEH     R3, R27
LH      R2, 20(SP)
SLT     R2, R2, R3
BNE     R2, R0, L__cmd_chip_read_page18
NOP
J       L_cmd_chip_read_page3
NOP
L__cmd_chip_read_page18:
;CMD_ReadPage.c,18 ::           nand_read(outBuffer, 64);
SH      R28, 8(SP)
SH      R27, 10(SP)
SW      R26, 12(SP)
SW      R25, 16(SP)
MOVZ    R25, R26, R0
ORI     R26, R0, 64
JAL     _nand_read+0
NOP
LW      R25, 16(SP)
LW      R26, 12(SP)
LH      R27, 10(SP)
LH      R28, 8(SP)
;CMD_ReadPage.c,20 ::           while(0 == HID_Write(outBuffer, 64))
L_cmd_chip_read_page5:
SH      R28, 8(SP)
SH      R27, 10(SP)
SW      R26, 12(SP)
SW      R25, 16(SP)
MOVZ    R25, R26, R0
ORI     R26, R0, 64
JAL     _HID_Write+0
NOP
LW      R25, 16(SP)
LW      R26, 12(SP)
LH      R27, 10(SP)
LH      R28, 8(SP)
ANDI    R2, R2, 255
BEQ     R2, R0, L__cmd_chip_read_page19
NOP
J       L_cmd_chip_read_page6
NOP
L__cmd_chip_read_page19:
;CMD_ReadPage.c,21 ::           USB_Break();
JAL     _USB_Break+0
NOP
J       L_cmd_chip_read_page5
NOP
L_cmd_chip_read_page6:
;CMD_ReadPage.c,16 ::           for(i = 0; i < len; i += 64)
LH      R2, 20(SP)
ADDIU   R2, R2, 64
SH      R2, 20(SP)
;CMD_ReadPage.c,22 ::           }
J       L_cmd_chip_read_page2
NOP
L_cmd_chip_read_page3:
;CMD_ReadPage.c,24 ::           }
L_end_cmd_chip_read_page:
LW      R25, 4(SP)
LW      RA, 0(SP)
ADDIU   SP, SP, 24
JR      RA
NOP
; end of _cmd_chip_read_page
_cmd_chip_read_page_cache_sequential:
;CMD_ReadPage.c,32 ::           void cmd_chip_read_page_cache_sequential(unsigned char* inBuffer, unsigned char* outBuffer, int len, int addressCycles)
ADDIU   SP, SP, -24
SW      RA, 0(SP)
;CMD_ReadPage.c,34 ::           int i = 0;
SW      R25, 4(SP)
;CMD_ReadPage.c,35 ::           int j = *(int*)(inBuffer + 6);
ADDIU   R2, R25, 6
LH      R2, 0(R2)
SH      R2, 20(SP)
;CMD_ReadPage.c,37 ::           nand_send_command(NC_READ_MODE);
SH      R28, 8(SP)
SH      R27, 10(SP)
SW      R26, 12(SP)
SW      R25, 16(SP)
MOVZ    R25, R0, R0
JAL     _nand_send_command+0
NOP
LW      R25, 16(SP)
LW      R26, 12(SP)
LH      R27, 10(SP)
LH      R28, 8(SP)
;CMD_ReadPage.c,38 ::           nand_send_address(inBuffer + 1, addressCycles);
ADDIU   R2, R25, 1
SH      R27, 8(SP)
SW      R26, 12(SP)
SEH     R26, R28
MOVZ    R25, R2, R0
JAL     _nand_send_address+0
NOP
;CMD_ReadPage.c,39 ::           nand_send_command(NC_READ_PAGE);
ORI     R25, R0, 48
JAL     _nand_send_command+0
NOP
;CMD_ReadPage.c,40 ::           do_delay(5);
ORI     R25, R0, 5
JAL     _do_delay+0
NOP
;CMD_ReadPage.c,41 ::           nand_wait_ready();
JAL     _nand_wait_ready+0
NOP
LW      R26, 12(SP)
LH      R27, 8(SP)
;CMD_ReadPage.c,42 ::           while(j > 0)
L_cmd_chip_read_page_cache_sequential7:
LH      R2, 20(SP)
SLTI    R2, R2, 1
BEQ     R2, R0, L__cmd_chip_read_page_cache_sequential21
NOP
J       L_cmd_chip_read_page_cache_sequential8
NOP
L__cmd_chip_read_page_cache_sequential21:
;CMD_ReadPage.c,44 ::           nand_send_command( (j > 1)? NC_READ_PAGE_CACHE_SEQ : NC_READ_PAGE_CACHE_LAST);
LH      R2, 20(SP)
SLTI    R2, R2, 2
BEQ     R2, R0, L__cmd_chip_read_page_cache_sequential22
NOP
J       L_cmd_chip_read_page_cache_sequential9
NOP
L__cmd_chip_read_page_cache_sequential22:
; ?FLOC___cmd_chip_read_page_cache_sequential?T14 start address is: 8 (R2)
ORI     R2, R0, 49
; ?FLOC___cmd_chip_read_page_cache_sequential?T14 end address is: 8 (R2)
J       L_cmd_chip_read_page_cache_sequential10
NOP
L_cmd_chip_read_page_cache_sequential9:
; ?FLOC___cmd_chip_read_page_cache_sequential?T14 start address is: 8 (R2)
ORI     R2, R0, 63
; ?FLOC___cmd_chip_read_page_cache_sequential?T14 end address is: 8 (R2)
L_cmd_chip_read_page_cache_sequential10:
; ?FLOC___cmd_chip_read_page_cache_sequential?T14 start address is: 8 (R2)
SH      R28, 8(SP)
; ?FLOC___cmd_chip_read_page_cache_sequential?T14 end address is: 8 (R2)
SH      R27, 10(SP)
SW      R26, 12(SP)
SW      R25, 16(SP)
SEB     R25, R2
JAL     _nand_send_command+0
NOP
;CMD_ReadPage.c,45 ::           j--;
LH      R2, 20(SP)
ADDIU   R2, R2, -1
SH      R2, 20(SP)
;CMD_ReadPage.c,47 ::           nand_wait_ready();
JAL     _nand_wait_ready+0
NOP
LW      R25, 16(SP)
LW      R26, 12(SP)
LH      R27, 10(SP)
LH      R28, 8(SP)
;CMD_ReadPage.c,49 ::           for(i = 0; i < len; i += 64)
SH      R0, 22(SP)
L_cmd_chip_read_page_cache_sequential11:
SEH     R3, R27
LH      R2, 22(SP)
SLT     R2, R2, R3
BNE     R2, R0, L__cmd_chip_read_page_cache_sequential23
NOP
J       L_cmd_chip_read_page_cache_sequential12
NOP
L__cmd_chip_read_page_cache_sequential23:
;CMD_ReadPage.c,51 ::           nand_read(outBuffer, 64);
SH      R28, 8(SP)
SH      R27, 10(SP)
SW      R26, 12(SP)
SW      R25, 16(SP)
MOVZ    R25, R26, R0
ORI     R26, R0, 64
JAL     _nand_read+0
NOP
LW      R25, 16(SP)
LW      R26, 12(SP)
LH      R27, 10(SP)
LH      R28, 8(SP)
;CMD_ReadPage.c,52 ::           while(!HID_Write(outBuffer, 64));
L_cmd_chip_read_page_cache_sequential14:
SH      R28, 8(SP)
SH      R27, 10(SP)
SW      R26, 12(SP)
SW      R25, 16(SP)
MOVZ    R25, R26, R0
ORI     R26, R0, 64
JAL     _HID_Write+0
NOP
LW      R25, 16(SP)
LW      R26, 12(SP)
LH      R27, 10(SP)
LH      R28, 8(SP)
BEQ     R2, R0, L__cmd_chip_read_page_cache_sequential24
NOP
J       L_cmd_chip_read_page_cache_sequential15
NOP
L__cmd_chip_read_page_cache_sequential24:
J       L_cmd_chip_read_page_cache_sequential14
NOP
L_cmd_chip_read_page_cache_sequential15:
;CMD_ReadPage.c,53 ::           USB_Break();
JAL     _USB_Break+0
NOP
;CMD_ReadPage.c,49 ::           for(i = 0; i < len; i += 64)
LH      R2, 22(SP)
ADDIU   R2, R2, 64
SH      R2, 22(SP)
;CMD_ReadPage.c,55 ::           }
J       L_cmd_chip_read_page_cache_sequential11
NOP
L_cmd_chip_read_page_cache_sequential12:
;CMD_ReadPage.c,56 ::           }
J       L_cmd_chip_read_page_cache_sequential7
NOP
L_cmd_chip_read_page_cache_sequential8:
;CMD_ReadPage.c,57 ::           }
L_end_cmd_chip_read_page_cache_sequential:
LW      R25, 4(SP)
LW      RA, 0(SP)
ADDIU   SP, SP, 24
JR      RA
NOP
; end of _cmd_chip_read_page_cache_sequential

Line No.	Rev	Author	Line
1	7	pradd	`_cmd_chip_read_page:`
2			`;CMD_ReadPage.c,5 :: void cmd_chip_read_page(unsigned char* inBuffer, unsigned char* outBuffer, int len, int addressCycles)`
3			`ADDIU SP, SP, -24`
4			`SW RA, 0(SP)`
5			`;CMD_ReadPage.c,7 :: nand_send_command(NC_READ_MODE);`
6			`SW R25, 4(SP)`
7			`SH R28, 8(SP)`
8			`SH R27, 10(SP)`
9			`SW R26, 12(SP)`
10			`SW R25, 16(SP)`
11			`MOVZ R25, R0, R0`
12			`JAL _nand_send_command+0`
13			`NOP`
14			`LW R25, 16(SP)`
15			`LW R26, 12(SP)`
16			`LH R27, 10(SP)`
17			`LH R28, 8(SP)`
18			`;CMD_ReadPage.c,8 :: nand_send_address(inBuffer + 1, addressCycles);`
19			`ADDIU R2, R25, 1`
20			`SH R27, 8(SP)`
21			`SW R26, 12(SP)`
22			`SEH R26, R28`
23			`MOVZ R25, R2, R0`
24			`JAL _nand_send_address+0`
25			`NOP`
26			`;CMD_ReadPage.c,9 :: nand_send_command(NC_READ_PAGE);`
27			`ORI R25, R0, 48`
28			`JAL _nand_send_command+0`
29			`NOP`
30			`;CMD_ReadPage.c,10 :: do_delay(5);`
31			`ORI R25, R0, 5`
32			`JAL _do_delay+0`
33			`NOP`
34			`LW R26, 12(SP)`
35			`LH R27, 8(SP)`
36			`;CMD_ReadPage.c,11 :: while(!nand_is_ready());`
37			`L_cmd_chip_read_page0:`
38			`SH R28, 8(SP)`
39			`SH R27, 10(SP)`
40			`SW R26, 12(SP)`
41			`SW R25, 16(SP)`
42			`JAL _nand_is_ready+0`
43			`NOP`
44			`LW R25, 16(SP)`
45			`LW R26, 12(SP)`
46			`LH R27, 10(SP)`
47			`LH R28, 8(SP)`
48			`BEQ R2, R0, L__cmd_chip_read_page17`
49			`NOP`
50			`J L_cmd_chip_read_page1`
51			`NOP`
52			`L__cmd_chip_read_page17:`
53			`J L_cmd_chip_read_page0`
54			`NOP`
55			`L_cmd_chip_read_page1:`
56			`;CMD_ReadPage.c,16 :: for(i = 0; i < len; i += 64)`
57			`SH R0, 20(SP)`
58			`L_cmd_chip_read_page2:`
59			`SEH R3, R27`
60			`LH R2, 20(SP)`
61			`SLT R2, R2, R3`
62			`BNE R2, R0, L__cmd_chip_read_page18`
63			`NOP`
64			`J L_cmd_chip_read_page3`
65			`NOP`
66			`L__cmd_chip_read_page18:`
67			`;CMD_ReadPage.c,18 :: nand_read(outBuffer, 64);`
68			`SH R28, 8(SP)`
69			`SH R27, 10(SP)`
70			`SW R26, 12(SP)`
71			`SW R25, 16(SP)`
72			`MOVZ R25, R26, R0`
73			`ORI R26, R0, 64`
74			`JAL _nand_read+0`
75			`NOP`
76			`LW R25, 16(SP)`
77			`LW R26, 12(SP)`
78			`LH R27, 10(SP)`
79			`LH R28, 8(SP)`
80			`;CMD_ReadPage.c,20 :: while(0 == HID_Write(outBuffer, 64))`
81			`L_cmd_chip_read_page5:`
82			`SH R28, 8(SP)`
83			`SH R27, 10(SP)`
84			`SW R26, 12(SP)`
85			`SW R25, 16(SP)`
86			`MOVZ R25, R26, R0`
87			`ORI R26, R0, 64`
88			`JAL _HID_Write+0`
89			`NOP`
90			`LW R25, 16(SP)`
91			`LW R26, 12(SP)`
92			`LH R27, 10(SP)`
93			`LH R28, 8(SP)`
94			`ANDI R2, R2, 255`
95			`BEQ R2, R0, L__cmd_chip_read_page19`
96			`NOP`
97			`J L_cmd_chip_read_page6`
98			`NOP`
99			`L__cmd_chip_read_page19:`
100			`;CMD_ReadPage.c,21 :: USB_Break();`
101			`JAL _USB_Break+0`
102			`NOP`
103			`J L_cmd_chip_read_page5`
104			`NOP`
105			`L_cmd_chip_read_page6:`
106			`;CMD_ReadPage.c,16 :: for(i = 0; i < len; i += 64)`
107			`LH R2, 20(SP)`
108			`ADDIU R2, R2, 64`
109			`SH R2, 20(SP)`
110			`;CMD_ReadPage.c,22 :: }`
111			`J L_cmd_chip_read_page2`
112			`NOP`
113			`L_cmd_chip_read_page3:`
114			`;CMD_ReadPage.c,24 :: }`
115			`L_end_cmd_chip_read_page:`
116			`LW R25, 4(SP)`
117			`LW RA, 0(SP)`
118			`ADDIU SP, SP, 24`
119			`JR RA`
120			`NOP`
121			`; end of _cmd_chip_read_page`
122			`_cmd_chip_read_page_cache_sequential:`
123			`;CMD_ReadPage.c,32 :: void cmd_chip_read_page_cache_sequential(unsigned char* inBuffer, unsigned char* outBuffer, int len, int addressCycles)`
124			`ADDIU SP, SP, -24`
125			`SW RA, 0(SP)`
126			`;CMD_ReadPage.c,34 :: int i = 0;`
127			`SW R25, 4(SP)`
128			`;CMD_ReadPage.c,35 :: int j = (int)(inBuffer + 6);`
129			`ADDIU R2, R25, 6`
130			`LH R2, 0(R2)`
131			`SH R2, 20(SP)`
132			`;CMD_ReadPage.c,37 :: nand_send_command(NC_READ_MODE);`
133			`SH R28, 8(SP)`
134			`SH R27, 10(SP)`
135			`SW R26, 12(SP)`
136			`SW R25, 16(SP)`
137			`MOVZ R25, R0, R0`
138			`JAL _nand_send_command+0`
139			`NOP`
140			`LW R25, 16(SP)`
141			`LW R26, 12(SP)`
142			`LH R27, 10(SP)`
143			`LH R28, 8(SP)`
144			`;CMD_ReadPage.c,38 :: nand_send_address(inBuffer + 1, addressCycles);`
145			`ADDIU R2, R25, 1`
146			`SH R27, 8(SP)`
147			`SW R26, 12(SP)`
148			`SEH R26, R28`
149			`MOVZ R25, R2, R0`
150			`JAL _nand_send_address+0`
151			`NOP`
152			`;CMD_ReadPage.c,39 :: nand_send_command(NC_READ_PAGE);`
153			`ORI R25, R0, 48`
154			`JAL _nand_send_command+0`
155			`NOP`
156			`;CMD_ReadPage.c,40 :: do_delay(5);`
157			`ORI R25, R0, 5`
158			`JAL _do_delay+0`
159			`NOP`
160			`;CMD_ReadPage.c,41 :: nand_wait_ready();`
161			`JAL _nand_wait_ready+0`
162			`NOP`
163			`LW R26, 12(SP)`
164			`LH R27, 8(SP)`
165			`;CMD_ReadPage.c,42 :: while(j > 0)`
166			`L_cmd_chip_read_page_cache_sequential7:`
167			`LH R2, 20(SP)`
168			`SLTI R2, R2, 1`
169			`BEQ R2, R0, L__cmd_chip_read_page_cache_sequential21`
170			`NOP`
171			`J L_cmd_chip_read_page_cache_sequential8`
172			`NOP`
173			`L__cmd_chip_read_page_cache_sequential21:`
174			`;CMD_ReadPage.c,44 :: nand_send_command( (j > 1)? NC_READ_PAGE_CACHE_SEQ : NC_READ_PAGE_CACHE_LAST);`
175			`LH R2, 20(SP)`
176			`SLTI R2, R2, 2`
177			`BEQ R2, R0, L__cmd_chip_read_page_cache_sequential22`
178			`NOP`
179			`J L_cmd_chip_read_page_cache_sequential9`
180			`NOP`
181			`L__cmd_chip_read_page_cache_sequential22:`
182			`; ?FLOC___cmd_chip_read_page_cache_sequential?T14 start address is: 8 (R2)`
183			`ORI R2, R0, 49`
184			`; ?FLOC___cmd_chip_read_page_cache_sequential?T14 end address is: 8 (R2)`
185			`J L_cmd_chip_read_page_cache_sequential10`
186			`NOP`
187			`L_cmd_chip_read_page_cache_sequential9:`
188			`; ?FLOC___cmd_chip_read_page_cache_sequential?T14 start address is: 8 (R2)`
189			`ORI R2, R0, 63`
190			`; ?FLOC___cmd_chip_read_page_cache_sequential?T14 end address is: 8 (R2)`
191			`L_cmd_chip_read_page_cache_sequential10:`
192			`; ?FLOC___cmd_chip_read_page_cache_sequential?T14 start address is: 8 (R2)`
193			`SH R28, 8(SP)`
194			`; ?FLOC___cmd_chip_read_page_cache_sequential?T14 end address is: 8 (R2)`
195			`SH R27, 10(SP)`
196			`SW R26, 12(SP)`
197			`SW R25, 16(SP)`
198			`SEB R25, R2`
199			`JAL _nand_send_command+0`
200			`NOP`
201			`;CMD_ReadPage.c,45 :: j--;`
202			`LH R2, 20(SP)`
203			`ADDIU R2, R2, -1`
204			`SH R2, 20(SP)`
205			`;CMD_ReadPage.c,47 :: nand_wait_ready();`
206			`JAL _nand_wait_ready+0`
207			`NOP`
208			`LW R25, 16(SP)`
209			`LW R26, 12(SP)`
210			`LH R27, 10(SP)`
211			`LH R28, 8(SP)`
212			`;CMD_ReadPage.c,49 :: for(i = 0; i < len; i += 64)`
213			`SH R0, 22(SP)`
214			`L_cmd_chip_read_page_cache_sequential11:`
215			`SEH R3, R27`
216			`LH R2, 22(SP)`
217			`SLT R2, R2, R3`
218			`BNE R2, R0, L__cmd_chip_read_page_cache_sequential23`
219			`NOP`
220			`J L_cmd_chip_read_page_cache_sequential12`
221			`NOP`
222			`L__cmd_chip_read_page_cache_sequential23:`
223			`;CMD_ReadPage.c,51 :: nand_read(outBuffer, 64);`
224			`SH R28, 8(SP)`
225			`SH R27, 10(SP)`
226			`SW R26, 12(SP)`
227			`SW R25, 16(SP)`
228			`MOVZ R25, R26, R0`
229			`ORI R26, R0, 64`
230			`JAL _nand_read+0`
231			`NOP`
232			`LW R25, 16(SP)`
233			`LW R26, 12(SP)`
234			`LH R27, 10(SP)`
235			`LH R28, 8(SP)`
236			`;CMD_ReadPage.c,52 :: while(!HID_Write(outBuffer, 64));`
237			`L_cmd_chip_read_page_cache_sequential14:`
238			`SH R28, 8(SP)`
239			`SH R27, 10(SP)`
240			`SW R26, 12(SP)`
241			`SW R25, 16(SP)`
242			`MOVZ R25, R26, R0`
243			`ORI R26, R0, 64`
244			`JAL _HID_Write+0`
245			`NOP`
246			`LW R25, 16(SP)`
247			`LW R26, 12(SP)`
248			`LH R27, 10(SP)`
249			`LH R28, 8(SP)`
250			`BEQ R2, R0, L__cmd_chip_read_page_cache_sequential24`
251			`NOP`
252			`J L_cmd_chip_read_page_cache_sequential15`
253			`NOP`
254			`L__cmd_chip_read_page_cache_sequential24:`
255			`J L_cmd_chip_read_page_cache_sequential14`
256			`NOP`
257			`L_cmd_chip_read_page_cache_sequential15:`
258			`;CMD_ReadPage.c,53 :: USB_Break();`
259			`JAL _USB_Break+0`
260			`NOP`
261			`;CMD_ReadPage.c,49 :: for(i = 0; i < len; i += 64)`
262			`LH R2, 22(SP)`
263			`ADDIU R2, R2, 64`
264			`SH R2, 22(SP)`
265			`;CMD_ReadPage.c,55 :: }`
266			`J L_cmd_chip_read_page_cache_sequential11`
267			`NOP`
268			`L_cmd_chip_read_page_cache_sequential12:`
269			`;CMD_ReadPage.c,56 :: }`
270			`J L_cmd_chip_read_page_cache_sequential7`
271			`NOP`
272			`L_cmd_chip_read_page_cache_sequential8:`
273			`;CMD_ReadPage.c,57 :: }`
274			`L_end_cmd_chip_read_page_cache_sequential:`
275			`LW R25, 4(SP)`
276			`LW RA, 0(SP)`
277			`ADDIU SP, SP, 24`
278			`JR RA`
279			`NOP`
280			`; end of _cmd_chip_read_page_cache_sequential`

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[/] [usb_nand_reader/] [trunk/] [mini32/] [CMD_ReadPage.asm] - Blame information for rev 7