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[/] [usb_nand_reader/] [trunk/] [mini32/] [CMD_Reset.asm] - Blame information for rev 7

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Line No. Rev Author Line
1 7 pradd
_do_delay:
2
;CMD_Reset.c,5 ::               void do_delay(int cycles)
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;CMD_Reset.c,8 ::               for(i = 0; i < cycles; i++)
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; i start address is: 16 (R4)
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MOVZ    R4, R0, R0
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; i end address is: 16 (R4)
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L_do_delay0:
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; i start address is: 16 (R4)
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SEH     R3, R4
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SEH     R2, R25
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SLT     R2, R3, R2
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BNE     R2, R0, L__do_delay6
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NOP
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J       L_do_delay1
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NOP
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L__do_delay6:
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;CMD_Reset.c,10 ::              asm NOP;
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NOP
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;CMD_Reset.c,8 ::               for(i = 0; i < cycles; i++)
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ADDIU   R2, R4, 1
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SEH     R4, R2
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;CMD_Reset.c,11 ::              }
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; i end address is: 16 (R4)
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J       L_do_delay0
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NOP
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L_do_delay1:
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;CMD_Reset.c,12 ::              }
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L_end_do_delay:
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JR      RA
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NOP
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; end of _do_delay
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_cmd_chip_reset:
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;CMD_Reset.c,14 ::              void cmd_chip_reset()
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ADDIU   SP, SP, -8
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SW      RA, 0(SP)
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;CMD_Reset.c,16 ::              nand_send_command(NC_RESET);
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SW      R25, 4(SP)
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ORI     R25, R0, 255
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JAL     _nand_send_command+0
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NOP
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;CMD_Reset.c,17 ::              do_delay(10);
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ORI     R25, R0, 10
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JAL     _do_delay+0
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NOP
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;CMD_Reset.c,18 ::              while(!nand_is_ready());
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L_cmd_chip_reset3:
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JAL     _nand_is_ready+0
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NOP
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BEQ     R2, R0, L__cmd_chip_reset8
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NOP
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J       L_cmd_chip_reset4
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NOP
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L__cmd_chip_reset8:
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J       L_cmd_chip_reset3
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NOP
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L_cmd_chip_reset4:
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;CMD_Reset.c,19 ::              }
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L_end_cmd_chip_reset:
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LW      R25, 4(SP)
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LW      RA, 0(SP)
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ADDIU   SP, SP, 8
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JR      RA
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NOP
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; end of _cmd_chip_reset

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