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[/] [usb_nand_reader/] [trunk/] [mini32/] [CMD_Status.asm] - Blame information for rev 7

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Line No. Rev Author Line
1 7 pradd
_cmd_chip_read_status:
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;CMD_Status.c,5 ::              unsigned char cmd_chip_read_status()
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ADDIU   SP, SP, -16
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SW      RA, 0(SP)
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;CMD_Status.c,8 ::              nand_send_command(NC_READ_STATUS);
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SW      R25, 4(SP)
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SW      R26, 8(SP)
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ORI     R25, R0, 112
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JAL     _nand_send_command+0
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NOP
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;CMD_Status.c,9 ::              do_delay(5);
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ORI     R25, R0, 5
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JAL     _do_delay+0
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NOP
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;CMD_Status.c,10 ::             nand_read(&r, 1);
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ADDIU   R2, SP, 12
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ORI     R26, R0, 1
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MOVZ    R25, R2, R0
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JAL     _nand_read+0
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NOP
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;CMD_Status.c,11 ::             return r;
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LBU     R2, 12(SP)
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;CMD_Status.c,12 ::             }
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;CMD_Status.c,11 ::             return r;
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;CMD_Status.c,12 ::             }
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L_end_cmd_chip_read_status:
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LW      R26, 8(SP)
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LW      R25, 4(SP)
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LW      RA, 0(SP)
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ADDIU   SP, SP, 16
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JR      RA
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NOP
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; end of _cmd_chip_read_status
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_cmd_chip_read_status_enhanced:
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;CMD_Status.c,15 ::             unsigned char cmd_chip_read_status_enhanced(unsigned char* inBuffer, int addressCycles)
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ADDIU   SP, SP, -24
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SW      RA, 0(SP)
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;CMD_Status.c,18 ::             nand_send_command(NC_READ_STATUS_ENHANCED);
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SW      R25, 4(SP)
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SW      R26, 8(SP)
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SH      R26, 12(SP)
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SW      R25, 16(SP)
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ORI     R25, R0, 120
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JAL     _nand_send_command+0
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NOP
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LW      R25, 16(SP)
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LH      R26, 12(SP)
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;CMD_Status.c,19 ::             nand_send_address(inBuffer + 1, addressCycles - 2);
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ADDIU   R3, R26, -2
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ADDIU   R2, R25, 1
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SEH     R26, R3
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MOVZ    R25, R2, R0
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JAL     _nand_send_address+0
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NOP
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;CMD_Status.c,20 ::             do_delay(5);
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ORI     R25, R0, 5
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JAL     _do_delay+0
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NOP
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;CMD_Status.c,21 ::             nand_read(&r, 1);
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ADDIU   R2, SP, 20
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ORI     R26, R0, 1
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MOVZ    R25, R2, R0
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JAL     _nand_read+0
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NOP
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;CMD_Status.c,22 ::             return r;
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LBU     R2, 20(SP)
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;CMD_Status.c,23 ::             }
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;CMD_Status.c,22 ::             return r;
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;CMD_Status.c,23 ::             }
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L_end_cmd_chip_read_status_enhanced:
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LW      R26, 8(SP)
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LW      R25, 4(SP)
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LW      RA, 0(SP)
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ADDIU   SP, SP, 24
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JR      RA
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NOP
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; end of _cmd_chip_read_status_enhanced

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