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[/] [v6502/] [trunk/] [data_mux.vhd] - Blame information for rev 4

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1 4 Valerio63
library IEEE;
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use IEEE.std_logic_1164.all;  -- defines std_logic types
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use IEEE.STD_LOGIC_unsigned.all;
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use IEEE.STD_LOGIC_arith.all;
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-- 8 bit three-way multiplexer
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entity data_mux is
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  port(    s:  in STD_LOGIC_VECTOR(3 downto 0);
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           a:  in STD_LOGIC_VECTOR(7 downto 0);
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           b:  in STD_LOGIC_VECTOR(7 downto 0);
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           c:  in STD_LOGIC_VECTOR(7 downto 0);
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           d:  in STD_LOGIC_VECTOR(7 downto 0);
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           y: out STD_LOGIC_VECTOR(7 downto 0)
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      );
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end data_mux;
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architecture comb of data_mux is
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begin
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  process(s,a,b,c,d)
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  begin
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    case s is
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      when "1110"  => y <= a;
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      when "1101"  => y <= b;
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      when "1011"  => y <= c;
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      when "0111"  => y <= d;
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      when others  => y <= a;
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    end case;
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  end process;
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end comb;
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