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[/] [versatile_library/] [trunk/] [bench/] [tb_wb_b3_dpram.v] - Blame information for rev 140

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1 99 unneback 
module vl_wb_b3_dpram_tb ();
2 
 
3 
   wire [31:0] wbm_a_dat_o;
4 
   wire [3:0]  wbm_a_sel_o;
5 
   wire [31:0] wbm_a_adr_o;
6 
   wire [2:0]  wbm_a_cti_o;
7 
   wire [1:0]  wbm_a_bte_o;
8 
   wire        wbm_a_we_o ;
9 
   wire        wbm_a_cyc_o;
10 
   wire        wbm_a_stb_o;
11 
   wire [31:0] wbm_a_dat_i;
12 
   wire        wbm_a_ack_i;
13 
   reg         wbm_a_clk  ;
14 
   reg         wbm_a_rst  ;
15 
 
16 
   wire [31:0] wbm_b_dat_o;
17 
   wire [3:0]  wbm_b_sel_o;
18 
   wire [31:0] wbm_b_adr_o;
19 
   wire [2:0]  wbm_b_cti_o;
20 
   wire [1:0]  wbm_b_bte_o;
21 
   wire        wbm_b_we_o ;
22 
   wire        wbm_b_cyc_o;
23 
   wire        wbm_b_stb_o;
24 
   wire [31:0] wbm_b_dat_i;
25 
   wire        wbm_b_ack_i;
26 
   reg         wbm_b_clk  ;
27 
   reg         wbm_b_rst  ;
28 
 
29 
parameter wb_clk_period = 20;
30 
 
31 
parameter [1:0] linear = 2'b00,
32 
                beat4  = 2'b01,
33 
                beat8  = 2'b10,
34 
                beat16 = 2'b11;
35 
 
36 
parameter [2:0] classic = 3'b000,
37 
                inc     = 3'b010,
38 
                eob     = 3'b111;
39 
parameter rd = 1'b0;
40 
parameter wr = 1'b1;
41 
 
42 
parameter instructions = 32;
43 
 
44 
// {adr_o,bte_o,cti_o,dat_o,sel_o,we_o,cyc_o,stb_o}
45 
parameter [32+2+3+32+4+1+1+1:1] inst_rom0 [0:instructions-1]= {
46 
                {32'h0,linear,classic,32'h0,4'b1111,rd,1'b0,1'b0},
47 
                {32'h100,linear,classic,32'h12345678,4'b1111,wr,1'b1,1'b1}, // write 0x12345678 @ 0x100
48 
                {32'h100,linear,classic,32'h0,4'b1111,rd,1'b1,1'b1},        // read  @ 0x100
49 
                {32'h100,beat4,eob,32'h87654321,4'b1111,wr,1'b1,1'b1}, // write 0x12345678 @ 0x100 with 01,111
50 
                {32'h100,linear,classic,32'h0,4'b1111,rd,1'b1,1'b1},        // read  @ 0x100
51 
                {32'h0,linear,classic,32'h0,4'b1111,rd,1'b0,1'b0},
52 
                {32'h100,beat4,inc,32'h00010002,4'b1111,wr,1'b1,1'b1}, // write burst
53 
                {32'h104,beat4,inc,32'h00030004,4'b1111,wr,1'b1,1'b1},
54 
                {32'h108,beat4,inc,32'h00050006,4'b1111,wr,1'b1,1'b1},
55 
                {32'h10c,beat4,eob,32'h00070008,4'b1111,wr,1'b1,1'b1},
56 
                {32'h104,linear,classic,32'hA1FFFFFF,4'b1000,wr,1'b1,1'b1},// write byte
57 
                {32'h108,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1}, // read burst
58 
                {32'h10c,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1},
59 
                {32'h100,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1},
60 
                {32'h104,beat4,eob,32'h0,4'b1111,rd,1'b1,1'b1},
61 
                {32'h100,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1}, // read burst with strobe going low once
62 
                {32'h104,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1},
63 
                {32'h104,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b0},
64 
                {32'h108,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1},
65 
                {32'h10c,beat4,eob,32'h0,4'b1111,rd,1'b1,1'b1},
66 
                {32'h100,linear,inc,32'hdeaddead,4'b1111,1'b1,1'b1,1'b1}, // write
67 
                {32'h104,linear,eob,32'h55555555,4'b1111,1'b1,1'b1,1'b1}, //
68 
                {32'h100,linear,inc,32'h0,4'b1111,1'b0,1'b1,1'b1}, // read
69 
                {32'h104,linear,eob,32'h0,4'b1111,1'b0,1'b1,1'b1}, // read
70 
                {32'h100,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1}, // read burst with strobe going low
71 
                {32'h104,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b0},
72 
                {32'h104,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1},
73 
                {32'h108,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1},
74 
                {32'h108,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b0},
75 
                {32'h10c,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b0},
76 
                {32'h10c,beat4,eob,32'h0,4'b1111,rd,1'b1,1'b1},
77 
                {32'h0,linear,classic,32'h0,4'b1111,rd,1'b0,1'b0}};
78 
 
79 
        parameter [31:0] dat0 [0:instructions-1] = {
80 
                32'h0,
81 
                32'h0,
82 
                32'h0,
83 
                32'h12345678,
84 
                32'h0,
85 
                32'h87654321,
86 
                32'h0,
87 
                32'h0,
88 
                32'h0,
89 
                32'h0,
90 
                32'h0,
91 
                32'h0,
92 
                32'h00050006,
93 
                32'h00070008,
94 
                32'h00010002,
95 
                32'ha1030004,
96 
                32'h00010002,
97 
                32'ha1030004,
98 
                32'h0,
99 
                32'h00050006,
100 
                32'h00070008,
101 
                32'h0,
102 
                32'h0,
103 
                32'hdeaddead,
104 
                32'h55555555,
105 
                32'hdeaddead,
106 
                32'h0,
107 
                32'h55555555,
108 
                32'h00050006,
109 
                32'h0,
110 
                32'h0,
111 
                32'h00070008};
112 
 
113 
parameter [32+2+3+32+4+1+1+1:1] inst_rom1 [0:instructions-1]= {
114 
                {32'h0,linear,classic,32'h0,4'b1111,rd,1'b0,1'b0},
115 
                {32'h200,linear,classic,32'h12345678,4'b1111,wr,1'b1,1'b1}, // write 0x12345678 @ 0x100
116 
                {32'h200,linear,classic,32'h0,4'b1111,rd,1'b1,1'b1},        // read  @ 0x100
117 
                {32'h200,beat4,eob,32'h87654321,4'b1111,wr,1'b1,1'b1}, // write 0x12345678 @ 0x100 with 01,111
118 
                {32'h200,linear,classic,32'h0,4'b1111,rd,1'b1,1'b1},        // read  @ 0x100
119 
                {32'h0,linear,classic,32'h0,4'b1111,rd,1'b0,1'b0},
120 
                {32'h200,beat4,inc,32'h00010002,4'b1111,wr,1'b1,1'b1}, // write burst
121 
                {32'h204,beat4,inc,32'h00030004,4'b1111,wr,1'b1,1'b1},
122 
                {32'h208,beat4,inc,32'h00050006,4'b1111,wr,1'b1,1'b1},
123 
                {32'h20c,beat4,eob,32'h00070008,4'b1111,wr,1'b1,1'b1},
124 
                {32'h204,linear,classic,32'hA1FFFFFF,4'b1000,wr,1'b1,1'b1},// write byte
125 
                {32'h208,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1}, // read burst
126 
                {32'h20c,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1},
127 
                {32'h200,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1},
128 
                {32'h204,beat4,eob,32'h0,4'b1111,rd,1'b1,1'b1},
129 
                {32'h200,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1}, // read burst with strobe going low once
130 
                {32'h204,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1},
131 
                {32'h204,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b0},
132 
                {32'h208,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1},
133 
                {32'h20c,beat4,eob,32'h0,4'b1111,rd,1'b1,1'b1},
134 
                {32'h200,linear,inc,32'hdeaddead,4'b1111,1'b1,1'b1,1'b1}, // write
135 
                {32'h204,linear,eob,32'h55555555,4'b1111,1'b1,1'b1,1'b1}, //
136 
                {32'h200,linear,inc,32'h0,4'b1111,1'b0,1'b1,1'b1}, // read
137 
                {32'h204,linear,eob,32'h0,4'b1111,1'b0,1'b1,1'b1}, // read
138 
                {32'h200,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1}, // read burst with strobe going low
139 
                {32'h204,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b0},
140 
                {32'h204,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1},
141 
                {32'h208,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b1},
142 
                {32'h208,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b0},
143 
                {32'h20c,beat4,inc,32'h0,4'b1111,rd,1'b1,1'b0},
144 
                {32'h20c,beat4,eob,32'h0,4'b1111,rd,1'b1,1'b1},
145 
                {32'h0,linear,classic,32'h0,4'b1111,rd,1'b0,1'b0}};
146 
 
147 
        parameter [31:0] dat1 [0:instructions-1] = {
148 
                32'h0,
149 
                32'h0,
150 
                32'h0,
151 
                32'h12345678,
152 
                32'h0,
153 
                32'h87654321,
154 
                32'h0,
155 
                32'h0,
156 
                32'h0,
157 
                32'h0,
158 
                32'h0,
159 
                32'h0,
160 
                32'h00050006,
161 
                32'h00070008,
162 
                32'h00010002,
163 
                32'ha1030004,
164 
                32'h00010002,
165 
                32'ha1030004,
166 
                32'h0,
167 
                32'h00050006,
168 
                32'h00070008,
169 
                32'h0,
170 
                32'h0,
171 
                32'hdeaddead,
172 
                32'h55555555,
173 
                32'hdeaddead,
174 
                32'h0,
175 
                32'h55555555,
176 
                32'h00050006,
177 
                32'h0,
178 
                32'h0,
179 
                32'h00070008};
180 
 
181 
vl_wb_b3_dpram
182 
dut (
183 
    .wbsa_dat_i(wbm_a_dat_o),
184 
    .wbsa_adr_i(wbm_a_adr_o[31:2]),
185 
    .wbsa_cti_i(wbm_a_cti_o),
186 
    .wbsa_bte_i(wbm_a_bte_o),
187 
    .wbsa_sel_i(wbm_a_sel_o),
188 
    .wbsa_we_i (wbm_a_we_o),
189 
    .wbsa_stb_i(wbm_a_stb_o),
190 
    .wbsa_cyc_i(wbm_a_cyc_o),
191 
    .wbsa_dat_o(wbm_a_dat_i),
192 
    .wbsa_ack_o(wbm_a_ack_i),
193 
    .wbsa_clk(wbm_a_clk),
194 
    .wbsa_rst(wbm_a_rst),
195 
    .wbsb_dat_i(wbm_b_dat_o),
196 
    .wbsb_adr_i(wbm_b_adr_o[31:2]),
197 
    .wbsb_cti_i(wbm_b_cti_o),
198 
    .wbsb_bte_i(wbm_b_bte_o),
199 
    .wbsb_sel_i(wbm_b_sel_o),
200 
    .wbsb_we_i (wbm_b_we_o),
201 
    .wbsb_stb_i(wbm_b_stb_o),
202 
    .wbsb_cyc_i(wbm_b_cyc_o),
203 
    .wbsb_dat_o(wbm_b_dat_i),
204 
    .wbsb_ack_o(wbm_b_ack_i),
205 
    .wbsb_clk(wbm_b_clk),
206 
    .wbsb_rst(wbm_b_rst));
207 
 
208 
wbm # ( .inst_rom(inst_rom0), .dat(dat0), .testcase("\nTest case:\nwb_b3_dpram A side\n"))
209 
wbmi0(
210 
            .adr_o(wbm_a_adr_o),
211 
            .bte_o(wbm_a_bte_o),
212 
            .cti_o(wbm_a_cti_o),
213 
            .dat_o(wbm_a_dat_o),
214 
            .sel_o(wbm_a_sel_o),
215 
            .we_o (wbm_a_we_o),
216 
            .cyc_o(wbm_a_cyc_o),
217 
            .stb_o(wbm_a_stb_o),
218 
            .dat_i(wbm_a_dat_i),
219 
            .ack_i(wbm_a_ack_i),
220 
            .clk(wbm_a_clk),
221 
            .reset(wbm_a_rst),
222 
            .OK(wbm_OK)
223 
);
224 
 
225 
wbm # ( .inst_rom(inst_rom1), .dat(dat1), .testcase("\nTest case:\nwb_b3_dpram B side\n"))
226 
wbmi1(
227 
            .adr_o(wbm_b_adr_o),
228 
            .bte_o(wbm_b_bte_o),
229 
            .cti_o(wbm_b_cti_o),
230 
            .dat_o(wbm_b_dat_o),
231 
            .sel_o(wbm_b_sel_o),
232 
            .we_o (wbm_b_we_o),
233 
            .cyc_o(wbm_b_cyc_o),
234 
            .stb_o(wbm_b_stb_o),
235 
            .dat_i(wbm_b_dat_i),
236 
            .ack_i(wbm_b_ack_i),
237 
            .clk(wbm_b_clk),
238 
            .reset(wbm_b_rst),
239 
            .OK(wbm_OK)
240 
);
241 
 
242 
initial
243 
    begin
244 
        #0      wbm_a_rst = 1'b1;
245 
        #200    wbm_a_rst = 1'b0;
246 
    end
247 
 
248 
// Wishbone clock
249 
initial
250 
    begin
251 
        #0 wbm_a_clk = 1'b0;
252 
        forever
253 
            #(wb_clk_period/2) wbm_a_clk = !wbm_a_clk;
254 
    end
255 
 
256 
initial
257 
    begin
258 
        #0      wbm_b_rst = 1'b1;
259 
        #200    wbm_b_rst = 1'b0;
260 
    end
261 
 
262 
// Wishbone clock
263 
initial
264 
    begin
265 
        #0 wbm_b_clk = 1'b0;
266 
        forever
267 
            #(wb_clk_period/4) wbm_b_clk = !wbm_b_clk;
268 
    end
269 
 
270 
initial
271 
    #20000 $finish;
272 
endmodule

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