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----------------------------------------------------------------------
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---- ----
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---- VHDL Wishbone TESTBENCH ----
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---- ----
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---- This is a universal type conversion library for VHDL. With ----
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---- the contained overloaded functions conversions from any to ----
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---- any of the following data types are possible: ----
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---- ----
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---- std_logic_vector ----
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---- std_ulogic_vector ----
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---- unsigned ----
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---- signed ----
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---- bit_vector ----
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---- integer ----
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---- string ----
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---- ----
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---- To use them just add the prefix "to_" to the desired result ----
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---- type with the source type in braces. ----
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---- E.g. conversion from integer to std_logic_vector: ----
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---- destination<=to_std_logic_vector(source); ----
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---- ----
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---- This file is part of the vhdl_wb_tb project ----
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---- http://www.opencores.org/cores/vhdl_wb_tb/ ----
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---- ----
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---- To Do: ----
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---- - ----
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---- ----
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---- Author(s): ----
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---- - First & Last Name, email@opencores.org ----
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---- ----
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----------------------------------------------------------------------
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-- SVN information
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--
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-- $URL: $
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-- $Revision: $
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-- $Date: $
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-- $Author: $
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-- $Id: $
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--
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----------------------------------------------------------------------
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---- ----
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---- Copyright (C) 2018 Authors and OPENCORES.ORG ----
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---- ----
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---- This source file may be used and distributed without ----
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---- restriction provided that this copyright statement is not ----
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---- removed from the file and that any derivative work contains ----
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---- the original copyright notice and the associated disclaimer. ----
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---- ----
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---- This source file is free software; you can redistribute it ----
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---- and/or modify it under the terms of the GNU Lesser General ----
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---- Public License as published by the Free Software Foundation; ----
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---- either version 2.1 of the License, or (at your option) any ----
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---- later version. ----
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---- ----
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---- This source is distributed in the hope that it will be ----
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---- useful, but WITHOUT ANY WARRANTY; without even the implied ----
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---- warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ----
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---- PURPOSE. See the GNU Lesser General Public License for more ----
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---- details. ----
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---- ----
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---- You should have received a copy of the GNU Lesser General ----
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---- Public License along with this source; if not, download it ----
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---- from http://www.opencores.org/lgpl.shtml ----
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---- ----
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----------------------------------------------------------------------
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--============================================================================
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--============================================================================
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LIBRARY ieee;
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USE ieee.std_logic_1164.ALL;
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USE ieee.std_logic_arith.ALL;
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--============================================================================
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--============================================================================
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PACKAGE convert_pkg IS
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FUNCTION to_std_logic_vector(input : integer; length : integer) RETURN std_logic_vector;
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FUNCTION to_integer(input : std_logic_vector) RETURN integer;
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FUNCTION to_string(int : integer; base : integer := 10; length : integer := 0) RETURN string;
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FUNCTION to_string(slv : std_logic_vector; base : integer; length : integer) RETURN string;
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END convert_pkg;
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--============================================================================
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--============================================================================
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PACKAGE BODY convert_pkg IS
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--==========================================================================
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FUNCTION to_std_logic_vector(input : integer; length : integer) RETURN std_logic_vector IS
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BEGIN
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RETURN std_logic_vector(conv_unsigned(input, length));
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END;
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FUNCTION to_integer(input : std_logic_vector) RETURN integer IS
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BEGIN
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RETURN conv_integer(unsigned(input));
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END;
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--==========================================================================
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FUNCTION to_char(int : integer) RETURN character IS
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VARIABLE c : character;
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BEGIN
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CASE int IS
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WHEN 0 => c := '0';
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WHEN 1 => c := '1';
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WHEN 2 => c := '2';
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WHEN 3 => c := '3';
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WHEN 4 => c := '4';
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WHEN 5 => c := '5';
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WHEN 6 => c := '6';
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WHEN 7 => c := '7';
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WHEN 8 => c := '8';
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WHEN 9 => c := '9';
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WHEN 10 => c := 'A';
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WHEN 11 => c := 'B';
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WHEN 12 => c := 'C';
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WHEN 13 => c := 'D';
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WHEN 14 => c := 'E';
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WHEN 15 => c := 'F';
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WHEN 16 => c := 'G';
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WHEN 17 => c := 'H';
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WHEN 18 => c := 'I';
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WHEN 19 => c := 'J';
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WHEN 20 => c := 'K';
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WHEN 21 => c := 'L';
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WHEN 22 => c := 'M';
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WHEN 23 => c := 'N';
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WHEN 24 => c := 'O';
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WHEN 25 => c := 'P';
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WHEN 26 => c := 'Q';
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WHEN 27 => c := 'R';
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WHEN 28 => c := 'S';
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WHEN 29 => c := 'T';
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WHEN 30 => c := 'U';
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WHEN 31 => c := 'V';
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WHEN 32 => c := 'W';
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WHEN 33 => c := 'X';
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WHEN 34 => c := 'Y';
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WHEN 35 => c := 'Z';
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WHEN OTHERS => c := '?';
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END CASE;
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RETURN c;
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END to_char;
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--========================================================================
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-- convert integer to string using specified base
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-- (adapted from Steve Vogwell's posting in comp.lang.vhdl)
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-- if base=0 convert to 32 bit hex
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FUNCTION to_string(int : integer; base : integer := 10; length : integer := 0) RETURN string IS
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VARIABLE temp : string(1 TO 1000);
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VARIABLE num : integer;
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VARIABLE abs_int : integer;
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VARIABLE len : integer := 1;
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VARIABLE power : integer := 1;
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BEGIN
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abs_int := ABS(int);
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num := abs_int;
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--
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IF (length = 0) THEN -- automatic length detection
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WHILE num >= base LOOP -- Determine how many
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len := len + 1; -- characters required
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num := num / base; -- to represent the
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END LOOP; -- number.
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ELSE
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len := ABS(length); --
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END IF;
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IF (base /= 10) THEN
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len := len + (len-1) / 4; -- increase for underlines
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END IF;
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--
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FOR i IN len DOWNTO 1 LOOP -- Convert the number to
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IF (((len-i) MOD 5 = 4) AND (base /= 10)) THEN -- every fith char shell be an underline
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temp(i) := '_';
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ELSE
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temp(i) := to_char(abs_int/power MOD base); -- a string starting
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power := power * base; -- with the right hand
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END IF;
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END LOOP; -- side.
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--
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-- return result and add sign if required
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IF (base = 16) THEN
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IF (int < 0) THEN
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CASE temp(len) IS
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WHEN '0' => temp(len) := 'F';
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WHEN '1' => temp(len) := '0';
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WHEN '2' => temp(len) := '1';
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WHEN '3' => temp(len) := '2';
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WHEN '4' => temp(len) := '3';
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WHEN '5' => temp(len) := '4';
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WHEN '6' => temp(len) := '5';
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WHEN '7' => temp(len) := '6';
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WHEN '8' => temp(len) := '7';
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WHEN '9' => temp(len) := '8';
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WHEN 'A' => temp(len) := '9';
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WHEN 'B' => temp(len) := 'A';
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WHEN 'C' => temp(len) := 'B';
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WHEN 'D' => temp(len) := 'C';
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WHEN 'E' => temp(len) := 'D';
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WHEN 'F' => temp(len) := 'E';
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WHEN OTHERS => NULL;
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END CASE;
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FOR i IN len DOWNTO 1 LOOP
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CASE temp(i) IS
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WHEN '0' => temp(i) := 'F';
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WHEN '1' => temp(i) := 'E';
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WHEN '2' => temp(i) := 'D';
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WHEN '3' => temp(i) := 'C';
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WHEN '4' => temp(i) := 'B';
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WHEN '5' => temp(i) := 'A';
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WHEN '6' => temp(i) := '9';
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WHEN '7' => temp(i) := '8';
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WHEN '8' => temp(i) := '7';
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WHEN '9' => temp(i) := '6';
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WHEN 'A' => temp(i) := '5';
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WHEN 'B' => temp(i) := '4';
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WHEN 'C' => temp(i) := '3';
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WHEN 'D' => temp(i) := '2';
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WHEN 'E' => temp(i) := '1';
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WHEN 'F' => temp(i) := '0';
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WHEN OTHERS => NULL;
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END CASE;
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END LOOP; -- i
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END IF;
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RETURN temp(1 TO len);
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ELSE
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IF (int < 0) THEN
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RETURN '-'& temp(1 TO len);
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ELSE
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RETURN temp(1 TO len);
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END IF;
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END IF;
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END to_string;
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--========================================================================
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FUNCTION to_string(slv : std_logic_vector) RETURN string IS
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VARIABLE hexlen : integer;
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VARIABLE longslv : std_logic_vector(131 DOWNTO 0) := (OTHERS => '0');
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VARIABLE hex : string(1 TO 32);
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VARIABLE fourbit : std_logic_vector(3 DOWNTO 0);
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BEGIN
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hexlen := ((slv'high - slv'low) + 1) / 4;
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IF (((slv'high - slv'low) + 1) MOD 4 /= 0) THEN
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hexlen := hexlen + 1;
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END IF;
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--
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longslv((slv'high - slv'low) DOWNTO 0) := slv;
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--
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FOR i IN (hexlen -1) DOWNTO 0 LOOP
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fourbit := longslv(((i*4)+3) DOWNTO (i*4));
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CASE fourbit IS
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WHEN "0000" => hex(hexlen -I) := '0';
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WHEN "0001" => hex(hexlen -I) := '1';
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WHEN "0010" => hex(hexlen -I) := '2';
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WHEN "0011" => hex(hexlen -I) := '3';
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WHEN "0100" => hex(hexlen -I) := '4';
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WHEN "0101" => hex(hexlen -I) := '5';
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WHEN "0110" => hex(hexlen -I) := '6';
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WHEN "0111" => hex(hexlen -I) := '7';
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WHEN "1000" => hex(hexlen -I) := '8';
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WHEN "1001" => hex(hexlen -I) := '9';
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WHEN "1010" => hex(hexlen -I) := 'A';
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WHEN "1011" => hex(hexlen -I) := 'B';
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WHEN "1100" => hex(hexlen -I) := 'C';
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WHEN "1101" => hex(hexlen -I) := 'D';
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WHEN "1110" => hex(hexlen -I) := 'E';
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WHEN "1111" => hex(hexlen -I) := 'F';
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WHEN "ZZZZ" => hex(hexlen -I) := 'z';
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WHEN "UUUU" => hex(hexlen -I) := 'u';
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WHEN "XXXX" => hex(hexlen -I) := 'x';
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WHEN OTHERS => hex(hexlen -I) := '?';
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END CASE;
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END LOOP;
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RETURN hex(1 TO hexlen);
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END to_string;
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--========================================================================
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FUNCTION to_string(slv : std_logic_vector; base : integer; length : integer) RETURN string IS
|
282 |
|
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|
283 |
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BEGIN
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RETURN to_string(to_integer(slv), base, length);
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END to_string;
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end package body;
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----------------------------------------------------------------------
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---- end of file ----
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----------------------------------------------------------------------
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