URL https://opencores.org/ocsvn/vspi/vspi/trunk

Subversion Repositories vspi

[/] [vspi/] [trunk/] [projnav/] [xps/] [pcores/] [spiifc_v1_00_a/] [devl/] [projnav/] [ipcore_dir/] [coregen.cgp] - Blame information for rev 14

Details | Compare with Previous | View Log


SET busformat = BusFormatAngleBracketNotRipped
SET designentry = Verilog
SET device = xc6slx45
SET devicefamily = spartan6
SET flowvendor = Other
SET package = csg324
SET speedgrade = -2
SET verilogsim = true
SET vhdlsim = false

Line No.	Rev	Author	Line
1	14	mjlyons	`SET busformat = BusFormatAngleBracketNotRipped`
2			`SET designentry = Verilog`
3			`SET device = xc6slx45`
4			`SET devicefamily = spartan6`
5			`SET flowvendor = Other`
6			`SET package = csg324`
7			`SET speedgrade = -2`
8			`SET verilogsim = true`
9			`SET vhdlsim = false`

Browse

Tools

Subversion Repositories vspi

[/] [vspi/] [trunk/] [projnav/] [xps/] [pcores/] [spiifc_v1_00_a/] [devl/] [projnav/] [ipcore_dir/] [coregen.cgp] - Blame information for rev 14