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[/] [vspi/] [trunk/] [projnav/] [xps/] [pcores/] [spiifc_v1_00_a/] [devl/] [projnav/] [ipcore_dir/] [create_spiloopmem.tcl] - Blame information for rev 14

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Line No. Rev Author Line
1 14 mjlyons 
##
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## Core Generator Run Script, generator for Project Navigator create command
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##
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proc findRtfPath { relativePath } {
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   set xilenv ""
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   if { [info exists ::env(XILINX) ] } {
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      if { [info exists ::env(MYXILINX)] } {
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         set xilenv [join [list $::env(MYXILINX) $::env(XILINX)] $::xilinx::path_sep ]
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      } else {
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         set xilenv $::env(XILINX)
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      }
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   }
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   foreach path [ split $xilenv $::xilinx::path_sep ] {
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      set fullPath [ file join $path $relativePath ]
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      if { [ file exists $fullPath ] } {
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         return $fullPath
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      }
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   }
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   return ""
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}
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source [ findRtfPath "data/projnav/scripts/dpm_cgUtils.tcl" ]
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set result [ run_cg_create "xilinx.com:ip:blk_mem_gen:6.2" "spiloopmem" "Block Memory Generator" "Block Memory Generator (xilinx.com:ip:blk_mem_gen:6.2) generated by Project Navigator" xc6slx45-2csg324 Verilog ]
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if { $result == 0 } {
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   puts "Core Generator create command completed successfully."
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} elseif { $result == 1 } {
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   puts "Core Generator create command failed."
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} elseif { $result == 3 || $result == 4 } {
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   # convert 'version check' result to real return range, bypassing any messages.
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   set result [ expr $result - 3 ]
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} else {
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   puts "Core Generator create cancelled."
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}
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exit $result

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