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[/] [vspi/] [trunk/] [projnav/] [xps/] [system.mhs] - Blame information for rev 14

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# ##############################################################################
# Created by Base System Builder Wizard for Xilinx EDK 13.2 Build EDK_O.61xd
# Tue Feb 28 10:59:35 2012
# Target Board:  Digilent Atlys Rev C
# Family:    spartan6
# Device:    xc6slx45
# Package:   csg324
# Speed Grade:  -2
# Processor number: 1
# Processor 1: microblaze_0
# System clock frequency: 66.7
# Debug Interface: On-Chip HW Debug Module
# ##############################################################################
 PARAMETER VERSION = 2.1.0
 
 
 PORT fpga_0_DIP_Switches_8Bits_GPIO_IO_I_pin = fpga_0_DIP_Switches_8Bits_GPIO_IO_I_pin, DIR = I, VEC = [0:7]
 PORT fpga_0_LEDs_8Bits_GPIO_IO_O_pin = fpga_0_LEDs_8Bits_GPIO_IO_O_pin, DIR = O, VEC = [0:7]
 PORT fpga_0_Push_Buttons_5Bits_GPIO_IO_I_pin = fpga_0_Push_Buttons_5Bits_GPIO_IO_I_pin, DIR = I, VEC = [0:4]
 PORT fpga_0_clk_1_sys_clk_pin = CLK_S, DIR = I, SIGIS = CLK, CLK_FREQ = 100000000
 PORT fpga_0_rst_1_sys_rst_pin = sys_rst_s, DIR = I, SIGIS = RST, RST_POLARITY = 0
 PORT spiifc_0_SPI_CLK_pin = spiifc_0_SPI_CLK, DIR = I, SIGIS = CLK, CLK_FREQ = 50000000
 PORT spiifc_0_SPI_MISO_pin = spiifc_0_SPI_MISO, DIR = O
 PORT spiifc_0_SPI_MOSI_pin = spiifc_0_SPI_MOSI, DIR = I
 PORT spiifc_0_SPI_SS_pin = spiifc_0_SPI_SS, DIR = I
 
 
BEGIN microblaze
 PARAMETER INSTANCE = microblaze_0
 PARAMETER C_USE_BARREL = 1
 PARAMETER C_DEBUG_ENABLED = 1
 PARAMETER HW_VER = 8.20.a
 BUS_INTERFACE DLMB = dlmb
 BUS_INTERFACE ILMB = ilmb
 BUS_INTERFACE DPLB = mb_plb
 BUS_INTERFACE IPLB = mb_plb
 BUS_INTERFACE DEBUG = microblaze_0_mdm_bus
 PORT MB_RESET = mb_reset
END
 
BEGIN plb_v46
 PARAMETER INSTANCE = mb_plb
 PARAMETER HW_VER = 1.05.a
 PORT PLB_Clk = clk_66_6667MHz
 PORT SYS_Rst = sys_bus_reset
END
 
BEGIN lmb_v10
 PARAMETER INSTANCE = ilmb
 PARAMETER HW_VER = 2.00.b
 PORT LMB_Clk = clk_66_6667MHz
 PORT SYS_Rst = sys_bus_reset
END
 
BEGIN lmb_v10
 PARAMETER INSTANCE = dlmb
 PARAMETER HW_VER = 2.00.b
 PORT LMB_Clk = clk_66_6667MHz
 PORT SYS_Rst = sys_bus_reset
END
 
BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = dlmb_cntlr
 PARAMETER HW_VER = 3.00.b
 PARAMETER C_BASEADDR = 0x00000000
 PARAMETER C_HIGHADDR = 0x0000ffff
 BUS_INTERFACE SLMB = dlmb
 BUS_INTERFACE BRAM_PORT = dlmb_port
END
 
BEGIN lmb_bram_if_cntlr
 PARAMETER INSTANCE = ilmb_cntlr
 PARAMETER HW_VER = 3.00.b
 PARAMETER C_BASEADDR = 0x00000000
 PARAMETER C_HIGHADDR = 0x0000ffff
 BUS_INTERFACE SLMB = ilmb
 BUS_INTERFACE BRAM_PORT = ilmb_port
END
 
BEGIN bram_block
 PARAMETER INSTANCE = lmb_bram
 PARAMETER HW_VER = 1.00.a
 BUS_INTERFACE PORTA = ilmb_port
 BUS_INTERFACE PORTB = dlmb_port
END
 
BEGIN xps_gpio
 PARAMETER INSTANCE = DIP_Switches_8Bits
 PARAMETER C_ALL_INPUTS = 1
 PARAMETER C_GPIO_WIDTH = 8
 PARAMETER C_INTERRUPT_PRESENT = 0
 PARAMETER C_IS_DUAL = 0
 PARAMETER HW_VER = 2.00.a
 PARAMETER C_BASEADDR = 0x81440000
 PARAMETER C_HIGHADDR = 0x8144ffff
 BUS_INTERFACE SPLB = mb_plb
 PORT GPIO_IO_I = fpga_0_DIP_Switches_8Bits_GPIO_IO_I_pin
END
 
BEGIN xps_gpio
 PARAMETER INSTANCE = LEDs_8Bits
 PARAMETER C_ALL_INPUTS = 0
 PARAMETER C_GPIO_WIDTH = 8
 PARAMETER C_INTERRUPT_PRESENT = 0
 PARAMETER C_IS_DUAL = 0
 PARAMETER HW_VER = 2.00.a
 PARAMETER C_BASEADDR = 0x81420000
 PARAMETER C_HIGHADDR = 0x8142ffff
 BUS_INTERFACE SPLB = mb_plb
 PORT GPIO_IO_O = fpga_0_LEDs_8Bits_GPIO_IO_O_pin
END
 
BEGIN xps_gpio
 PARAMETER INSTANCE = Push_Buttons_5Bits
 PARAMETER C_ALL_INPUTS = 1
 PARAMETER C_GPIO_WIDTH = 5
 PARAMETER C_INTERRUPT_PRESENT = 0
 PARAMETER C_IS_DUAL = 0
 PARAMETER HW_VER = 2.00.a
 PARAMETER C_BASEADDR = 0x81400000
 PARAMETER C_HIGHADDR = 0x8140ffff
 BUS_INTERFACE SPLB = mb_plb
 PORT GPIO_IO_I = fpga_0_Push_Buttons_5Bits_GPIO_IO_I_pin
END
 
BEGIN clock_generator
 PARAMETER INSTANCE = clock_generator_0
 PARAMETER C_CLKIN_FREQ = 100000000
 PARAMETER C_CLKOUT0_FREQ = 66666666
 PARAMETER C_CLKOUT0_PHASE = 0
 PARAMETER C_CLKOUT0_GROUP = NONE
 PARAMETER C_CLKOUT0_BUF = TRUE
 PARAMETER C_EXT_RESET_HIGH = 0
 PARAMETER HW_VER = 4.02.a
 PORT CLKIN = CLK_S
 PORT CLKOUT0 = clk_66_6667MHz
 PORT RST = sys_rst_s
 PORT LOCKED = Dcm_all_locked
END
 
BEGIN mdm
 PARAMETER INSTANCE = mdm_0
 PARAMETER C_MB_DBG_PORTS = 1
 PARAMETER C_USE_UART = 1
 PARAMETER HW_VER = 2.00.b
 PARAMETER C_BASEADDR = 0x84400000
 PARAMETER C_HIGHADDR = 0x8440ffff
 BUS_INTERFACE SPLB = mb_plb
 BUS_INTERFACE MBDEBUG_0 = microblaze_0_mdm_bus
 PORT Debug_SYS_Rst = Debug_SYS_Rst
END
 
BEGIN proc_sys_reset
 PARAMETER INSTANCE = proc_sys_reset_0
 PARAMETER C_EXT_RESET_HIGH = 0
 PARAMETER HW_VER = 3.00.a
 PORT Slowest_sync_clk = clk_66_6667MHz
 PORT Ext_Reset_In = sys_rst_s
 PORT MB_Debug_Sys_Rst = Debug_SYS_Rst
 PORT Dcm_locked = Dcm_all_locked
 PORT MB_Reset = mb_reset
 PORT Bus_Struct_Reset = sys_bus_reset
 PORT Peripheral_Reset = sys_periph_reset
END
 
BEGIN spiifc
 PARAMETER INSTANCE = spiifc_0
 PARAMETER HW_VER = 1.00.a
 PARAMETER C_BASEADDR = 0x85000000
 PARAMETER C_HIGHADDR = 0x8500FFFF
 PARAMETER C_MEM0_BASEADDR = 0x85010000
 PARAMETER C_MEM0_HIGHADDR = 0x85010FFF
 PARAMETER C_MEM1_BASEADDR = 0x85011000
 PARAMETER C_MEM1_HIGHADDR = 0x85011FFF
 BUS_INTERFACE SPLB = mb_plb
 PORT SPI_CLK = spiifc_0_SPI_CLK
 PORT SPI_MOSI = spiifc_0_SPI_MOSI
 PORT SPI_MISO = spiifc_0_SPI_MISO
 PORT SPI_SS = spiifc_0_SPI_SS
END
 
BEGIN xps_central_dma
 PARAMETER INSTANCE = xps_central_dma_0
 PARAMETER HW_VER = 2.03.a
 PARAMETER C_BASEADDR = 0x86000000
 PARAMETER C_HIGHADDR = 0x8600FFFF
 BUS_INTERFACE MPLB = mb_plb
 BUS_INTERFACE SPLB = mb_plb
END
 

Line No.	Rev	Author	Line
1	14	mjlyons
2			`# ##############################################################################`
3			`# Created by Base System Builder Wizard for Xilinx EDK 13.2 Build EDK_O.61xd`
4			`# Tue Feb 28 10:59:35 2012`
5			`# Target Board: Digilent Atlys Rev C`
6			`# Family: spartan6`
7			`# Device: xc6slx45`
8			`# Package: csg324`
9			`# Speed Grade: -2`
10			`# Processor number: 1`
11			`# Processor 1: microblaze_0`
12			`# System clock frequency: 66.7`
13			`# Debug Interface: On-Chip HW Debug Module`
14			`# ##############################################################################`
15			`PARAMETER VERSION = 2.1.0`
16
17
18			`PORT fpga_0_DIP_Switches_8Bits_GPIO_IO_I_pin = fpga_0_DIP_Switches_8Bits_GPIO_IO_I_pin, DIR = I, VEC = [0:7]`
19			`PORT fpga_0_LEDs_8Bits_GPIO_IO_O_pin = fpga_0_LEDs_8Bits_GPIO_IO_O_pin, DIR = O, VEC = [0:7]`
20			`PORT fpga_0_Push_Buttons_5Bits_GPIO_IO_I_pin = fpga_0_Push_Buttons_5Bits_GPIO_IO_I_pin, DIR = I, VEC = [0:4]`
21			`PORT fpga_0_clk_1_sys_clk_pin = CLK_S, DIR = I, SIGIS = CLK, CLK_FREQ = 100000000`
22			`PORT fpga_0_rst_1_sys_rst_pin = sys_rst_s, DIR = I, SIGIS = RST, RST_POLARITY = 0`
23			`PORT spiifc_0_SPI_CLK_pin = spiifc_0_SPI_CLK, DIR = I, SIGIS = CLK, CLK_FREQ = 50000000`
24			`PORT spiifc_0_SPI_MISO_pin = spiifc_0_SPI_MISO, DIR = O`
25			`PORT spiifc_0_SPI_MOSI_pin = spiifc_0_SPI_MOSI, DIR = I`
26			`PORT spiifc_0_SPI_SS_pin = spiifc_0_SPI_SS, DIR = I`
27
28
29			`BEGIN microblaze`
30			`PARAMETER INSTANCE = microblaze_0`
31			`PARAMETER C_USE_BARREL = 1`
32			`PARAMETER C_DEBUG_ENABLED = 1`
33			`PARAMETER HW_VER = 8.20.a`
34			`BUS_INTERFACE DLMB = dlmb`
35			`BUS_INTERFACE ILMB = ilmb`
36			`BUS_INTERFACE DPLB = mb_plb`
37			`BUS_INTERFACE IPLB = mb_plb`
38			`BUS_INTERFACE DEBUG = microblaze_0_mdm_bus`
39			`PORT MB_RESET = mb_reset`
40			`END`
41
42			`BEGIN plb_v46`
43			`PARAMETER INSTANCE = mb_plb`
44			`PARAMETER HW_VER = 1.05.a`
45			`PORT PLB_Clk = clk_66_6667MHz`
46			`PORT SYS_Rst = sys_bus_reset`
47			`END`
48
49			`BEGIN lmb_v10`
50			`PARAMETER INSTANCE = ilmb`
51			`PARAMETER HW_VER = 2.00.b`
52			`PORT LMB_Clk = clk_66_6667MHz`
53			`PORT SYS_Rst = sys_bus_reset`
54			`END`
55
56			`BEGIN lmb_v10`
57			`PARAMETER INSTANCE = dlmb`
58			`PARAMETER HW_VER = 2.00.b`
59			`PORT LMB_Clk = clk_66_6667MHz`
60			`PORT SYS_Rst = sys_bus_reset`
61			`END`
62
63			`BEGIN lmb_bram_if_cntlr`
64			`PARAMETER INSTANCE = dlmb_cntlr`
65			`PARAMETER HW_VER = 3.00.b`
66			`PARAMETER C_BASEADDR = 0x00000000`
67			`PARAMETER C_HIGHADDR = 0x0000ffff`
68			`BUS_INTERFACE SLMB = dlmb`
69			`BUS_INTERFACE BRAM_PORT = dlmb_port`
70			`END`
71
72			`BEGIN lmb_bram_if_cntlr`
73			`PARAMETER INSTANCE = ilmb_cntlr`
74			`PARAMETER HW_VER = 3.00.b`
75			`PARAMETER C_BASEADDR = 0x00000000`
76			`PARAMETER C_HIGHADDR = 0x0000ffff`
77			`BUS_INTERFACE SLMB = ilmb`
78			`BUS_INTERFACE BRAM_PORT = ilmb_port`
79			`END`
80
81			`BEGIN bram_block`
82			`PARAMETER INSTANCE = lmb_bram`
83			`PARAMETER HW_VER = 1.00.a`
84			`BUS_INTERFACE PORTA = ilmb_port`
85			`BUS_INTERFACE PORTB = dlmb_port`
86			`END`
87
88			`BEGIN xps_gpio`
89			`PARAMETER INSTANCE = DIP_Switches_8Bits`
90			`PARAMETER C_ALL_INPUTS = 1`
91			`PARAMETER C_GPIO_WIDTH = 8`
92			`PARAMETER C_INTERRUPT_PRESENT = 0`
93			`PARAMETER C_IS_DUAL = 0`
94			`PARAMETER HW_VER = 2.00.a`
95			`PARAMETER C_BASEADDR = 0x81440000`
96			`PARAMETER C_HIGHADDR = 0x8144ffff`
97			`BUS_INTERFACE SPLB = mb_plb`
98			`PORT GPIO_IO_I = fpga_0_DIP_Switches_8Bits_GPIO_IO_I_pin`
99			`END`
100
101			`BEGIN xps_gpio`
102			`PARAMETER INSTANCE = LEDs_8Bits`
103			`PARAMETER C_ALL_INPUTS = 0`
104			`PARAMETER C_GPIO_WIDTH = 8`
105			`PARAMETER C_INTERRUPT_PRESENT = 0`
106			`PARAMETER C_IS_DUAL = 0`
107			`PARAMETER HW_VER = 2.00.a`
108			`PARAMETER C_BASEADDR = 0x81420000`
109			`PARAMETER C_HIGHADDR = 0x8142ffff`
110			`BUS_INTERFACE SPLB = mb_plb`
111			`PORT GPIO_IO_O = fpga_0_LEDs_8Bits_GPIO_IO_O_pin`
112			`END`
113
114			`BEGIN xps_gpio`
115			`PARAMETER INSTANCE = Push_Buttons_5Bits`
116			`PARAMETER C_ALL_INPUTS = 1`
117			`PARAMETER C_GPIO_WIDTH = 5`
118			`PARAMETER C_INTERRUPT_PRESENT = 0`
119			`PARAMETER C_IS_DUAL = 0`
120			`PARAMETER HW_VER = 2.00.a`
121			`PARAMETER C_BASEADDR = 0x81400000`
122			`PARAMETER C_HIGHADDR = 0x8140ffff`
123			`BUS_INTERFACE SPLB = mb_plb`
124			`PORT GPIO_IO_I = fpga_0_Push_Buttons_5Bits_GPIO_IO_I_pin`
125			`END`
126
127			`BEGIN clock_generator`
128			`PARAMETER INSTANCE = clock_generator_0`
129			`PARAMETER C_CLKIN_FREQ = 100000000`
130			`PARAMETER C_CLKOUT0_FREQ = 66666666`
131			`PARAMETER C_CLKOUT0_PHASE = 0`
132			`PARAMETER C_CLKOUT0_GROUP = NONE`
133			`PARAMETER C_CLKOUT0_BUF = TRUE`
134			`PARAMETER C_EXT_RESET_HIGH = 0`
135			`PARAMETER HW_VER = 4.02.a`
136			`PORT CLKIN = CLK_S`
137			`PORT CLKOUT0 = clk_66_6667MHz`
138			`PORT RST = sys_rst_s`
139			`PORT LOCKED = Dcm_all_locked`
140			`END`
141
142			`BEGIN mdm`
143			`PARAMETER INSTANCE = mdm_0`
144			`PARAMETER C_MB_DBG_PORTS = 1`
145			`PARAMETER C_USE_UART = 1`
146			`PARAMETER HW_VER = 2.00.b`
147			`PARAMETER C_BASEADDR = 0x84400000`
148			`PARAMETER C_HIGHADDR = 0x8440ffff`
149			`BUS_INTERFACE SPLB = mb_plb`
150			`BUS_INTERFACE MBDEBUG_0 = microblaze_0_mdm_bus`
151			`PORT Debug_SYS_Rst = Debug_SYS_Rst`
152			`END`
153
154			`BEGIN proc_sys_reset`
155			`PARAMETER INSTANCE = proc_sys_reset_0`
156			`PARAMETER C_EXT_RESET_HIGH = 0`
157			`PARAMETER HW_VER = 3.00.a`
158			`PORT Slowest_sync_clk = clk_66_6667MHz`
159			`PORT Ext_Reset_In = sys_rst_s`
160			`PORT MB_Debug_Sys_Rst = Debug_SYS_Rst`
161			`PORT Dcm_locked = Dcm_all_locked`
162			`PORT MB_Reset = mb_reset`
163			`PORT Bus_Struct_Reset = sys_bus_reset`
164			`PORT Peripheral_Reset = sys_periph_reset`
165			`END`
166
167			`BEGIN spiifc`
168			`PARAMETER INSTANCE = spiifc_0`
169			`PARAMETER HW_VER = 1.00.a`
170			`PARAMETER C_BASEADDR = 0x85000000`
171			`PARAMETER C_HIGHADDR = 0x8500FFFF`
172			`PARAMETER C_MEM0_BASEADDR = 0x85010000`
173			`PARAMETER C_MEM0_HIGHADDR = 0x85010FFF`
174			`PARAMETER C_MEM1_BASEADDR = 0x85011000`
175			`PARAMETER C_MEM1_HIGHADDR = 0x85011FFF`
176			`BUS_INTERFACE SPLB = mb_plb`
177			`PORT SPI_CLK = spiifc_0_SPI_CLK`
178			`PORT SPI_MOSI = spiifc_0_SPI_MOSI`
179			`PORT SPI_MISO = spiifc_0_SPI_MISO`
180			`PORT SPI_SS = spiifc_0_SPI_SS`
181			`END`
182
183			`BEGIN xps_central_dma`
184			`PARAMETER INSTANCE = xps_central_dma_0`
185			`PARAMETER HW_VER = 2.03.a`
186			`PARAMETER C_BASEADDR = 0x86000000`
187			`PARAMETER C_HIGHADDR = 0x8600FFFF`
188			`BUS_INTERFACE MPLB = mb_plb`
189			`BUS_INTERFACE SPLB = mb_plb`
190			`END`
191

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[/] [vspi/] [trunk/] [projnav/] [xps/] [system.mhs] - Blame information for rev 14