Subversion Repositories vtach

NEWPROJECT .

SETPROJECT .

SET device=xc3s50

SET flowvendor=Other

SET createndf=False

SET formalverification=False

SET speedgrade=-5

SET removerpms=False

SET devicefamily=spartan3

SET asysymbol=False

SET simulationfiles=structural

SET implementationfiletype=Ngc

SET busformat=BusFormatAngleBracketNotRipped

SET designentry=VHDL

SET addpads=False

SET foundationsym=False

SET package=pq208

SET vhdlsim=True

SET verilogsim=False

SELECT ICON_(ChipScope_Pro_-_Integrated_Controller) family Xilinx,_Inc. 1.05.a

CSET number_control_ports=1

CSET component_name=icon_pro

CSET user_scan_chain=USER1

CSET use_unused_bscan=false

CSET use_ext_bscan=false

GENERATE