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[/] [vtach/] [trunk/] [io_output.v] - Blame information for rev 2

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1 2 wd5gnr
`timescale 1us/1ns
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// Output module just sets the board's displays
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module io_output(input clk, input oe, input [12:0] value, input reset,
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        output segA, output segB, output segC, output segD, output segE, output segF, output segG,
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        output ds0, output ds1, output ds2, output ds3);
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   wire [12:0] v;
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        reg [12:0] val;
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        // this does most of the real work
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        DisplayHex leds(clk,reset,val,segA, segB, segC, segD, segE, segF, segG, ds0, ds1, ds2, ds3);
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// convert all x's to 0's
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// if you read uninit memory it shows up as x's in simulation
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   assign v=((value===13'bxxxxxxxxxxxxx)?13'b0:value);
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// digits
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   always @(posedge clk)
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     if (oe)
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                 val<=v;
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endmodule // io_output
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