OpenCores
URL https://opencores.org/ocsvn/vtach/vtach/trunk

Subversion Repositories vtach

[/] [vtach/] [trunk/] [top_envsettings.html] - Blame information for rev 2

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 2 wd5gnr
<HTML><HEAD><TITLE>Xilinx System Settings Report</TITLE></HEAD>
2
<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
3
<center><big><big><b>System Settings</b></big></big></center><br>
4
<A NAME="Environment Settings"></A>
5
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
6
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
7
<TD ALIGN=CENTER COLSPAN='5'><B> Environment Settings </B></TD>
8
</tr>
9
<tr bgcolor='#ffff99'>
10
<td><b>Environment Variable</b></td>
11
<td><b>xst</b></td>
12
<td><b>ngdbuild</b></td>
13
<td><b>map</b></td>
14
<td><b>par</b></td>
15
</tr>
16
<tr>
17
<td>LD_LIBRARY_PATH</td>
18
<td>/opt/Xilinx/13.2/ISE_DS/ISE//lib/lin64</td>
19
<td>/opt/Xilinx/13.2/ISE_DS/ISE//lib/lin64</td>
20
<td>/opt/Xilinx/13.2/ISE_DS/ISE//lib/lin64</td>
21
<td>/opt/Xilinx/13.2/ISE_DS/ISE//lib/lin64</td>
22
</tr>
23
<tr>
24
<td>PATH</td>
25
<td>/opt/Xilinx/13.2/ISE_DS/ISE//bin/lin64:<br>/opt/microchip/xc8/v1.10/bin:<br>/usr/lib/x86_64-linux-gnu/qt4/bin:<br>/home/alw/bin:<br>/usr/lib/lightdm/lightdm:<br>/usr/local/sbin:<br>/usr/local/bin:<br>/usr/sbin:<br>/usr/bin:<br>/sbin:<br>/bin:<br>/usr/games:<br>/usr/local/games:<br>/usr/brlcad/bin:<br>/usr/local/LPCXpresso/bin:<br>/usr/local/LPCXpresso/tools/bin:<br>/usr/local/gnuarm/bin</td>
26
<td>/opt/Xilinx/13.2/ISE_DS/ISE//bin/lin64:<br>/opt/microchip/xc8/v1.10/bin:<br>/usr/lib/x86_64-linux-gnu/qt4/bin:<br>/home/alw/bin:<br>/usr/lib/lightdm/lightdm:<br>/usr/local/sbin:<br>/usr/local/bin:<br>/usr/sbin:<br>/usr/bin:<br>/sbin:<br>/bin:<br>/usr/games:<br>/usr/local/games:<br>/usr/brlcad/bin:<br>/usr/local/LPCXpresso/bin:<br>/usr/local/LPCXpresso/tools/bin:<br>/usr/local/gnuarm/bin</td>
27
<td>/opt/Xilinx/13.2/ISE_DS/ISE//bin/lin64:<br>/opt/microchip/xc8/v1.10/bin:<br>/usr/lib/x86_64-linux-gnu/qt4/bin:<br>/home/alw/bin:<br>/usr/lib/lightdm/lightdm:<br>/usr/local/sbin:<br>/usr/local/bin:<br>/usr/sbin:<br>/usr/bin:<br>/sbin:<br>/bin:<br>/usr/games:<br>/usr/local/games:<br>/usr/brlcad/bin:<br>/usr/local/LPCXpresso/bin:<br>/usr/local/LPCXpresso/tools/bin:<br>/usr/local/gnuarm/bin</td>
28
<td>/opt/Xilinx/13.2/ISE_DS/ISE//bin/lin64:<br>/opt/microchip/xc8/v1.10/bin:<br>/usr/lib/x86_64-linux-gnu/qt4/bin:<br>/home/alw/bin:<br>/usr/lib/lightdm/lightdm:<br>/usr/local/sbin:<br>/usr/local/bin:<br>/usr/sbin:<br>/usr/bin:<br>/sbin:<br>/bin:<br>/usr/games:<br>/usr/local/games:<br>/usr/brlcad/bin:<br>/usr/local/LPCXpresso/bin:<br>/usr/local/LPCXpresso/tools/bin:<br>/usr/local/gnuarm/bin</td>
29
</tr>
30
<tr>
31
<td>XILINX</td>
32
<td>/opt/Xilinx/13.2/ISE_DS/ISE/</td>
33
<td>/opt/Xilinx/13.2/ISE_DS/ISE/</td>
34
<td>/opt/Xilinx/13.2/ISE_DS/ISE/</td>
35
<td>/opt/Xilinx/13.2/ISE_DS/ISE/</td>
36
</tr>
37
<tr>
38
<td>XIL_IMPACT_ENV_LPT1_BASE_ADDRESS</td>
39
<td>0</td>
40
<td>0</td>
41
<td>0</td>
42
<td>0</td>
43
</tr>
44
<tr>
45
<td>XIL_IMPACT_ENV_LPT1_ECP_ADDRESS</td>
46
<td>400</td>
47
<td>400</td>
48
<td>400</td>
49
<td>400</td>
50
</tr>
51
<tr>
52
<td>XIL_IMPACT_ENV_LPT2_BASE_ADDRESS</td>
53
<td>10</td>
54
<td>10</td>
55
<td>10</td>
56
<td>10</td>
57
</tr>
58
<tr>
59
<td>XIL_IMPACT_ENV_LPT2_ECP_ADDRESS</td>
60
<td>410</td>
61
<td>410</td>
62
<td>410</td>
63
<td>410</td>
64
</tr>
65
<tr>
66
<td>XIL_IMPACT_ENV_LPT3_BASE_ADDRESS</td>
67
<td>20</td>
68
<td>20</td>
69
<td>20</td>
70
<td>20</td>
71
</tr>
72
<tr>
73
<td>XIL_IMPACT_ENV_LPT3_ECP_ADDRESS</td>
74
<td>420</td>
75
<td>420</td>
76
<td>420</td>
77
<td>420</td>
78
</tr>
79
<tr>
80
<td>XIL_IMPACT_ENV_LPT4_BASE_ADDRESS</td>
81
<td>30</td>
82
<td>30</td>
83
<td>30</td>
84
<td>30</td>
85
</tr>
86
<tr>
87
<td>XIL_IMPACT_ENV_LPT4_ECP_ADDRESS</td>
88
<td>430</td>
89
<td>430</td>
90
<td>430</td>
91
<td>430</td>
92
</tr>
93
<tr>
94
<td>XIL_IMPACT_USE_LIBUSB</td>
95
<td>0</td>
96
<td>0</td>
97
<td>0</td>
98
<td>0</td>
99
</tr>
100
<tr>
101
<td>XIL_IMPACT_USE_WINDRIVER</td>
102
<td>1</td>
103
<td>1</td>
104
<td>1</td>
105
<td>1</td>
106
</tr>
107
</TABLE>
108
<A NAME="Synthesis Property Settings"></A>
109
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
110
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
111
<TD ALIGN=CENTER COLSPAN='4'><B>Synthesis Property Settings </B></TD>
112
</tr>
113
<tr bgcolor='#ffff99'>
114
<td><b>Switch Name</b></td>
115
<td><b>Property Name</b></td>
116
<td><b>Value</b></td>
117
<td><b>Default Value</b></td>
118
</tr>
119
<tr>
120
<td>-ifn</td>
121
<td>&nbsp;</td>
122
<td>top.prj</td>
123
<td>&nbsp;</td>
124
</tr>
125
<tr>
126
<td>-ifmt</td>
127
<td>&nbsp;</td>
128
<td>mixed</td>
129
<td>MIXED</td>
130
</tr>
131
<tr>
132
<td>-ofn</td>
133
<td>&nbsp;</td>
134
<td>top</td>
135
<td>&nbsp;</td>
136
</tr>
137
<tr>
138
<td>-ofmt</td>
139
<td>&nbsp;</td>
140
<td>NGC</td>
141
<td>NGC</td>
142
</tr>
143
<tr>
144
<td>-p</td>
145
<td>&nbsp;</td>
146
<td>xc3s1000-4-ft256</td>
147
<td>&nbsp;</td>
148
</tr>
149
<tr>
150
<td>-top</td>
151
<td>&nbsp;</td>
152
<td>top</td>
153
<td>&nbsp;</td>
154
</tr>
155
<tr>
156
<td>-opt_mode</td>
157
<td>Optimization Goal</td>
158
<td>Speed</td>
159
<td>SPEED</td>
160
</tr>
161
<tr>
162
<td>-opt_level</td>
163
<td>Optimization Effort</td>
164
<td>2</td>
165
<td>1</td>
166
</tr>
167
<tr>
168
<td>-iuc</td>
169
<td>Use synthesis Constraints File</td>
170
<td>NO</td>
171
<td>NO</td>
172
</tr>
173
<tr>
174
<td>-keep_hierarchy</td>
175
<td>Keep Hierarchy</td>
176
<td>No</td>
177
<td>NO</td>
178
</tr>
179
<tr>
180
<td>-netlist_hierarchy</td>
181
<td>Netlist Hierarchy</td>
182
<td>As_Optimized</td>
183
<td>as_optimized</td>
184
</tr>
185
<tr>
186
<td>-rtlview</td>
187
<td>Generate RTL Schematic</td>
188
<td>Yes</td>
189
<td>NO</td>
190
</tr>
191
<tr>
192
<td>-glob_opt</td>
193
<td>Global Optimization Goal</td>
194
<td>AllClockNets</td>
195
<td>ALLCLOCKNETS</td>
196
</tr>
197
<tr>
198
<td>-read_cores</td>
199
<td>Read Cores</td>
200
<td>YES</td>
201
<td>YES</td>
202
</tr>
203
<tr>
204
<td>-sd</td>
205
<td>Cores Search Directories</td>
206
<td>{&quot;ipcore_dir&quot;  }</td>
207
<td>&nbsp;</td>
208
</tr>
209
<tr>
210
<td>-write_timing_constraints</td>
211
<td>Write Timing Constraints</td>
212
<td>NO</td>
213
<td>NO</td>
214
</tr>
215
<tr>
216
<td>-cross_clock_analysis</td>
217
<td>Cross Clock Analysis</td>
218
<td>NO</td>
219
<td>NO</td>
220
</tr>
221
<tr>
222
<td>-bus_delimiter</td>
223
<td>Bus Delimiter</td>
224
<td>&lt;&gt;</td>
225
<td>&lt;&gt;</td>
226
</tr>
227
<tr>
228
<td>-slice_utilization_ratio</td>
229
<td>Slice Utilization Ratio</td>
230
<td>100</td>
231
<td>100%</td>
232
</tr>
233
<tr>
234
<td>-bram_utilization_ratio</td>
235
<td>BRAM Utilization Ratio</td>
236
<td>100</td>
237
<td>100%</td>
238
</tr>
239
<tr>
240
<td>-verilog2001</td>
241
<td>Verilog 2001</td>
242
<td>YES</td>
243
<td>YES</td>
244
</tr>
245
<tr>
246
<td>-fsm_extract</td>
247
<td>&nbsp;</td>
248
<td>YES</td>
249
<td>YES</td>
250
</tr>
251
<tr>
252
<td>-fsm_encoding</td>
253
<td>&nbsp;</td>
254
<td>Auto</td>
255
<td>AUTO</td>
256
</tr>
257
<tr>
258
<td>-safe_implementation</td>
259
<td>&nbsp;</td>
260
<td>No</td>
261
<td>NO</td>
262
</tr>
263
<tr>
264
<td>-fsm_style</td>
265
<td>&nbsp;</td>
266
<td>LUT</td>
267
<td>LUT</td>
268
</tr>
269
<tr>
270
<td>-ram_extract</td>
271
<td>&nbsp;</td>
272
<td>Yes</td>
273
<td>YES</td>
274
</tr>
275
<tr>
276
<td>-ram_style</td>
277
<td>&nbsp;</td>
278
<td>Auto</td>
279
<td>AUTO</td>
280
</tr>
281
<tr>
282
<td>-rom_extract</td>
283
<td>&nbsp;</td>
284
<td>Yes</td>
285
<td>YES</td>
286
</tr>
287
<tr>
288
<td>-shreg_extract</td>
289
<td>&nbsp;</td>
290
<td>YES</td>
291
<td>YES</td>
292
</tr>
293
<tr>
294
<td>-rom_style</td>
295
<td>&nbsp;</td>
296
<td>Auto</td>
297
<td>AUTO</td>
298
</tr>
299
<tr>
300
<td>-auto_bram_packing</td>
301
<td>&nbsp;</td>
302
<td>NO</td>
303
<td>NO</td>
304
</tr>
305
<tr>
306
<td>-resource_sharing</td>
307
<td>&nbsp;</td>
308
<td>YES</td>
309
<td>YES</td>
310
</tr>
311
<tr>
312
<td>-async_to_sync</td>
313
<td>&nbsp;</td>
314
<td>NO</td>
315
<td>NO</td>
316
</tr>
317
<tr>
318
<td>-mult_style</td>
319
<td>&nbsp;</td>
320
<td>Auto</td>
321
<td>AUTO</td>
322
</tr>
323
<tr>
324
<td>-iobuf</td>
325
<td>&nbsp;</td>
326
<td>YES</td>
327
<td>YES</td>
328
</tr>
329
<tr>
330
<td>-max_fanout</td>
331
<td>&nbsp;</td>
332
<td>500</td>
333
<td>500</td>
334
</tr>
335
<tr>
336
<td>-bufg</td>
337
<td>&nbsp;</td>
338
<td>8</td>
339
<td>8</td>
340
</tr>
341
<tr>
342
<td>-register_duplication</td>
343
<td>&nbsp;</td>
344
<td>YES</td>
345
<td>YES</td>
346
</tr>
347
<tr>
348
<td>-register_balancing</td>
349
<td>&nbsp;</td>
350
<td>Yes</td>
351
<td>NO</td>
352
</tr>
353
<tr>
354
<td>-move_first_stage</td>
355
<td>&nbsp;</td>
356
<td>YES</td>
357
<td>YES</td>
358
</tr>
359
<tr>
360
<td>-move_last_stage</td>
361
<td>&nbsp;</td>
362
<td>YES</td>
363
<td>YES</td>
364
</tr>
365
<tr>
366
<td>-optimize_primitives</td>
367
<td>&nbsp;</td>
368
<td>NO</td>
369
<td>NO</td>
370
</tr>
371
<tr>
372
<td>-use_clock_enable</td>
373
<td>&nbsp;</td>
374
<td>Yes</td>
375
<td>YES</td>
376
</tr>
377
<tr>
378
<td>-use_sync_set</td>
379
<td>&nbsp;</td>
380
<td>Yes</td>
381
<td>YES</td>
382
</tr>
383
<tr>
384
<td>-use_sync_reset</td>
385
<td>&nbsp;</td>
386
<td>Yes</td>
387
<td>YES</td>
388
</tr>
389
<tr>
390
<td>-iob</td>
391
<td>&nbsp;</td>
392
<td>False</td>
393
<td>AUTO</td>
394
</tr>
395
<tr>
396
<td>-equivalent_register_removal</td>
397
<td>&nbsp;</td>
398
<td>YES</td>
399
<td>YES</td>
400
</tr>
401
<tr>
402
<td>-slice_utilization_ratio_maxmargin</td>
403
<td>&nbsp;</td>
404
<td>5</td>
405
<td>0%</td>
406
</tr>
407
</TABLE>
408
<A NAME="Translation Property Settings"></A>
409
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
410
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
411
<TD ALIGN=CENTER COLSPAN='4'><B>Translation Property Settings </B></TD>
412
</tr>
413
<tr bgcolor='#ffff99'>
414
<td><b>Switch Name</b></td>
415
<td><b>Property Name</b></td>
416
<td><b>Value</b></td>
417
<td><b>Default Value</b></td>
418
</tr>
419
<tr>
420
<td>-intstyle</td>
421
<td>&nbsp;</td>
422
<td>ise</td>
423
<td>None</td>
424
</tr>
425
<tr>
426
<td>-dd</td>
427
<td>&nbsp;</td>
428
<td>_ngo</td>
429
<td>None</td>
430
</tr>
431
<tr>
432
<td>-p</td>
433
<td>&nbsp;</td>
434
<td>xc3s1000-ft256-4</td>
435
<td>None</td>
436
</tr>
437
<tr>
438
<td>-sd</td>
439
<td>Macro Search Path</td>
440
<td>ipcore_dir</td>
441
<td>None</td>
442
</tr>
443
<tr>
444
<td>-uc</td>
445
<td>&nbsp;</td>
446
<td>vtach.ucf</td>
447
<td>None</td>
448
</tr>
449
</TABLE>
450
<A NAME="Map Property Settings"></A>
451
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
452
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
453
<TD ALIGN=CENTER COLSPAN='4'><B>Map Property Settings </B></TD>
454
</tr>
455
<tr bgcolor='#ffff99'>
456
<td><b>Switch Name</b></td>
457
<td><b>Property Name</b></td>
458
<td><b>Value</b></td>
459
<td><b>Default Value</b></td>
460
</tr>
461
<tr>
462
<td>-ol</td>
463
<td>Place & Route Effort Level (Overall)</td>
464
<td>high</td>
465
<td>high</td>
466
</tr>
467
<tr>
468
<td>-xe</td>
469
<td>Placer Extra Effort Map</td>
470
<td>NORMAL</td>
471
<td>&nbsp;</td>
472
</tr>
473
<tr>
474
<td>-ir</td>
475
<td>Use RLOC Constraints</td>
476
<td>OFF</td>
477
<td>OFF</td>
478
</tr>
479
<tr>
480
<td>-ignore_keep_hierarchy</td>
481
<td>Allow Logic Optimization Across Hierarchy</td>
482
<td>TRUE</td>
483
<td>FALSE</td>
484
</tr>
485
<tr>
486
<td>-logic_opt</td>
487
<td>Combinatorial Logic Optimization</td>
488
<td>TRUE</td>
489
<td>FALSE</td>
490
</tr>
491
<tr>
492
<td>-t</td>
493
<td>Starting Placer Cost Table (1-100) Map</td>
494
<td>1</td>
495
<td>0</td>
496
</tr>
497
<tr>
498
<td>-register_duplication</td>
499
<td>Register Duplication Map</td>
500
<td>TRUE</td>
501
<td>FALSE</td>
502
</tr>
503
<tr>
504
<td>-cm</td>
505
<td>Optimization Strategy (Cover Mode)</td>
506
<td>speed</td>
507
<td>area</td>
508
</tr>
509
<tr>
510
<td>-intstyle</td>
511
<td>&nbsp;</td>
512
<td>ise</td>
513
<td>None</td>
514
</tr>
515
<tr>
516
<td>-o</td>
517
<td>&nbsp;</td>
518
<td>top_map.ncd</td>
519
<td>None</td>
520
</tr>
521
<tr>
522
<td>-pr</td>
523
<td>Pack I/O Registers/Latches into IOBs</td>
524
<td>off</td>
525
<td>off</td>
526
</tr>
527
<tr>
528
<td>-p</td>
529
<td>&nbsp;</td>
530
<td>xc3s1000-ft256-4</td>
531
<td>None</td>
532
</tr>
533
</TABLE>
534
<A NAME="Place and Route Property Settings"></A>
535
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
536
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
537
<TD ALIGN=CENTER COLSPAN='4'><B>Place and Route Property Settings </B></TD>
538
</tr>
539
<tr bgcolor='#ffff99'>
540
<td><b>Switch Name</b></td>
541
<td><b>Property Name</b></td>
542
<td><b>Value</b></td>
543
<td><b>Default Value</b></td>
544
</tr>
545
<tr>
546
<td>-t</td>
547
<td>&nbsp;</td>
548
<td>1</td>
549
<td>1</td>
550
</tr>
551
<tr>
552
<td>-xe</td>
553
<td>&nbsp;</td>
554
<td>n</td>
555
<td>None</td>
556
</tr>
557
<tr>
558
<td>-intstyle</td>
559
<td>&nbsp;</td>
560
<td>ise</td>
561
<td>&nbsp;</td>
562
</tr>
563
<tr>
564
<td>-w</td>
565
<td>&nbsp;</td>
566
<td>true</td>
567
<td>false</td>
568
</tr>
569
<tr>
570
<td>-pl</td>
571
<td>Placer Effort Level (Overrides Overall Level)</td>
572
<td>high</td>
573
<td>std</td>
574
</tr>
575
<tr>
576
<td>-rl</td>
577
<td>Router Effort Level (Overrides Overall Level)</td>
578
<td>high</td>
579
<td>std</td>
580
</tr>
581
</TABLE>
582
<A NAME="Operating System Information"></A>
583
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
584
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
585
<TD ALIGN=CENTER COLSPAN='5'><B> Operating System Information </B></TD>
586
</tr>
587
<tr bgcolor='#ffff99'>
588
<td><b>Operating System Information</b></td>
589
<td><b>xst</b></td>
590
<td><b>ngdbuild</b></td>
591
<td><b>map</b></td>
592
<td><b>par</b></td>
593
</tr>
594
<tr>
595
<td>CPU Architecture/Speed</td>
596
<td>AMD Phenom(tm) II X6 1100T Processor/3700.000 MHz</td>
597
<td>AMD Phenom(tm) II X6 1100T Processor/800.000 MHz</td>
598
<td>AMD Phenom(tm) II X6 1100T Processor/3700.000 MHz</td>
599
<td>AMD Phenom(tm) II X6 1100T Processor/800.000 MHz</td>
600
</tr>
601
<tr>
602
<td>Host</td>
603
<td>enterprise</td>
604
<td>enterprise</td>
605
<td>enterprise</td>
606
<td>enterprise</td>
607
</tr>
608
<tr>
609
<td>OS Name</td>
610
<td>Ubuntu</td>
611
<td>Ubuntu</td>
612
<td>Ubuntu</td>
613
<td>Ubuntu</td>
614
</tr>
615
<tr>
616
<td>OS Release</td>
617
<td>Ubuntu 13.04</td>
618
<td>Ubuntu 13.04</td>
619
<td>Ubuntu 13.04</td>
620
<td>Ubuntu 13.04</td>
621
</tr>
622
</TABLE>
623
</BODY> </HTML>

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.