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wd5gnr |
Release 13.2 Physical Synthesis Report O.61xd (lin64)
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Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved.
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TABLE OF CONTENTS
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1) Physical Synthesis Options Summary
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2) Optimizations statistics and details
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=========================================================================
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* Physical Synthesis Options Summary *
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=========================================================================
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---- Options
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Global Optimization : OFF
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Retiming : OFF
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Equivalent Register Removal : OFF
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Timing-Driven Packing and Placement : ON
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Logic Optimization : ON
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Register Duplication : ON
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---- Intelligent clock gating : OFF
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---- Target Parameters
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Target Device : 3s1000ft256-4
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=========================================================================
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=========================================================================
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* Optimizations *
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=========================================================================
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---- Statistics
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No sequential optimizations have been performed.
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Flops added for Enable Generation
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