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[/] [warp/] [rtl/] [tmu_filter.v] - Blame information for rev 7

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1 7 lekernel
/*
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 * Milkymist VJ SoC
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 * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
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 *
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 * This program is free and excepted software; you can use it, redistribute it
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 * and/or modify it under the terms of the Exception General Public License as
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 * published by the Exception License Foundation; either version 2 of the
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 * License, or (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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 * FOR A PARTICULAR PURPOSE. See the Exception General Public License for more
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 * details.
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 *
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 * You should have received a copy of the Exception General Public License along
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 * with this project; if not, write to the Exception License Foundation.
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 */
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module tmu_filter(
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        input sys_clk,
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        input sys_rst,
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        output busy,
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        input [10:0] src_hres,
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        input [10:0] src_vres,
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        input [10:0] dst_hres,
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        input [10:0] dst_vres,
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        input [10:0] hoffset,
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        input [10:0] voffset,
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        input pipe_stb_i,
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        output pipe_ack_o,
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        input [10:0] P_X,
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        input [10:0] P_Y,
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        input [10:0] P_U,
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        input [10:0] P_V,
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        output pipe_stb_o,
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        input pipe_ack_i,
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        output reg [10:0] P_Xf,
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        output reg [10:0] P_Yf,
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        output reg [10:0] P_Uf,
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        output reg [10:0] P_Vf
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);
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wire en;
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wire s0_valid;
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wire s1_valid;
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reg s1_valid_r;
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always @(posedge sys_clk) begin
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        if(sys_rst)
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                s1_valid_r <= 1'b0;
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        else if(en) begin
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                if((P_X >= hoffset) & (P_Y >= voffset) & (P_U < src_hres) & (P_V < src_vres))
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                        s1_valid_r <= s0_valid;
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                else
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                        s1_valid_r <= 1'b0;
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                P_Xf <= P_X - hoffset;
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                P_Yf <= P_Y - voffset;
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                P_Uf <= P_U;
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                P_Vf <= P_V;
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        end
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end
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assign s1_valid = s1_valid_r & (P_Xf < dst_hres) & (P_Yf < dst_vres);
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/* Pipeline management */
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assign busy = s1_valid;
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assign s0_valid = pipe_stb_i;
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assign pipe_ack_o = pipe_ack_i;
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assign en = pipe_ack_i;
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assign pipe_stb_o = s1_valid;
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endmodule

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