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[/] [wbuart32/] [trunk/] [bench/] [cpp/] [linetest.cpp] - Blame information for rev 26

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////////////////////////////////////////////////////////////////////////////////
//
// Filename:    linetest.cpp
//
// Project:     wbuart32, a full featured UART with simulator
//
// Purpose:     To create a pass-through test of the receiver and transmitter
//              which can be exercised/proven via Verilator.
//
//      If you run this program with no arguments, it will run an automatic
//      test, returning "PASS" on success, or "FAIL" on failure as a last
//      output line--hence it should support automated testing.
//
//      If you run with a '-i' argument, the program will run interactively.
//      It will then be up to you to determine if it works (or not).  As
//      always, it may be killed with a control C.
//
// Creator:     Dan Gisselquist, Ph.D.
//              Gisselquist Technology, LLC
//
////////////////////////////////////////////////////////////////////////////////
//
// Copyright (C) 2015-2019, Gisselquist Technology, LLC
//
// This program is free software (firmware): you can redistribute it and/or
// modify it under the terms of  the GNU General Public License as published
// by the Free Software Foundation, either version 3 of the License, or (at
// your option) any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with this program.  (It's in the $(ROOT)/doc directory, run make with no
// target there if the PDF file isn't present.)  If not, see
// <http://www.gnu.org/licenses/> for a copy.
//
// License:     GPL, v3, as defined and found on www.gnu.org,
//              http://www.gnu.org/licenses/gpl.html
//
//
////////////////////////////////////////////////////////////////////////////////
//
//
#include <verilatedos.h>
#include <stdio.h>
#include <fcntl.h>
#include <unistd.h>
#include <string.h>
#include <time.h>
#include <sys/types.h>
#include <sys/wait.h>
#include <signal.h>
#include "verilated.h"
#include "Vlinetest.h"
#include "verilated_vcd_c.h"
#include "uartsim.h"
 
int     main(int argc, char **argv) {
        Verilated::commandArgs(argc, argv);
        Vlinetest       tb;
        UARTSIM         *uart;
        bool            run_interactively = false;
        int             port = 0;
        unsigned        setup = 868;
        char string[] = "This is a UART testing string\r\n";
 
        for(int argn=1; argn<argc; argn++) {
                if (argv[argn][0] == '-') for(int j=1; (j<1000)&&(argv[argn][j]); j++)
                switch(argv[argn][j]) {
                        case 'i':
                                run_interactively = true;
                                break;
                        case 'p':
                                port = atoi(argv[argn++]); j+= 4000;
                                run_interactively = true;
                                break;
                        case 's':
                                setup= strtoul(argv[++argn], NULL, 0); j+= 4000;
                                break;
                        default:
                                printf("Undefined option, -%c\n", argv[argn][j]);
                                break;
                }
        }
 
        tb.i_setup = setup;
        int baudclocks = setup & 0x0ffffff;
        tb.i_uart_rx = 1;
        if (run_interactively) {
                uart = new UARTSIM(port);
                uart->setup(tb.i_setup);
 
                while(1) {
 
                        tb.i_clk = 1;
                        tb.eval();
                        tb.i_clk = 0;
                        tb.eval();
 
                        tb.i_uart_rx = (*uart)(tb.o_uart_tx);
                }
 
        } else {
                int     childs_stdin[2], childs_stdout[2];
 
                if ((pipe(childs_stdin)!=0)||(pipe(childs_stdout) != 0)) {
                        fprintf(stderr, "ERR setting up child pipes\n");
                        perror("O/S ERR");
                        printf("TEST FAILURE\n");
                        exit(EXIT_FAILURE);
                }
 
                pid_t childs_pid = fork();
 
                if (childs_pid < 0) {
                        fprintf(stderr, "ERR setting up child process\n");
                        perror("O/S ERR");
                        printf("TEST FAILURE\n");
                        exit(EXIT_FAILURE);
                }
 
                if (childs_pid) {
                        int     nr=-2, nw;
 
                        // We are the parent
                        close(childs_stdin[ 0]); // Close the read end
                        close(childs_stdout[1]); // Close the write end
 
                        char test[256];
 
                        nw = write(childs_stdin[1], string, strlen(string));
                        if (nw == (int)strlen(string)) {
                                int     rpos = 0;
                                test[0] = '\0';
                                while((rpos<nw)
                                        &&(0<(nr=read(childs_stdout[0],
                                                &test[rpos], strlen(string)-rpos))))
                                        rpos += nr;
 
                                nr = rpos;
                                if (rpos > 0)
                                        test[rpos] = '\0';
                                printf("Successfully read %d characters: %s\n", nr, test);
                        }
 
                        int     status = 0, rv = -1;
 
                        // Give the child the oppoortunity to take another
                        // 60 seconds to finish closing itself
                        for(int waitcount=0; waitcount < 60; waitcount++) {
                                rv = waitpid(-1, &status, WNOHANG);
                                if (rv == childs_pid)
                                        break;
                                else if (rv < 0)
                                        break;
                                else // rv == 0
                                        sleep(1);
                        }
 
                        if (rv != childs_pid) {
                                kill(childs_pid, SIGTERM);
                                printf("WARNING: Child/simulator did not terminate normally\n");
                        }
 
                        if (WEXITSTATUS(status) != EXIT_SUCCESS) {
                                printf("WARNING: Child/simulator exit status does not indicate success\n");
                        }
 
                        if ((nr == nw)&&(nw == (int)strlen(string))
                                        &&(strcmp(test, string) == 0)) {
                                printf("PASS!\n");
                                exit(EXIT_SUCCESS);
                        } else {
                                printf("TEST FAILED\n");
                                exit(EXIT_FAILURE);
                        }
                } else {
                        close(childs_stdin[ 1]);
                        close(childs_stdout[0]);
                        close(STDIN_FILENO);
                        if (dup(childs_stdin[0]) < 0) {
                                fprintf(stderr, "ERR setting up child FD\n");
                                perror("O/S ERR");
                                exit(EXIT_FAILURE);
                        }
                        close(STDOUT_FILENO);
                        if (dup(childs_stdout[1]) < 0) {
                                fprintf(stderr, "ERR setting up child FD\n");
                                perror("O/S ERR");
                                exit(EXIT_FAILURE);
                        }
 
                        // UARTSIM(0) uses stdin and stdout for its FD's
                        uart = new UARTSIM(0);
                        uart->setup(tb.i_setup);
 
                        // Make sure we don't run longer than 4 seconds ...
                        time_t  start = time(NULL);
                        int     iterations_before_check = 2048;
                        unsigned        clocks = 0;
                        bool    done = false;
 
#define VCDTRACE
#ifdef  VCDTRACE
                        Verilated::traceEverOn(true);
                        VerilatedVcdC* tfp = new VerilatedVcdC;
                        tb.trace(tfp, 99);
                        tfp->open("linetest.vcd");
#define TRACE_POSEDGE   tfp->dump(10*clocks)
#define TRACE_NEGEDGE   tfp->dump(10*clocks+5)
#define TRACE_CLOSE     tfp->close()
#else
#define TRACE_POSEDGE   while(0)
#define TRACE_NEGEDGE   while(0)
#define TRACE_CLOSE     while(0)
#endif
 
                        for(int i=0; i<(baudclocks*24); i++) {
                                // Clear any initial break condition
                                tb.i_clk = 1;
                                tb.eval();
                                tb.i_clk = 0;
                                tb.eval();
 
                                tb.i_uart_rx = 1;
                        }
 
                        while(clocks < 2*(baudclocks*16)*strlen(string)) {
                                tb.i_clk = 1;
                                tb.eval();
                                TRACE_POSEDGE;
                                tb.i_clk = 0;
                                tb.eval();
                                TRACE_NEGEDGE;
                                clocks++;
 
                                tb.i_uart_rx = (*uart)(tb.o_uart_tx);
 
                                if (false) {
                                        /*
                                        static long counts = 0;
                                        static int lasti = 1, lasto = 1;
                                        bool    writeout = false;
 
                                        counts++;
                                        if (lasti != tb.i_uart) {
                                                writeout = true;
                                                lasti = tb.i_uart;
                                        } if (lasto != tb.o_uart) {
                                                writeout = true;
                                                lasto = tb.o_uart;
                                        }
 
                                        if (writeout) {
                                        fprintf(stderr, "%08lx : [%d -> %d] %02x:%02x (%02x/%d) %d,%d->%02x [%2d/%d/%08x]\n",
                                                counts, tb.i_uart, tb.o_uart,
                                                tb.v__DOT__head,
                                                tb.v__DOT__tail,
                                                tb.v__DOT__lineend,
                                                tb.v__DOT__run_tx,
                                                tb.v__DOT__tx_stb,
                                                tb.v__DOT__transmitter__DOT__r_busy,
                                                tb.v__DOT__tx_data & 0x0ff,
                                                tb.v__DOT__transmitter__DOT__state,
                                                tb.v__DOT__transmitter__DOT__zero_baud_counter,
                                                tb.v__DOT__transmitter__DOT__baud_counter);
                                        } */
                                }
 
                                if (iterations_before_check-- <= 0) {
                                        iterations_before_check = 2048;
                                        done = ((time(NULL)-start)>60);
                                        if (done)
                                        fprintf(stderr, "CHILD-TIMEOUT\n");
                                }
                        }
 
                        TRACE_CLOSE;
 
                        exit(EXIT_SUCCESS);
                }
        }
}

Line No.	Rev	Author	Line
1	2	dgisselq	`////////////////////////////////////////////////////////////////////////////////`
2			`//`
3			`// Filename: linetest.cpp`
4			`//`
5			`// Project: wbuart32, a full featured UART with simulator`
6			`//`
7			`// Purpose: To create a pass-through test of the receiver and transmitter`
8			`// which can be exercised/proven via Verilator.`
9			`//`
10			`// If you run this program with no arguments, it will run an automatic`
11	5	dgisselq	`// test, returning "PASS" on success, or "FAIL" on failure as a last`
12	2	dgisselq	`// output line--hence it should support automated testing.`
13			`//`
14			`// If you run with a '-i' argument, the program will run interactively.`
15			`// It will then be up to you to determine if it works (or not). As`
16			`// always, it may be killed with a control C.`
17			`//`
18			`// Creator: Dan Gisselquist, Ph.D.`
19			`// Gisselquist Technology, LLC`
20			`//`
21			`////////////////////////////////////////////////////////////////////////////////`
22			`//`
23	26	dgisselq	`// Copyright (C) 2015-2019, Gisselquist Technology, LLC`
24	2	dgisselq	`//`
25			`// This program is free software (firmware): you can redistribute it and/or`
26			`// modify it under the terms of the GNU General Public License as published`
27			`// by the Free Software Foundation, either version 3 of the License, or (at`
28			`// your option) any later version.`
29			`//`
30			`// This program is distributed in the hope that it will be useful, but WITHOUT`
31			`// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or`
32			`// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License`
33			`// for more details.`
34			`//`
35			`// You should have received a copy of the GNU General Public License along`
36			`// with this program. (It's in the $(ROOT)/doc directory, run make with no`
37			`// target there if the PDF file isn't present.) If not, see`
38			`// <http://www.gnu.org/licenses/> for a copy.`
39			`//`
40			`// License: GPL, v3, as defined and found on www.gnu.org,`
41			`// http://www.gnu.org/licenses/gpl.html`
42			`//`
43			`//`
44			`////////////////////////////////////////////////////////////////////////////////`
45			`//`
46			`//`
47	18	dgisselq	`#include <verilatedos.h>`
48	2	dgisselq	`#include <stdio.h>`
49			`#include <fcntl.h>`
50			`#include <unistd.h>`
51			`#include <string.h>`
52			`#include <time.h>`
53			`#include <sys/types.h>`
54	5	dgisselq	`#include <sys/wait.h>`
55	2	dgisselq	`#include <signal.h>`
56			`#include "verilated.h"`
57			`#include "Vlinetest.h"`
58	5	dgisselq	`#include "verilated_vcd_c.h"`
59	2	dgisselq	`#include "uartsim.h"`
60
61			`int main(int argc, char **argv) {`
62			`Verilated::commandArgs(argc, argv);`
63			`Vlinetest tb;`
64			`UARTSIM *uart;`
65			`bool run_interactively = false;`
66			`int port = 0;`
67	15	dgisselq	`unsigned setup = 868;`
68	5	dgisselq	`char string[] = "This is a UART testing string\r\n";`
69	2	dgisselq
70			`for(int argn=1; argn<argc; argn++) {`
71			`if (argv[argn][0] == '-') for(int j=1; (j<1000)&&(argv[argn][j]); j++)`
72			`switch(argv[argn][j]) {`
73			`case 'i':`
74			`run_interactively = true;`
75			`break;`
76			`case 'p':`
77			`port = atoi(argv[argn++]); j+= 4000;`
78			`run_interactively = true;`
79			`break;`
80			`case 's':`
81	3	dgisselq	`setup= strtoul(argv[++argn], NULL, 0); j+= 4000;`
82	2	dgisselq	`break;`
83			`default:`
84			`printf("Undefined option, -%c\n", argv[argn][j]);`
85			`break;`
86			`}`
87			`}`
88
89			`tb.i_setup = setup;`
90	5	dgisselq	`int baudclocks = setup & 0x0ffffff;`
91			`tb.i_uart_rx = 1;`
92	2	dgisselq	`if (run_interactively) {`
93			`uart = new UARTSIM(port);`
94			`uart->setup(tb.i_setup);`
95
96			`while(1) {`
97
98			`tb.i_clk = 1;`
99			`tb.eval();`
100			`tb.i_clk = 0;`
101			`tb.eval();`
102
103	5	dgisselq	`tb.i_uart_rx = (*uart)(tb.o_uart_tx);`
104	2	dgisselq	`}`
105
106			`} else {`
107			`int childs_stdin[2], childs_stdout[2];`
108
109			`if ((pipe(childs_stdin)!=0)\|\|(pipe(childs_stdout) != 0)) {`
110			`fprintf(stderr, "ERR setting up child pipes\n");`
111			`perror("O/S ERR");`
112			`printf("TEST FAILURE\n");`
113			`exit(EXIT_FAILURE);`
114			`}`
115
116	5	dgisselq	`pid_t childs_pid = fork();`
117	2	dgisselq
118	5	dgisselq	`if (childs_pid < 0) {`
119	2	dgisselq	`fprintf(stderr, "ERR setting up child process\n");`
120			`perror("O/S ERR");`
121			`printf("TEST FAILURE\n");`
122			`exit(EXIT_FAILURE);`
123			`}`
124
125	5	dgisselq	`if (childs_pid) {`
126	2	dgisselq	`int nr=-2, nw;`
127
128			`// We are the parent`
129			`close(childs_stdin[ 0]); // Close the read end`
130			`close(childs_stdout[1]); // Close the write end`
131
132			`char test[256];`
133
134			`nw = write(childs_stdin[1], string, strlen(string));`
135			`if (nw == (int)strlen(string)) {`
136			`int rpos = 0;`
137			`test[0] = '\0';`
138			`while((rpos<nw)`
139			`&&(0<(nr=read(childs_stdout[0],`
140			`&test[rpos], strlen(string)-rpos))))`
141			`rpos += nr;`
142
143			`nr = rpos;`
144			`if (rpos > 0)`
145			`test[rpos] = '\0';`
146			`printf("Successfully read %d characters: %s\n", nr, test);`
147			`}`
148
149	5	dgisselq	`int status = 0, rv = -1;`
150	2	dgisselq
151	5	dgisselq	`// Give the child the oppoortunity to take another`
152			`// 60 seconds to finish closing itself`
153			`for(int waitcount=0; waitcount < 60; waitcount++) {`
154			`rv = waitpid(-1, &status, WNOHANG);`
155			`if (rv == childs_pid)`
156			`break;`
157			`else if (rv < 0)`
158			`break;`
159			`else // rv == 0`
160			`sleep(1);`
161			`}`
162
163			`if (rv != childs_pid) {`
164			`kill(childs_pid, SIGTERM);`
165			`printf("WARNING: Child/simulator did not terminate normally\n");`
166			`}`
167
168			`if (WEXITSTATUS(status) != EXIT_SUCCESS) {`
169			`printf("WARNING: Child/simulator exit status does not indicate success\n");`
170			`}`
171
172	2	dgisselq	`if ((nr == nw)&&(nw == (int)strlen(string))`
173	5	dgisselq	`&&(strcmp(test, string) == 0)) {`
174			`printf("PASS!\n");`
175			`exit(EXIT_SUCCESS);`
176			`} else {`
177	2	dgisselq	`printf("TEST FAILED\n");`
178	5	dgisselq	`exit(EXIT_FAILURE);`
179			`}`
180	2	dgisselq	`} else {`
181			`close(childs_stdin[ 1]);`
182			`close(childs_stdout[0]);`
183			`close(STDIN_FILENO);`
184			`if (dup(childs_stdin[0]) < 0) {`
185			`fprintf(stderr, "ERR setting up child FD\n");`
186			`perror("O/S ERR");`
187			`exit(EXIT_FAILURE);`
188			`}`
189			`close(STDOUT_FILENO);`
190			`if (dup(childs_stdout[1]) < 0) {`
191			`fprintf(stderr, "ERR setting up child FD\n");`
192			`perror("O/S ERR");`
193			`exit(EXIT_FAILURE);`
194			`}`
195
196			`// UARTSIM(0) uses stdin and stdout for its FD's`
197			`uart = new UARTSIM(0);`
198			`uart->setup(tb.i_setup);`
199
200			`// Make sure we don't run longer than 4 seconds ...`
201			`time_t start = time(NULL);`
202			`int iterations_before_check = 2048;`
203	5	dgisselq	`unsigned clocks = 0;`
204	2	dgisselq	`bool done = false;`
205
206	5	dgisselq	`#define VCDTRACE`
207			`#ifdef VCDTRACE`
208			`Verilated::traceEverOn(true);`
209			`VerilatedVcdC* tfp = new VerilatedVcdC;`
210			`tb.trace(tfp, 99);`
211			`tfp->open("linetest.vcd");`
212			`#define TRACE_POSEDGE tfp->dump(10*clocks)`
213			`#define TRACE_NEGEDGE tfp->dump(10*clocks+5)`
214			`#define TRACE_CLOSE tfp->close()`
215			`#else`
216			`#define TRACE_POSEDGE while(0)`
217			`#define TRACE_NEGEDGE while(0)`
218			`#define TRACE_CLOSE while(0)`
219			`#endif`
220
221			`for(int i=0; i<(baudclocks*24); i++) {`
222	2	dgisselq	`// Clear any initial break condition`
223			`tb.i_clk = 1;`
224			`tb.eval();`
225			`tb.i_clk = 0;`
226			`tb.eval();`
227
228	5	dgisselq	`tb.i_uart_rx = 1;`
229	2	dgisselq	`}`
230
231	5	dgisselq	`while(clocks < 2(baudclocks16)*strlen(string)) {`
232	2	dgisselq	`tb.i_clk = 1;`
233			`tb.eval();`
234	5	dgisselq	`TRACE_POSEDGE;`
235	2	dgisselq	`tb.i_clk = 0;`
236			`tb.eval();`
237	5	dgisselq	`TRACE_NEGEDGE;`
238			`clocks++;`
239	2	dgisselq
240	5	dgisselq	`tb.i_uart_rx = (*uart)(tb.o_uart_tx);`
241	2	dgisselq
242	3	dgisselq	`if (false) {`
243	5	dgisselq	`/*`
244	3	dgisselq	`static long counts = 0;`
245			`static int lasti = 1, lasto = 1;`
246			`bool writeout = false;`
247	2	dgisselq
248	3	dgisselq	`counts++;`
249			`if (lasti != tb.i_uart) {`
250			`writeout = true;`
251			`lasti = tb.i_uart;`
252			`} if (lasto != tb.o_uart) {`
253			`writeout = true;`
254			`lasto = tb.o_uart;`
255			`}`
256
257			`if (writeout) {`
258			`fprintf(stderr, "%08lx : [%d -> %d] %02x:%02x (%02x/%d) %d,%d->%02x [%2d/%d/%08x]\n",`
259			`counts, tb.i_uart, tb.o_uart,`
260			`tb.v__DOT__head,`
261			`tb.v__DOT__tail,`
262			`tb.v__DOT__lineend,`
263			`tb.v__DOT__run_tx,`
264			`tb.v__DOT__tx_stb,`
265			`tb.v__DOT__transmitter__DOT__r_busy,`
266			`tb.v__DOT__tx_data & 0x0ff,`
267			`tb.v__DOT__transmitter__DOT__state,`
268			`tb.v__DOT__transmitter__DOT__zero_baud_counter,`
269			`tb.v__DOT__transmitter__DOT__baud_counter);`
270	5	dgisselq	`} */`
271	3	dgisselq	`}`
272
273	2	dgisselq	`if (iterations_before_check-- <= 0) {`
274			`iterations_before_check = 2048;`
275			`done = ((time(NULL)-start)>60);`
276			`if (done)`
277			`fprintf(stderr, "CHILD-TIMEOUT\n");`
278			`}`
279			`}`
280	5	dgisselq
281			`TRACE_CLOSE;`
282
283			`exit(EXIT_SUCCESS);`
284			`}`
285	2	dgisselq	`}`
286			`}`

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