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[/] [wbuart32/] [trunk/] [bench/] [verilog/] [Makefile] - Blame information for rev 2

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1 2 dgisselq
################################################################################
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##
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## Filename:    Makefile
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##
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## Project:     wbuart32, a full featured UART with simulator
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##
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## Purpose:     To direct the Verilator build of the Verilog portion of the
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##              bench test.  The result is C++ code (built by Verilator), that
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##      is then built (herein) into a library.
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##
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## Targets:     The default target, all, builds the target test, which includes
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##              the linetest Verilator library necessary for testing.
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##
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## Creator:     Dan Gisselquist, Ph.D.
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##              Gisselquist Technology, LLC
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##
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################################################################################
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##
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## Copyright (C) 2015-2016, Gisselquist Technology, LLC
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##
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## This program is free software (firmware): you can redistribute it and/or
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## modify it under the terms of  the GNU General Public License as published
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## by the Free Software Foundation, either version 3 of the License, or (at
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## your option) any later version.
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##
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## This program is distributed in the hope that it will be useful, but WITHOUT
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## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
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## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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## for more details.
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##
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## You should have received a copy of the GNU General Public License along
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## with this program.  (It's in the $(ROOT)/doc directory, run make with no
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## target there if the PDF file isn't present.)  If not, see
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##  for a copy.
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##
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## License:     GPL, v3, as defined and found on www.gnu.org,
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##              http://www.gnu.org/licenses/gpl.html
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##
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################################################################################
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##
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##
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all:    test
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YYMMDD=`date +%Y%m%d`
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CXX   := g++
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FBDIR := .
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VDIRFB:= $(FBDIR)/obj_dir
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RTLDR := ../../rtl
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.PHONY: test
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test: $(VDIRFB)/Vlinetest__ALL.a
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$(VDIRFB)/Vlinetest__ALL.a: $(VDIRFB)/Vlinetest.h $(VDIRFB)/Vlinetest.cpp
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$(VDIRFB)/Vlinetest__ALL.a: $(VDIRFB)/Vlinetest.mk
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$(VDIRFB)/Vlinetest.h $(VDIRFB)/Vlinetest.cpp $(VDIRFB)/Vlinetest.mk: linetest.v
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$(VDIRFB)/Vlinetest.h $(VDIRFB)/Vlinetest.cpp $(VDIRFB)/Vlinetest.mk: $(RTLDR)/rxuart.v $(RTLDR)/txuart.v
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$(VDIRFB)/V%.cpp $(VDIRFB)/V%.h $(VDIRFB)/V%.mk: $(FBDIR)/%.v
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        verilator -cc -y ../../rtl $*.v
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$(VDIRFB)/V%__ALL.a: $(VDIRFB)/V%.mk
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        cd $(VDIRFB); make -f V$*.mk
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.PHONY: clean
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clean:
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        rm -rf $(VDIRFB)/*.mk
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        rm -rf $(VDIRFB)/*.cpp
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        rm -rf $(VDIRFB)/*.h
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        rm -rf $(VDIRFB)/
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