| 1 |
2 |
dgisselq |
################################################################################
|
| 2 |
|
|
##
|
| 3 |
|
|
## Filename: Makefile
|
| 4 |
|
|
##
|
| 5 |
|
|
## Project: wbuart32, a full featured UART with simulator
|
| 6 |
|
|
##
|
| 7 |
|
|
## Purpose: To direct the Verilator build of the SoC sources. The result
|
| 8 |
|
|
## is C++ code (built by Verilator), that is then built (herein)
|
| 9 |
|
|
## into a library.
|
| 10 |
|
|
##
|
| 11 |
|
|
## Targets: The default target, all, builds the target test, which includes
|
| 12 |
|
|
## the libraries necessary for Verilator testing.
|
| 13 |
|
|
##
|
| 14 |
|
|
## Creator: Dan Gisselquist, Ph.D.
|
| 15 |
|
|
## Gisselquist Technology, LLC
|
| 16 |
|
|
##
|
| 17 |
|
|
################################################################################
|
| 18 |
|
|
##
|
| 19 |
|
|
## Copyright (C) 2015-2016, Gisselquist Technology, LLC
|
| 20 |
|
|
##
|
| 21 |
|
|
## This program is free software (firmware): you can redistribute it and/or
|
| 22 |
|
|
## modify it under the terms of the GNU General Public License as published
|
| 23 |
|
|
## by the Free Software Foundation, either version 3 of the License, or (at
|
| 24 |
|
|
## your option) any later version.
|
| 25 |
|
|
##
|
| 26 |
|
|
## This program is distributed in the hope that it will be useful, but WITHOUT
|
| 27 |
|
|
## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
|
| 28 |
|
|
## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
| 29 |
|
|
## for more details.
|
| 30 |
|
|
##
|
| 31 |
|
|
## You should have received a copy of the GNU General Public License along
|
| 32 |
|
|
## with this program. (It's in the $(ROOT)/doc directory, run make with no
|
| 33 |
|
|
## target there if the PDF file isn't present.) If not, see
|
| 34 |
|
|
## for a copy.
|
| 35 |
|
|
##
|
| 36 |
|
|
## License: GPL, v3, as defined and found on www.gnu.org,
|
| 37 |
|
|
## http://www.gnu.org/licenses/gpl.html
|
| 38 |
|
|
##
|
| 39 |
|
|
################################################################################
|
| 40 |
|
|
##
|
| 41 |
|
|
##
|
| 42 |
|
|
all: test
|
| 43 |
|
|
YYMMDD=`date +%Y%m%d`
|
| 44 |
|
|
CXX := g++
|
| 45 |
|
|
FBDIR := .
|
| 46 |
|
|
VDIRFB:= $(FBDIR)/obj_dir
|
| 47 |
|
|
|
| 48 |
|
|
.PHONY: test
|
| 49 |
|
|
test: $(VDIRFB)/Vtxuart__ALL.a
|
| 50 |
|
|
test: $(VDIRFB)/Vrxuart__ALL.a
|
| 51 |
5 |
dgisselq |
test: $(VDIRFB)/Vwbuart__ALL.a
|
| 52 |
2 |
dgisselq |
|
| 53 |
|
|
$(VDIRFB)/Vrxuart__ALL.a: $(VDIRFB)/Vrxuart.h $(VDIRFB)/Vrxuart.cpp
|
| 54 |
|
|
$(VDIRFB)/Vrxuart__ALL.a: $(VDIRFB)/Vrxuart.mk
|
| 55 |
|
|
$(VDIRFB)/Vrxuart.h $(VDIRFB)/Vrxuart.cpp $(VDIRFB)/Vrxuart.mk: rxuart.v
|
| 56 |
|
|
|
| 57 |
|
|
$(VDIRFB)/Vtxuart__ALL.a: $(VDIRFB)/Vtxuart.h $(VDIRFB)/Vtxuart.cpp
|
| 58 |
|
|
$(VDIRFB)/Vtxuart__ALL.a: $(VDIRFB)/Vtxuart.mk
|
| 59 |
|
|
$(VDIRFB)/Vtxuart.h $(VDIRFB)/Vtxuart.cpp $(VDIRFB)/Vtxuart.mk: txuart.v
|
| 60 |
|
|
|
| 61 |
5 |
dgisselq |
$(VDIRFB)/Vwbuart__ALL.a: $(VDIRFB)/Vwbuart.h $(VDIRFB)/Vwbuart.cpp
|
| 62 |
|
|
$(VDIRFB)/Vwbuart__ALL.a: $(VDIRFB)/Vwbuart.mk
|
| 63 |
|
|
$(VDIRFB)/Vwbuart.h $(VDIRFB)/Vwbuart.cpp $(VDIRFB)/Vwbuart.mk: wbuart.v ufifo.v txuart.v rxuart.v
|
| 64 |
|
|
|
| 65 |
2 |
dgisselq |
$(VDIRFB)/V%.cpp $(VDIRFB)/V%.h $(VDIRFB)/V%.mk: $(FBDIR)/%.v
|
| 66 |
|
|
verilator -cc $*.v
|
| 67 |
|
|
|
| 68 |
|
|
$(VDIRFB)/V%__ALL.a: $(VDIRFB)/V%.mk
|
| 69 |
|
|
cd $(VDIRFB); make -f V$*.mk
|
| 70 |
|
|
|
| 71 |
|
|
.PHONY: clean
|
| 72 |
|
|
clean:
|
| 73 |
|
|
rm -rf $(VDIRFB)/*.mk
|
| 74 |
|
|
rm -rf $(VDIRFB)/*.cpp
|
| 75 |
|
|
rm -rf $(VDIRFB)/*.h
|
| 76 |
|
|
rm -rf $(VDIRFB)/
|
| 77 |
|
|
|
