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[/] [wf3d/] [trunk/] [rtl/] [core/] [fm_sys.v] - Blame information for rev 9

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//=======================================================================
2
// Project Monophony
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//   Wire-Frame 3D Graphics Accelerator IP Core
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//
5
// File:
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//   fm_sys.v
7
//
8
// Abstract:
9
//   System register module
10
//
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// Author:
12 9 specular
//   Kenji Ishimaru (info.info.wf3d@gmail.com)
13 2 specular
//
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//======================================================================
15
//
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// Copyright (c) 2015, Kenji Ishimaru
17
// All rights reserved.
18
//
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// Redistribution and use in source and binary forms, with or without
20
// modification, are permitted provided that the following conditions are met:
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//
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//  -Redistributions of source code must retain the above copyright notice,
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//   this list of conditions and the following disclaimer.
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//  -Redistributions in binary form must reproduce the above copyright notice,
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//   this list of conditions and the following disclaimer in the documentation
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//   and/or other materials provided with the distribution.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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// THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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// PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
32
// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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// OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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// WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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// OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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// EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
40
// Revision History
41
 
42
`include "fm_3d_define.v"
43
module fm_sys (
44
  input         clk_core,
45
  input         rst_x,
46
  output        o_int,
47
  // internal interface
48
`ifdef D3D_WISHBONE
49
  input         i_wb_stb,
50
  input         i_wb_we,
51
  input  [7:2]  i_wb_adr,
52
  output        o_wb_ack,
53
  input  [3:0]  i_wb_sel,
54
  input  [31:0] i_wb_dat,
55
  output [31:0] o_wb_dat,
56
`else
57
  input         i_req,
58
  input         i_wr,
59
  input [7:0]   i_adrs,
60
  output        o_ack,
61
  input [3:0]   i_be,
62
  input [31:0]  i_wd,
63
  output        o_rstr,
64
  output [31:0] o_rd,
65
`endif
66
  // Geometry Engine Configurations
67
  //   vertex fetch
68
  output        o_dma_start,
69
  output [29:0] o_dma_top_address,  // bit[31:2]
70
  output [15:0] o_dma_size,
71
  input         i_geo_state,
72
  //   matrix elements  
73
`ifdef D3D_USE_MATRIX_PALETTE
74
  output [22*`D3D_NUM_OF_MATS-1:0] o_m00,
75
  output [22*`D3D_NUM_OF_MATS-1:0] o_m01,
76
  output [22*`D3D_NUM_OF_MATS-1:0] o_m02,
77
  output [22*`D3D_NUM_OF_MATS-1:0] o_m03,
78
  output [22*`D3D_NUM_OF_MATS-1:0] o_m10,
79
  output [22*`D3D_NUM_OF_MATS-1:0] o_m11,
80
  output [22*`D3D_NUM_OF_MATS-1:0] o_m12,
81
  output [22*`D3D_NUM_OF_MATS-1:0] o_m13,
82
  output [22*`D3D_NUM_OF_MATS-1:0] o_m20,
83
  output [22*`D3D_NUM_OF_MATS-1:0] o_m21,
84
  output [22*`D3D_NUM_OF_MATS-1:0] o_m22,
85
  output [22*`D3D_NUM_OF_MATS-1:0] o_m23,
86
  output [22*`D3D_NUM_OF_MATS-1:0] o_m30,
87
  output [22*`D3D_NUM_OF_MATS-1:0] o_m31,
88
  output [22*`D3D_NUM_OF_MATS-1:0] o_m32,
89
  output [22*`D3D_NUM_OF_MATS-1:0] o_m33,
90
  output [1:0] o_num_mats,
91
`else
92
  output [21:0] o_m00,
93
  output [21:0] o_m01,
94
  output [21:0] o_m02,
95
  output [21:0] o_m03,
96
  output [21:0] o_m10,
97
  output [21:0] o_m11,
98
  output [21:0] o_m12,
99
  output [21:0] o_m13,
100
  output [21:0] o_m20,
101
  output [21:0] o_m21,
102
  output [21:0] o_m22,
103
  output [21:0] o_m23,
104
  output [21:0] o_m30,
105
  output [21:0] o_m31,
106
  output [21:0] o_m32,
107
  output [21:0] o_m33,
108
`endif
109
  // curring
110
  output o_en_cull,
111
  output o_ccw,
112
  // viewport mapping
113
  output [21:0] o_vw,
114
  output [21:0] o_vh,
115
  // Rasterizer Configurations
116
  output [15:0] o_scr_w_m1,
117
  output [15:0] o_scr_h_m1,
118
  output [15:0] o_scr_w,
119
  output [29:0]  o_pixel_top_address,  // bit[31:2]
120
  output [7:0]  o_pixel_color,
121
  output        o_y_flip,
122
  input         i_ras_state,
123
  input         i_debug
124
);
125
 
126
//////////////////////////////////
127
// regs 
128
//////////////////////////////////
129
  // Geometry Engine Configurations
130
  //   vertex fetch
131
  reg           r_dma_start;
132
  reg [29:0]    r_dma_top_address;
133
  reg [15:0]    r_dma_size;
134
 
135
`ifdef D3D_USE_MATRIX_PALETTE
136
  reg [1:0]     r_num_mats;
137
  reg [1:0]     r_mat_bank;
138
  reg [21:0]    r_m00[`D3D_NUM_OF_MATS-1:0];
139
  reg [21:0]    r_m01[`D3D_NUM_OF_MATS-1:0];
140
  reg [21:0]    r_m02[`D3D_NUM_OF_MATS-1:0];
141
  reg [21:0]    r_m03[`D3D_NUM_OF_MATS-1:0];
142
  reg [21:0]    r_m10[`D3D_NUM_OF_MATS-1:0];
143
  reg [21:0]    r_m11[`D3D_NUM_OF_MATS-1:0];
144
  reg [21:0]    r_m12[`D3D_NUM_OF_MATS-1:0];
145
  reg [21:0]    r_m13[`D3D_NUM_OF_MATS-1:0];
146
  reg [21:0]    r_m20[`D3D_NUM_OF_MATS-1:0];
147
  reg [21:0]    r_m21[`D3D_NUM_OF_MATS-1:0];
148
  reg [21:0]    r_m22[`D3D_NUM_OF_MATS-1:0];
149
  reg [21:0]    r_m23[`D3D_NUM_OF_MATS-1:0];
150
  reg [21:0]    r_m30[`D3D_NUM_OF_MATS-1:0];
151
  reg [21:0]    r_m31[`D3D_NUM_OF_MATS-1:0];
152
  reg [21:0]    r_m32[`D3D_NUM_OF_MATS-1:0];
153
  reg [21:0]    r_m33[`D3D_NUM_OF_MATS-1:0];
154
`else
155
  reg [21:0]    r_m00;
156
  reg [21:0]    r_m01;
157
  reg [21:0]    r_m02;
158
  reg [21:0]    r_m03;
159
  reg [21:0]    r_m10;
160
  reg [21:0]    r_m11;
161
  reg [21:0]    r_m12;
162
  reg [21:0]    r_m13;
163
  reg [21:0]    r_m20;
164
  reg [21:0]    r_m21;
165
  reg [21:0]    r_m22;
166
  reg [21:0]    r_m23;
167
  reg [21:0]    r_m30;
168
  reg [21:0]    r_m31;
169
  reg [21:0]    r_m32;
170
  reg [21:0]    r_m33;
171
`endif
172
  // curring
173
  reg           r_en_cull;
174
  reg           r_ccw;
175
  // viewport mapping
176
  reg [21:0]    r_vw;
177
  reg [21:0]    r_vh;
178
  // Rasterizer Configurations
179
  reg [15:0]    r_scr_w_m1;
180
  reg [15:0]    r_scr_h_m1;
181
  reg [15:0]    r_scr_w;
182
  reg [29:0]    r_pixel_top_address;
183
  reg [7:0]     r_pixel_color;
184
  reg           r_y_flip;
185
 
186
  reg           r_rstr;
187
  reg [31:0]    r_rd;
188
  reg           r_int;
189
  reg           r_int_mask;
190
  reg           r_int_out;
191
 
192
//////////////////////////////////
193
// wire
194
//////////////////////////////////
195
  wire [21:0]    w_f22;
196
  wire           w_hit0;
197
  wire           w_hit1;
198
  wire           w_hit2;
199
  wire           w_hit3;
200
  wire           w_hit4;
201
  wire           w_hit5;
202
  wire           w_hit6;
203
  wire           w_hit7;
204
  wire           w_hit8;
205
  wire           w_hit9;
206
  wire           w_hitA;
207
  wire           w_hitB;
208
  wire           w_hitC;
209
  wire           w_hitD;
210
  wire           w_hitE;
211
  wire           w_hitF;
212
  wire           w_hit10;
213
  wire           w_hit11;
214
  wire           w_hit12;
215
  wire           w_hit13;
216
  wire           w_hit14;
217
  wire           w_hit15;
218
  wire           w_hit16;
219
  wire           w_hit17;
220
  wire           w_hit18;
221
  wire           w_hit19;
222
  wire           w_hit1A;
223
  wire           w_hit1B;
224
  wire           w_hit1C;
225
  wire           w_hit1D;
226
 
227
  wire           w_hit0_w;
228
  wire           w_hit1_w;
229
  wire           w_hit2_w;
230
  wire           w_hit3_w;
231
  wire           w_hit4_w;
232
  wire           w_hit5_w;
233
  wire           w_hit6_w;
234
  wire           w_hit7_w;
235
  wire           w_hit8_w;
236
  wire           w_hit9_w;
237
  wire           w_hitA_w;
238
  wire           w_hitB_w;
239
  wire           w_hitC_w;
240
  wire           w_hitD_w;
241
  wire           w_hitE_w;
242
  wire           w_hitF_w;
243
  wire           w_hit10_w;
244
  wire           w_hit11_w;
245
  wire           w_hit12_w;
246
  wire           w_hit13_w;
247
  wire           w_hit14_w;
248
  wire           w_hit15_w;
249
  wire           w_hit16_w;
250
  wire           w_hit17_w;
251
  wire           w_hit18_w;
252
  wire           w_hit19_w;
253
  wire           w_hit1A_w;
254
  wire           w_hit1B_w;
255
  wire           w_hit1C_w;
256
  wire           w_hit1D_w;
257
 
258
  wire   [31:0]  w_rd;
259
  wire           w_rstr;
260
  wire           w_int_clear;
261
  wire           w_int_set;
262
//////////////////////////////////
263
// assign
264
//////////////////////////////////
265
  wire         w_req;
266
  wire         w_wr;
267
  wire [7:0]   w_adrs;
268
  wire [3:0]   w_be;
269
  wire [31:0]  w_wd;
270
`ifdef D3D_WISHBONE
271
assign w_req = i_wb_stb;
272
assign w_wr = i_wb_we;
273
assign w_adrs = {i_wb_adr,2'b0};
274
assign w_be = i_wb_sel;
275
assign w_wd = i_wb_dat;
276
`else
277
assign w_req = i_req;
278
assign w_wr = i_wr;
279
assign w_adrs = i_adrs;
280
assign w_be = i_be;
281
assign w_wd = i_wd;
282
`endif
283
assign w_hit0 = (w_adrs[6:2] == 5'h00);  // 0
284
assign w_hit1 = (w_adrs[6:2] == 5'h01);  // 4
285
assign w_hit2 = (w_adrs[6:2] == 5'h02);  // 8
286
assign w_hit3 = (w_adrs[6:2] == 5'h03);  // c
287
assign w_hit4 = (w_adrs[6:2] == 5'h04);  // 10
288
assign w_hit5 = (w_adrs[6:2] == 5'h05);  // 14
289
assign w_hit6 = (w_adrs[6:2] == 5'h06);  // 18
290
assign w_hit7 = (w_adrs[6:2] == 5'h07);  // 1c
291
assign w_hit8 = (w_adrs[6:2] == 5'h08);  // 20
292
assign w_hit9 = (w_adrs[6:2] == 5'h09);  // 24
293
assign w_hitA = (w_adrs[6:2] == 5'h0a);  // 28
294
assign w_hitB = (w_adrs[6:2] == 5'h0b);  // 2c
295
assign w_hitC = (w_adrs[6:2] == 5'h0c);  // 30
296
assign w_hitD = (w_adrs[6:2] == 5'h0d);  // 34
297
assign w_hitE = (w_adrs[6:2] == 5'h0e);  // 38
298
assign w_hitF = (w_adrs[6:2] == 5'h0f);  // 3c
299
assign w_hit10 = (w_adrs[6:2] == 5'h10);  // 40
300
assign w_hit11 = (w_adrs[6:2] == 5'h11);  // 44
301
assign w_hit12 = (w_adrs[6:2] == 5'h12);  // 48
302
assign w_hit13 = (w_adrs[6:2] == 5'h13);  // 4c
303
assign w_hit14 = (w_adrs[6:2] == 5'h14);  // 50
304
assign w_hit15 = (w_adrs[6:2] == 5'h15);  // 54
305
assign w_hit16 = (w_adrs[6:2] == 5'h16);  // 58
306
assign w_hit17 = (w_adrs[6:2] == 5'h17);  // 5c
307
assign w_hit18 = (w_adrs[6:2] == 5'h18);  // 60
308
assign w_hit19 = (w_adrs[6:2] == 5'h19);  // 64
309
assign w_hit1A = (w_adrs[6:2] == 5'h1A);  // 68
310
assign w_hit1B = (w_adrs[6:2] == 5'h1B);  // 6c
311
assign w_hit1C = (w_adrs[6:2] == 5'h1C);  // 70
312
assign w_hit1D = (w_adrs[6:2] == 5'h1D);  // 74
313
 
314
assign w_hit0_w = w_hit0 & w_wr & w_req;
315
assign w_hit1_w = w_hit1 & w_wr & w_req;
316
assign w_hit2_w = w_hit2 & w_wr & w_req;
317
assign w_hit3_w = w_hit3 & w_wr & w_req;
318
assign w_hit4_w = w_hit4 & w_wr & w_req;
319
assign w_hit5_w = w_hit5 & w_wr & w_req;
320
assign w_hit6_w = w_hit6 & w_wr & w_req;
321
assign w_hit7_w = w_hit7 & w_wr & w_req;
322
assign w_hit8_w = w_hit8 & w_wr & w_req;
323
assign w_hit9_w = w_hit9 & w_wr & w_req;
324
assign w_hitA_w = w_hitA & w_wr & w_req;
325
assign w_hitB_w = w_hitB & w_wr & w_req;
326
assign w_hitC_w = w_hitC & w_wr & w_req;
327
assign w_hitD_w = w_hitD & w_wr & w_req;
328
assign w_hitE_w = w_hitE & w_wr & w_req;
329
assign w_hitF_w = w_hitF & w_wr & w_req;
330
assign w_hit10_w = w_hit10 & w_wr & w_req;
331
assign w_hit11_w = w_hit11 & w_wr & w_req;
332
assign w_hit12_w = w_hit12 & w_wr & w_req;
333
assign w_hit13_w = w_hit13 & w_wr & w_req;
334
assign w_hit14_w = w_hit14 & w_wr & w_req;
335
assign w_hit15_w = w_hit15 & w_wr & w_req;
336
assign w_hit16_w = w_hit16 & w_wr & w_req;
337
assign w_hit17_w = w_hit17 & w_wr & w_req;
338
assign w_hit18_w = w_hit18 & w_wr & w_req;
339
assign w_hit19_w = w_hit19 & w_wr & w_req;
340
assign w_hit1A_w = w_hit1A & w_wr & w_req;
341
assign w_hit1B_w = w_hit1B & w_wr & w_req;
342
assign w_hit1C_w = w_hit1C & w_wr & w_req;
343
assign w_hit1D_w = w_hit1D & w_wr & w_req;
344
 
345
assign w_rstr = w_req & !w_wr;
346
assign w_rd = (w_hit0) ? {8'h0,7'b0,r_ccw,7'b0,r_en_cull,7'b0,r_dma_start} :
347
              (w_hit1) ? {23'h0,r_int_mask,7'h0,r_int} :
348
              (w_hit2) ? {r_dma_top_address,2'b0} :
349
              (w_hit3) ? {16'h0,r_dma_size} :
350
 `ifdef D3D_USE_MATRIX_PALETTE
351
              (w_hit4) ? {10'h0,r_m00[r_mat_bank]} :
352
              (w_hit5) ? {10'h0,r_m01[r_mat_bank]} :
353
              (w_hit6) ? {10'h0,r_m02[r_mat_bank]} :
354
              (w_hit7) ? {10'h0,r_m03[r_mat_bank]} :
355
              (w_hit8) ? {10'h0,r_m10[r_mat_bank]} :
356
              (w_hit9) ? {10'h0,r_m11[r_mat_bank]} :
357
              (w_hitA) ? {10'h0,r_m12[r_mat_bank]} :
358
              (w_hitB) ? {10'h0,r_m13[r_mat_bank]} :
359
              (w_hitC) ? {10'h0,r_m20[r_mat_bank]} :
360
              (w_hitD) ? {10'h0,r_m21[r_mat_bank]} :
361
              (w_hitE) ? {10'h0,r_m22[r_mat_bank]} :
362
              (w_hitF) ? {10'h0,r_m23[r_mat_bank]} :
363
              (w_hit10) ? {10'h0,r_m30[r_mat_bank]} :
364
              (w_hit11) ? {10'h0,r_m31[r_mat_bank]} :
365
              (w_hit12) ? {10'h0,r_m32[r_mat_bank]} :
366
              (w_hit13) ? {10'h0,r_m33[r_mat_bank]} :
367
`else
368
              (w_hit4) ? {10'h0,r_m00} :
369
              (w_hit5) ? {10'h0,r_m01} :
370
              (w_hit6) ? {10'h0,r_m02} :
371
              (w_hit7) ? {10'h0,r_m03} :
372
              (w_hit8) ? {10'h0,r_m10} :
373
              (w_hit9) ? {10'h0,r_m11} :
374
              (w_hitA) ? {10'h0,r_m12} :
375
              (w_hitB) ? {10'h0,r_m13} :
376
              (w_hitC) ? {10'h0,r_m20} :
377
              (w_hitD) ? {10'h0,r_m21} :
378
              (w_hitE) ? {10'h0,r_m22} :
379
              (w_hitF) ? {10'h0,r_m23} :
380
              (w_hit10) ? {10'h0,r_m30} :
381
              (w_hit11) ? {10'h0,r_m31} :
382
              (w_hit12) ? {10'h0,r_m32} :
383
              (w_hit13) ? {10'h0,r_m33} :
384
`endif
385
              (w_hit14) ? {10'h0,r_vw} :
386
              (w_hit15) ? {10'h0,r_vh} :
387
              (w_hit16) ? {16'h0,r_scr_w_m1}:
388
              (w_hit17) ? {16'h0,r_scr_h_m1}:
389
              (w_hit18) ? {16'h0,r_scr_w}:
390
              (w_hit19) ? {r_pixel_top_address,2'b0} :
391
              (w_hit1A) ? {24'h0,7'h0,r_y_flip,r_pixel_color} :
392
`ifdef D3D_USE_MATRIX_PALETTE
393
              (w_hit1B) ? {16'h0,6'b0,r_num_mats,6'b0,r_mat_bank} :
394
`endif
395
                          32'h0;
396
 
397
`ifdef D3D_WISHBONE
398
assign o_wb_dat = r_rd;
399
assign o_wb_ack = (w_wr) ? w_req : r_rstr;
400
`else
401
assign o_rstr  = r_rstr;
402
assign o_rd = r_rd;
403
assign o_ack = i_req;
404
`endif
405
assign o_dma_start = r_dma_start;
406
assign o_dma_top_address = r_dma_top_address;
407
assign o_dma_size = r_dma_size;
408
`ifdef D3D_USE_MATRIX_PALETTE
409
assign o_num_mats = r_num_mats;
410
genvar gi;
411
  generate for (gi=0;gi<`D3D_NUM_OF_MATS;gi=gi+1) begin : gen_mat
412
    assign o_m00[22*(gi+1)-1:gi*22] = r_m00[gi];
413
    assign o_m01[22*(gi+1)-1:gi*22] = r_m01[gi];
414
    assign o_m02[22*(gi+1)-1:gi*22] = r_m02[gi];
415
    assign o_m03[22*(gi+1)-1:gi*22] = r_m03[gi];
416
    assign o_m10[22*(gi+1)-1:gi*22] = r_m10[gi];
417
    assign o_m11[22*(gi+1)-1:gi*22] = r_m11[gi];
418
    assign o_m12[22*(gi+1)-1:gi*22] = r_m12[gi];
419
    assign o_m13[22*(gi+1)-1:gi*22] = r_m13[gi];
420
    assign o_m20[22*(gi+1)-1:gi*22] = r_m20[gi];
421
    assign o_m21[22*(gi+1)-1:gi*22] = r_m21[gi];
422
    assign o_m22[22*(gi+1)-1:gi*22] = r_m22[gi];
423
    assign o_m23[22*(gi+1)-1:gi*22] = r_m23[gi];
424
    assign o_m30[22*(gi+1)-1:gi*22] = r_m30[gi];
425
    assign o_m31[22*(gi+1)-1:gi*22] = r_m31[gi];
426
    assign o_m32[22*(gi+1)-1:gi*22] = r_m32[gi];
427
    assign o_m33[22*(gi+1)-1:gi*22] = r_m33[gi];
428
  end
429
  endgenerate
430
`else
431
assign o_m00 = r_m00;
432
assign o_m01 = r_m01;
433
assign o_m02 = r_m02;
434
assign o_m03 = r_m03;
435
assign o_m10 = r_m10;
436
assign o_m11 = r_m11;
437
assign o_m12 = r_m12;
438
assign o_m13 = r_m13;
439
assign o_m20 = r_m20;
440
assign o_m21 = r_m21;
441
assign o_m22 = r_m22;
442
assign o_m23 = r_m23;
443
assign o_m30 = r_m30;
444
assign o_m31 = r_m31;
445
assign o_m32 = r_m32;
446
assign o_m33 = r_m33;
447
`endif
448
assign o_en_cull = r_en_cull;
449
assign o_ccw = r_ccw;
450
assign o_vw = r_vw;
451
assign o_vh = r_vh;
452
assign o_scr_w_m1 = r_scr_w_m1;
453
assign o_scr_h_m1 = r_scr_h_m1;
454
assign o_scr_w = r_scr_w;
455
assign o_y_flip = r_y_flip;
456
assign o_pixel_color = r_pixel_color;
457
assign o_pixel_top_address = r_pixel_top_address;
458
assign o_int = r_int_out;
459
assign w_int_clear = w_hit1_w;
460
assign w_int_set = i_geo_state & i_ras_state & r_dma_start;
461
//////////////////////////////////
462
// always
463
//////////////////////////////////
464
`ifdef D3D_SYNC_RESET
465
always @(posedge clk_core) begin
466
`else
467
always @(posedge clk_core or negedge rst_x) begin
468
`endif
469
  if (rst_x == `D3D_RESET_POL) begin
470
    r_int_out <= 1'b0;
471
  end else begin
472
    r_int_out <= r_int & ~r_int_mask;
473
  end
474
end
475
 
476
`ifdef D3D_SYNC_RESET
477
always @(posedge clk_core) begin
478
`else
479
always @(posedge clk_core or negedge rst_x) begin
480
`endif
481
  if (rst_x == `D3D_RESET_POL) begin
482
    r_int <= 1'b0;
483
  end else begin
484
    if (w_int_clear) r_int <= 1'b0;
485
    else if (w_int_set) r_int <= 1'b1;
486
  end
487
end
488
 
489
`ifdef D3D_SYNC_RESET
490
always @(posedge clk_core) begin
491
`else
492
always @(posedge clk_core or negedge rst_x) begin
493
`endif
494
  if (rst_x == `D3D_RESET_POL) begin
495
   r_rstr <= 1'b0;
496
  end else begin
497
   r_rstr <= w_rstr;
498
  end
499
end
500
 
501
always @(posedge clk_core) begin
502
  r_rd <= w_rd;
503
end
504
 
505
`ifdef D3D_SYNC_RESET
506
always @(posedge clk_core) begin
507
`else
508
always @(posedge clk_core or negedge rst_x) begin
509
`endif
510
  if (rst_x == `D3D_RESET_POL) begin
511
    r_dma_start <= 1'b0;
512
    r_en_cull <= 1'b1;
513
    r_ccw <= 1'b1;
514
  end else begin
515
    if (w_hit0_w) begin
516
      if (w_be[0]) r_dma_start   <= w_wd[0];
517
      if (w_be[1]) r_en_cull  <= w_wd[8];
518
      if (w_be[2]) r_ccw  <= w_wd[16];
519
    end else begin
520
      if (w_int_set) r_dma_start   <= 1'b0;
521
    end
522
  end
523
end
524
 
525
`ifdef D3D_SYNC_RESET
526
always @(posedge clk_core) begin
527
`else
528
always @(posedge clk_core or negedge rst_x) begin
529
`endif
530
  if (rst_x == `D3D_RESET_POL) begin
531
    r_int_mask <= 1'b1;
532
  end else begin
533
    if (w_hit1_w) begin
534
      if (w_be[1]) r_int_mask   <= w_wd[8];
535
    end
536
  end
537
end
538
 
539
always @(posedge clk_core) begin
540
  if (w_hit2_w) begin
541
    if (w_be[0]) r_dma_top_address[5:0] <= w_wd[7:2];
542
    if (w_be[1]) r_dma_top_address[13:6] <= w_wd[15:8];
543
    if (w_be[2]) r_dma_top_address[21:14] <= w_wd[23:16];
544
    if (w_be[3]) r_dma_top_address[29:22] <= w_wd[31:24];
545
  end
546
end
547
 
548
`ifdef D3D_USE_MATRIX_PALETTE
549
always @(posedge clk_core) begin
550
  if (w_hit3_w) begin
551
    if (w_be[0]) r_dma_size[7:0]   <= w_wd[7:0];
552
    if (w_be[1]) r_dma_size[15:8]  <= w_wd[15:8];
553
  end
554
end
555
 
556
always @(posedge clk_core) begin
557
  if (w_hit4_w) begin
558
    if (w_be[0]) r_m00[r_mat_bank][7:0]   <= w_f22[7:0];
559
    if (w_be[1]) r_m00[r_mat_bank][15:8]  <= w_f22[15:8];
560
    if (w_be[2]) r_m00[r_mat_bank][21:16] <= w_f22[21:16];
561
  end
562
end
563
 
564
always @(posedge clk_core) begin
565
  if (w_hit5_w) begin
566
    if (w_be[0]) r_m01[r_mat_bank][7:0]   <= w_f22[7:0];
567
    if (w_be[1]) r_m01[r_mat_bank][15:8]  <= w_f22[15:8];
568
    if (w_be[2]) r_m01[r_mat_bank][21:16] <= w_f22[21:16];
569
  end
570
end
571
 
572
always @(posedge clk_core) begin
573
  if (w_hit6_w) begin
574
    if (w_be[0]) r_m02[r_mat_bank][7:0]   <= w_f22[7:0];
575
    if (w_be[1]) r_m02[r_mat_bank][15:8]  <= w_f22[15:8];
576
    if (w_be[2]) r_m02[r_mat_bank][21:16] <= w_f22[21:16];
577
  end
578
end
579
 
580
always @(posedge clk_core) begin
581
  if (w_hit7_w) begin
582
    if (w_be[0]) r_m03[r_mat_bank][7:0]   <= w_f22[7:0];
583
    if (w_be[1]) r_m03[r_mat_bank][15:8]  <= w_f22[15:8];
584
    if (w_be[2]) r_m03[r_mat_bank][21:16] <= w_f22[21:16];
585
  end
586
end
587
 
588
always @(posedge clk_core) begin
589
  if (w_hit8_w) begin
590
    if (w_be[0]) r_m10[r_mat_bank][7:0]   <= w_f22[7:0];
591
    if (w_be[1]) r_m10[r_mat_bank][15:8]  <= w_f22[15:8];
592
    if (w_be[2]) r_m10[r_mat_bank][21:16] <= w_f22[21:16];
593
  end
594
end
595
 
596
always @(posedge clk_core) begin
597
  if (w_hit9_w) begin
598
    if (w_be[0]) r_m11[r_mat_bank][7:0]   <= w_f22[7:0];
599
    if (w_be[1]) r_m11[r_mat_bank][15:8]  <= w_f22[15:8];
600
    if (w_be[2]) r_m11[r_mat_bank][21:16] <= w_f22[21:16];
601
  end
602
end
603
 
604
always @(posedge clk_core) begin
605
  if (w_hitA_w) begin
606
    if (w_be[0]) r_m12[r_mat_bank][7:0]   <= w_f22[7:0];
607
    if (w_be[1]) r_m12[r_mat_bank][15:8]  <= w_f22[15:8];
608
    if (w_be[2]) r_m12[r_mat_bank][21:16] <= w_f22[21:16];
609
  end
610
end
611
 
612
always @(posedge clk_core) begin
613
  if (w_hitB_w) begin
614
    if (w_be[0]) r_m13[r_mat_bank][7:0]   <= w_f22[7:0];
615
    if (w_be[1]) r_m13[r_mat_bank][15:8]  <= w_f22[15:8];
616
    if (w_be[2]) r_m13[r_mat_bank][21:16] <= w_f22[21:16];
617
  end
618
end
619
 
620
always @(posedge clk_core) begin
621
  if (w_hitC_w) begin
622
    if (w_be[0]) r_m20[r_mat_bank][7:0]   <= w_f22[7:0];
623
    if (w_be[1]) r_m20[r_mat_bank][15:8]  <= w_f22[15:8];
624
    if (w_be[2]) r_m20[r_mat_bank][21:16] <= w_f22[21:16];
625
  end
626
end
627
 
628
always @(posedge clk_core) begin
629
  if (w_hitD_w) begin
630
    if (w_be[0]) r_m21[r_mat_bank][7:0]   <= w_f22[7:0];
631
    if (w_be[1]) r_m21[r_mat_bank][15:8]  <= w_f22[15:8];
632
    if (w_be[2]) r_m21[r_mat_bank][21:16] <= w_f22[21:16];
633
  end
634
end
635
 
636
always @(posedge clk_core) begin
637
  if (w_hitE_w) begin
638
    if (w_be[0]) r_m22[r_mat_bank][7:0]   <= w_f22[7:0];
639
    if (w_be[1]) r_m22[r_mat_bank][15:8]  <= w_f22[15:8];
640
    if (w_be[2]) r_m22[r_mat_bank][21:16] <= w_f22[21:16];
641
  end
642
end
643
 
644
always @(posedge clk_core) begin
645
  if (w_hitF_w) begin
646
    if (w_be[0]) r_m23[r_mat_bank][7:0]   <= w_f22[7:0];
647
    if (w_be[1]) r_m23[r_mat_bank][15:8]  <= w_f22[15:8];
648
    if (w_be[2]) r_m23[r_mat_bank][21:16] <= w_f22[21:16];
649
  end
650
end
651
 
652
always @(posedge clk_core) begin
653
  if (w_hit10_w) begin
654
    if (w_be[0]) r_m30[r_mat_bank][7:0]   <= w_f22[7:0];
655
    if (w_be[1]) r_m30[r_mat_bank][15:8]  <= w_f22[15:8];
656
    if (w_be[2]) r_m30[r_mat_bank][21:16] <= w_f22[21:16];
657
  end
658
end
659
 
660
always @(posedge clk_core) begin
661
  if (w_hit11_w) begin
662
    if (w_be[0]) r_m31[r_mat_bank][7:0]   <= w_f22[7:0];
663
    if (w_be[1]) r_m31[r_mat_bank][15:8]  <= w_f22[15:8];
664
    if (w_be[2]) r_m31[r_mat_bank][21:16] <= w_f22[21:16];
665
  end
666
end
667
 
668
always @(posedge clk_core) begin
669
  if (w_hit12_w) begin
670
    if (w_be[0]) r_m32[r_mat_bank][7:0]   <= w_f22[7:0];
671
    if (w_be[1]) r_m32[r_mat_bank][15:8]  <= w_f22[15:8];
672
    if (w_be[2]) r_m32[r_mat_bank][21:16] <= w_f22[21:16];
673
  end
674
end
675
 
676
always @(posedge clk_core) begin
677
  if (w_hit13_w) begin
678
    if (w_be[0]) r_m33[r_mat_bank][7:0]   <= w_f22[7:0];
679
    if (w_be[1]) r_m33[r_mat_bank][15:8]  <= w_f22[15:8];
680
    if (w_be[2]) r_m33[r_mat_bank][21:16] <= w_f22[21:16];
681
  end
682
end
683
`else
684
always @(posedge clk_core) begin
685
  if (w_hit3_w) begin
686
    if (w_be[0]) r_dma_size[7:0]   <= w_wd[7:0];
687
    if (w_be[1]) r_dma_size[15:8]  <= w_wd[15:8];
688
  end
689
end
690
 
691
always @(posedge clk_core) begin
692
  if (w_hit4_w) begin
693
    if (w_be[0]) r_m00[7:0]   <= w_f22[7:0];
694
    if (w_be[1]) r_m00[15:8]  <= w_f22[15:8];
695
    if (w_be[2]) r_m00[21:16] <= w_f22[21:16];
696
  end
697
end
698
 
699
always @(posedge clk_core) begin
700
  if (w_hit5_w) begin
701
    if (w_be[0]) r_m01[7:0]   <= w_f22[7:0];
702
    if (w_be[1]) r_m01[15:8]  <= w_f22[15:8];
703
    if (w_be[2]) r_m01[21:16] <= w_f22[21:16];
704
  end
705
end
706
 
707
always @(posedge clk_core) begin
708
  if (w_hit6_w) begin
709
    if (w_be[0]) r_m02[7:0]   <= w_f22[7:0];
710
    if (w_be[1]) r_m02[15:8]  <= w_f22[15:8];
711
    if (w_be[2]) r_m02[21:16] <= w_f22[21:16];
712
  end
713
end
714
 
715
always @(posedge clk_core) begin
716
  if (w_hit7_w) begin
717
    if (w_be[0]) r_m03[7:0]   <= w_f22[7:0];
718
    if (w_be[1]) r_m03[15:8]  <= w_f22[15:8];
719
    if (w_be[2]) r_m03[21:16] <= w_f22[21:16];
720
  end
721
end
722
 
723
always @(posedge clk_core) begin
724
  if (w_hit8_w) begin
725
    if (w_be[0]) r_m10[7:0]   <= w_f22[7:0];
726
    if (w_be[1]) r_m10[15:8]  <= w_f22[15:8];
727
    if (w_be[2]) r_m10[21:16] <= w_f22[21:16];
728
  end
729
end
730
 
731
always @(posedge clk_core) begin
732
  if (w_hit9_w) begin
733
    if (w_be[0]) r_m11[7:0]   <= w_f22[7:0];
734
    if (w_be[1]) r_m11[15:8]  <= w_f22[15:8];
735
    if (w_be[2]) r_m11[21:16] <= w_f22[21:16];
736
  end
737
end
738
 
739
always @(posedge clk_core) begin
740
  if (w_hitA_w) begin
741
    if (w_be[0]) r_m12[7:0]   <= w_f22[7:0];
742
    if (w_be[1]) r_m12[15:8]  <= w_f22[15:8];
743
    if (w_be[2]) r_m12[21:16] <= w_f22[21:16];
744
  end
745
end
746
 
747
always @(posedge clk_core) begin
748
  if (w_hitB_w) begin
749
    if (w_be[0]) r_m13[7:0]   <= w_f22[7:0];
750
    if (w_be[1]) r_m13[15:8]  <= w_f22[15:8];
751
    if (w_be[2]) r_m13[21:16] <= w_f22[21:16];
752
  end
753
end
754
 
755
always @(posedge clk_core) begin
756
  if (w_hitC_w) begin
757
    if (w_be[0]) r_m20[7:0]   <= w_f22[7:0];
758
    if (w_be[1]) r_m20[15:8]  <= w_f22[15:8];
759
    if (w_be[2]) r_m20[21:16] <= w_f22[21:16];
760
  end
761
end
762
 
763
always @(posedge clk_core) begin
764
  if (w_hitD_w) begin
765
    if (w_be[0]) r_m21[7:0]   <= w_f22[7:0];
766
    if (w_be[1]) r_m21[15:8]  <= w_f22[15:8];
767
    if (w_be[2]) r_m21[21:16] <= w_f22[21:16];
768
  end
769
end
770
 
771
always @(posedge clk_core) begin
772
  if (w_hitE_w) begin
773
    if (w_be[0]) r_m22[7:0]   <= w_f22[7:0];
774
    if (w_be[1]) r_m22[15:8]  <= w_f22[15:8];
775
    if (w_be[2]) r_m22[21:16] <= w_f22[21:16];
776
  end
777
end
778
 
779
always @(posedge clk_core) begin
780
  if (w_hitF_w) begin
781
    if (w_be[0]) r_m23[7:0]   <= w_f22[7:0];
782
    if (w_be[1]) r_m23[15:8]  <= w_f22[15:8];
783
    if (w_be[2]) r_m23[21:16] <= w_f22[21:16];
784
  end
785
end
786
 
787
always @(posedge clk_core) begin
788
  if (w_hit10_w) begin
789
    if (w_be[0]) r_m30[7:0]   <= w_f22[7:0];
790
    if (w_be[1]) r_m30[15:8]  <= w_f22[15:8];
791
    if (w_be[2]) r_m30[21:16] <= w_f22[21:16];
792
  end
793
end
794
 
795
always @(posedge clk_core) begin
796
  if (w_hit11_w) begin
797
    if (w_be[0]) r_m31[7:0]   <= w_f22[7:0];
798
    if (w_be[1]) r_m31[15:8]  <= w_f22[15:8];
799
    if (w_be[2]) r_m31[21:16] <= w_f22[21:16];
800
  end
801
end
802
 
803
always @(posedge clk_core) begin
804
  if (w_hit12_w) begin
805
    if (w_be[0]) r_m32[7:0]   <= w_f22[7:0];
806
    if (w_be[1]) r_m32[15:8]  <= w_f22[15:8];
807
    if (w_be[2]) r_m32[21:16] <= w_f22[21:16];
808
  end
809
end
810
 
811
always @(posedge clk_core) begin
812
  if (w_hit13_w) begin
813
    if (w_be[0]) r_m33[7:0]   <= w_f22[7:0];
814
    if (w_be[1]) r_m33[15:8]  <= w_f22[15:8];
815
    if (w_be[2]) r_m33[21:16] <= w_f22[21:16];
816
  end
817
end
818
`endif
819
 
820
`ifdef D3D_SYNC_RESET
821
always @(posedge clk_core) begin
822
`else
823
always @(posedge clk_core or negedge rst_x) begin
824
`endif
825
  if (rst_x == `D3D_RESET_POL) begin
826
    r_vw <= 22'h18a000;    // 640
827
  end else begin
828
    if (w_hit14_w) begin
829
      if (w_be[0]) r_vw[7:0]   <= w_f22[7:0];
830
      if (w_be[1]) r_vw[15:8]  <= w_f22[15:8];
831
      if (w_be[2]) r_vw[21:16] <= w_f22[21:16];
832
    end
833
  end
834
end
835
 
836
`ifdef D3D_SYNC_RESET
837
always @(posedge clk_core) begin
838
`else
839
always @(posedge clk_core or negedge rst_x) begin
840
`endif
841
  if (rst_x == `D3D_RESET_POL) begin
842
    r_vh <= 22'h17f000;    // 480
843
  end else begin
844
    if (w_hit15_w) begin
845
      if (w_be[0]) r_vh[7:0]   <= w_f22[7:0];
846
      if (w_be[1]) r_vh[15:8]  <= w_f22[15:8];
847
      if (w_be[2]) r_vh[21:16] <= w_f22[21:16];
848
    end
849
  end
850
end
851
 
852
`ifdef D3D_SYNC_RESET
853
always @(posedge clk_core) begin
854
`else
855
always @(posedge clk_core or negedge rst_x) begin
856
`endif
857
  if (rst_x == `D3D_RESET_POL) begin
858
    r_scr_w_m1 <= 16'd640-'d1;   // 640-1
859
  end else begin
860
    if (w_hit16_w) begin
861
      if (w_be[0]) r_scr_w_m1[7:0]   <= w_wd[7:0];
862
      if (w_be[1]) r_scr_w_m1[15:8]  <= w_wd[15:8];
863
    end
864
  end
865
end
866
 
867
`ifdef D3D_SYNC_RESET
868
always @(posedge clk_core) begin
869
`else
870
always @(posedge clk_core or negedge rst_x) begin
871
`endif
872
  if (rst_x == `D3D_RESET_POL) begin
873
    r_scr_h_m1 <= 16'd480-'d1;   // 480-1
874
  end else begin
875
    if (w_hit17_w) begin
876
      if (w_be[0]) r_scr_h_m1[7:0]   <= w_wd[7:0];
877
      if (w_be[1]) r_scr_h_m1[15:8]  <= w_wd[15:8];
878
    end
879
  end
880
end
881
 
882
`ifdef D3D_SYNC_RESET
883
always @(posedge clk_core) begin
884
`else
885
always @(posedge clk_core or negedge rst_x) begin
886
`endif
887
  if (rst_x == `D3D_RESET_POL) begin
888
    r_scr_w <= 16'd640;
889
  end else begin
890
    if (w_hit18_w) begin
891
      if (w_be[0]) r_scr_w[7:0]   <= w_wd[7:0];
892
      if (w_be[1]) r_scr_w[15:8]  <= w_wd[15:8];
893
    end
894
  end
895
end
896
 
897
always @(posedge clk_core) begin
898
  if (w_hit19_w) begin
899
    if (w_be[0]) r_pixel_top_address[5:0] <= w_wd[7:2];
900
    if (w_be[1]) r_pixel_top_address[13:6] <= w_wd[15:8];
901
    if (w_be[2]) r_pixel_top_address[21:14] <= w_wd[23:16];
902
    if (w_be[3]) r_pixel_top_address[29:22] <= w_wd[31:24];
903
  end
904
end
905
 
906
always @(posedge clk_core) begin
907
  if (w_hit1A_w) begin
908
    if (w_be[0]) r_pixel_color   <= w_wd[7:0];
909
  end
910
end
911
 
912
`ifdef D3D_USE_MATRIX_PALETTE
913
`ifdef D3D_SYNC_RESET
914
always @(posedge clk_core) begin
915
`else
916
always @(posedge clk_core or negedge rst_x) begin
917
`endif
918
  if (rst_x == `D3D_RESET_POL) begin
919
    r_mat_bank   <= 2'd0;
920
    r_num_mats   <= 2'd0;
921
  end else begin
922
    if (w_hit1B_w) begin
923
      if (w_be[0]) r_mat_bank   <= w_wd[1:0];
924
      if (w_be[1]) r_num_mats   <= w_wd[9:8];
925
    end
926
  end
927
end
928
`endif
929
 
930
`ifdef D3D_SYNC_RESET
931
always @(posedge clk_core) begin
932
`else
933
always @(posedge clk_core or negedge rst_x) begin
934
`endif
935
  if (rst_x == `D3D_RESET_POL) begin
936
    r_y_flip <= 1'b0;
937
  end else begin
938
    if (w_hit1A_w) begin
939
      if (w_be[1]) r_y_flip   <= w_wd[8];
940
    end
941
  end
942
end
943
 
944
// float cpnversion
945
fm_3d_fcnv u_float_fcnv (
946
  .i_f32(w_wd),
947
  .o_f22(w_f22)
948
);
949
 
950
endmodule

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