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# SPDX-FileCopyrightText: 2020 Efabless Corporation

#

# Licensed under the Apache License, Version 2.0 (the "License");

# you may not use this file except in compliance with the License.

# You may obtain a copy of the License at

#

#      http://www.apache.org/licenses/LICENSE-2.0

#

# Unless required by applicable law or agreed to in writing, software

# distributed under the License is distributed on an "AS IS" BASIS,

# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.

# See the License for the specific language governing permissions and

# limitations under the License.

#

# SPDX-License-Identifier: Apache-2.0

## Caravel Pointers

CARAVEL_ROOT ?= ../../../caravel

CARAVEL_PATH ?= $(CARAVEL_ROOT)

CARAVEL_FIRMWARE_PATH = $(CARAVEL_PATH)/verilog/dv/caravel

CARAVEL_VERILOG_PATH  = $(CARAVEL_PATH)/verilog

CARAVEL_RTL_PATH = $(CARAVEL_VERILOG_PATH)/rtl

CARAVEL_BEHAVIOURAL_MODELS = $(CARAVEL_VERILOG_PATH)/dv/caravel

## User Project Pointers

UPRJ_VERILOG_PATH ?= ../../../verilog

UPRJ_RTL_PATH = $(UPRJ_VERILOG_PATH)/rtl

UPRJ_BEHAVIOURAL_MODELS = ../model

UPRJ_INCLUDE_PATH1 = $(UPRJ_RTL_PATH)/syntacore/scr1/src/includes

UPRJ_INCLUDE_PATH2 = $(UPRJ_RTL_PATH)/sdram_ctrl/src/defs

UPRJ_INCLUDE_PATH2 = $(UPRJ_RTL_PATH)/sdram_ctrl/src/defs

## RISCV GCC

GCC_PATH?=/ef/apps/bin

GCC_PREFIX?=riscv32-unknown-elf

PDK_PATH?=/ef/tech/SW/sky130A

## Simulation mode: RTL/GL

SIM?=RTL

.SUFFIXES:

PATTERN = risc_boot

all:  ${PATTERN:=.vcd}

hex:  ${PATTERN:=.hex}

vvp:  ${PATTERN:=.vvp}

%.vvp: %_tb.v %.hex

ifeq ($(SIM),RTL)

        iverilog -g2005-sv -DFUNCTIONAL -DSIM -I $(PDK_PATH) \

        -I $(CARAVEL_BEHAVIOURAL_MODELS) -I $(CARAVEL_RTL_PATH) \

        -I $(UPRJ_BEHAVIOURAL_MODELS)    -I $(UPRJ_RTL_PATH) \

        -I $(UPRJ_INCLUDE_PATH1)    -I $(UPRJ_INCLUDE_PATH2) \

        $< -o $@

else

        iverilog -DFUNCTIONAL -DSIM -DGL -I $(PDK_PATH) \

        -I $(CARAVEL_BEHAVIOURAL_MODELS) -I $(CARAVEL_RTL_PATH) -I $(CARAVEL_VERILOG_PATH) \

        -I $(UPRJ_BEHAVIOURAL_MODELS) -I$(UPRJ_RTL_PATH)   -I $(UPRJ_VERILOG_PATH) \

        $< -o $@

endif

%.vcd: %.vvp

        vvp $<

%.elf: %.c $(CARAVEL_FIRMWARE_PATH)/sections.lds $(CARAVEL_FIRMWARE_PATH)/start.s

        ${GCC_PATH}/${GCC_PREFIX}-gcc -I $(CARAVEL_PATH) -march=rv32imc -mabi=ilp32 -Wl,-Bstatic,-T,$(CARAVEL_FIRMWARE_PATH)/sections.lds,--strip-debug -ffreestanding -nostdlib -o $@ $(CARAVEL_FIRMWARE_PATH)/start.s $<

%.hex: %.elf

        ${GCC_PATH}/${GCC_PREFIX}-objcopy -O verilog $< $@

        # to fix flash base address

        sed -i 's/@10000000/@00000000/g' $@

%.bin: %.elf

        ${GCC_PATH}/${GCC_PREFIX}-objcopy -O binary $< /dev/stdout | tail -c +1048577 > $@

# ---- Clean ----

clean:

        rm -f *.elf *.hex *.bin *.vvp *.vcd *.log

.PHONY: clean hex all