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dinesha |
// See LICENSE for license details.
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#ifndef __RISCV_MACROS_H
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#define __RISCV_MACROS_H
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#include "riscv_csr_encoding.h"
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#include "sc_test.h"
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//-----------------------------------------------------------------------
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// Begin Macro
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//-----------------------------------------------------------------------
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#define RVTEST_RV64U \
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.macro init; \
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.endm
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#define RVTEST_RV64UF \
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.macro init; \
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RVTEST_FP_ENABLE; \
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.endm
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#define RVTEST_RV32U \
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.macro init; \
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.endm
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#define RVTEST_RV32UF \
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.macro init; \
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RVTEST_FP_ENABLE; \
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.endm
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#define RVTEST_RV64M \
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.macro init; \
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RVTEST_ENABLE_MACHINE; \
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.endm
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#define RVTEST_RV64S \
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.macro init; \
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RVTEST_ENABLE_SUPERVISOR; \
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.endm
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#define RVTEST_RV32M \
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.macro init; \
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RVTEST_ENABLE_MACHINE; \
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.endm
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#define RVTEST_RV32S \
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.macro init; \
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RVTEST_ENABLE_SUPERVISOR; \
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.endm
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#if __riscv_xlen == 64
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# define CHECK_XLEN li a0, 1; slli a0, a0, 31; bgez a0, 1f; RVTEST_PASS; 1:
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#else
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# define CHECK_XLEN li a0, 1; slli a0, a0, 31; bltz a0, 1f; RVTEST_PASS; 1:
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#endif
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#define INIT_PMP \
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la t0, 1f; \
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csrw mtvec, t0; \
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li t0, -1; /* Set up a PMP to permit all accesses */ \
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csrw pmpaddr0, t0; \
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li t0, PMP_NAPOT | PMP_R | PMP_W | PMP_X; \
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csrw pmpcfg0, t0; \
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.balign 4; \
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1:
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#define INIT_SPTBR \
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la t0, 1f; \
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csrw mtvec, t0; \
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csrwi sptbr, 0; \
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.balign 4; \
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1:
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#define DELEGATE_NO_TRAPS
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#define RVTEST_ENABLE_SUPERVISOR \
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li a0, MSTATUS_MPP & (MSTATUS_MPP >> 1); \
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csrs mstatus, a0; \
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li a0, SIP_SSIP | SIP_STIP; \
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csrs mideleg, a0; \
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#define RVTEST_ENABLE_MACHINE \
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li a0, MSTATUS_MPP; \
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csrs mstatus, a0; \
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#define RVTEST_FP_ENABLE \
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li a0, MSTATUS_FS & (MSTATUS_FS >> 1); \
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csrs mstatus, a0; \
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csrwi fcsr, 0
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#define RISCV_MULTICORE_DISABLE \
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csrr a0, mhartid; \
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1: bnez a0, 1b
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#define EXTRA_TVEC_USER
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#define EXTRA_TVEC_SUPERVISOR
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#define EXTRA_TVEC_HYPERVISOR
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#define EXTRA_TVEC_MACHINE
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#define EXTRA_INIT
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#define EXTRA_INIT_TIMER
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#define INTERRUPT_HANDLER j other_exception /* No interrupts should occur */
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#define RVTEST_CODE_BEGIN \
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.section .text.init; \
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.org 0xC0, 0x00; \
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.balign 64; \
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.weak stvec_handler; \
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.weak mtvec_handler; \
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trap_vector: \
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/* test whether the test came from pass/fail */ \
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csrr a4, mcause; \
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li a5, CAUSE_USER_ECALL; \
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beq a4, a5, _report; \
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li a5, CAUSE_SUPERVISOR_ECALL; \
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beq a4, a5, _report; \
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li a5, CAUSE_MACHINE_ECALL; \
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beq a4, a5, _report; \
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/* if an mtvec_handler is defined, jump to it */ \
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la a4, mtvec_handler; \
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beqz a4, 1f; \
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jr a4; \
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/* was it an interrupt or an exception? */ \
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1: csrr a4, mcause; \
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bgez a4, handle_exception; \
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INTERRUPT_HANDLER; \
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handle_exception: \
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/* we don't know how to handle whatever the exception was */ \
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other_exception: \
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/* some unhandlable exception occurred */ \
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li a0, 0x1; \
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_report: \
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j sc_exit; \
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.balign 64; \
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.globl _start; \
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_start: \
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RISCV_MULTICORE_DISABLE; \
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/*INIT_SPTBR;*/ \
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/*INIT_PMP;*/ \
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DELEGATE_NO_TRAPS; \
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li TESTNUM, 0; \
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la t0, trap_vector; \
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csrw mtvec, t0; \
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CHECK_XLEN; \
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/* if an stvec_handler is defined, delegate exceptions to it */ \
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la t0, stvec_handler; \
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beqz t0, 1f; \
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csrw stvec, t0; \
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li t0, (1 << CAUSE_LOAD_PAGE_FAULT) | \
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(1 << CAUSE_STORE_PAGE_FAULT) | \
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(1 << CAUSE_FETCH_PAGE_FAULT) | \
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(1 << CAUSE_MISALIGNED_FETCH) | \
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(1 << CAUSE_USER_ECALL) | \
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(1 << CAUSE_BREAKPOINT); \
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csrw medeleg, t0; \
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csrr t1, medeleg; \
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bne t0, t1, other_exception; \
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1: csrwi mstatus, 0; \
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init; \
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EXTRA_INIT; \
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EXTRA_INIT_TIMER; \
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la t0, _run_test; \
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csrw mepc, t0; \
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csrr a0, mhartid; \
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mret; \
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.section .text; \
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_run_test:
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//-----------------------------------------------------------------------
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// End Macro
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//-----------------------------------------------------------------------
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#define RVTEST_CODE_END ecall: ecall
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//-----------------------------------------------------------------------
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// Pass/Fail Macro
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//-----------------------------------------------------------------------
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#define RVTEST_PASS \
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fence; \
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mv a1, TESTNUM; \
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li a0, 0x0; \
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ecall
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#define TESTNUM x28
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#define RVTEST_FAIL \
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fence; \
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mv a1, TESTNUM; \
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li a0, 0x1; \
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ecall
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//-----------------------------------------------------------------------
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// Data Section Macro
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//-----------------------------------------------------------------------
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#define EXTRA_DATA
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#define RVTEST_DATA_BEGIN \
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EXTRA_DATA \
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.pushsection .tohost,"aw",@progbits; \
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.balign 64; .global tohost; tohost: .dword 0; \
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.balign 64; .global fromhost; fromhost: .dword 0; \
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.popsection; \
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.balign 16; \
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.global begin_regstate; begin_regstate: .dword 0; .dword 0; .dword 0; \
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.balign 16; \
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.global begin_signature; begin_signature:
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#define RVTEST_DATA_END .balign 16; .global end_signature; end_signature:
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#-----------------------------------------------------------------------
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# Helper macros
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#-----------------------------------------------------------------------
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#define MASK_XLEN(x) ((x) & ((1 << (__riscv_xlen - 1) << 1) - 1))
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#define TEST_CASE( testnum, testreg, correctval, code... ) \
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test_ ## testnum: \
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code; \
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li x29, MASK_XLEN(correctval); \
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li TESTNUM, testnum; \
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bne testreg, x29, fail;
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# We use a macro hack to simpify code generation for various numbers
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# of bubble cycles.
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#define TEST_INSERT_NOPS_0
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#define TEST_INSERT_NOPS_1 nop; TEST_INSERT_NOPS_0
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#define TEST_INSERT_NOPS_2 nop; TEST_INSERT_NOPS_1
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#define TEST_INSERT_NOPS_3 nop; TEST_INSERT_NOPS_2
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#define TEST_INSERT_NOPS_4 nop; TEST_INSERT_NOPS_3
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#define TEST_INSERT_NOPS_5 nop; TEST_INSERT_NOPS_4
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#define TEST_INSERT_NOPS_6 nop; TEST_INSERT_NOPS_5
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#define TEST_INSERT_NOPS_7 nop; TEST_INSERT_NOPS_6
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#define TEST_INSERT_NOPS_8 nop; TEST_INSERT_NOPS_7
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#define TEST_INSERT_NOPS_9 nop; TEST_INSERT_NOPS_8
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#define TEST_INSERT_NOPS_10 nop; TEST_INSERT_NOPS_9
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#-----------------------------------------------------------------------
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# RV64UI MACROS
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#-----------------------------------------------------------------------
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#-----------------------------------------------------------------------
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# Tests for instructions with immediate operand
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#-----------------------------------------------------------------------
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#define SEXT_IMM(x) ((x) | (-(((x) >> 11) & 1) << 11))
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#define TEST_IMM_OP( testnum, inst, result, val1, imm ) \
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TEST_CASE( testnum, x3, result, \
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li x1, MASK_XLEN(val1); \
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inst x3, x1, SEXT_IMM(imm); \
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)
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#define TEST_IMM_OP_RVC( testnum, inst, result, val1, imm ) \
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TEST_CASE( testnum, x1, result, \
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li x1, val1; \
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inst x1, imm; \
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)
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#define TEST_IMM_SRC1_EQ_DEST( testnum, inst, result, val1, imm ) \
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TEST_CASE( testnum, x1, result, \
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li x1, MASK_XLEN(val1); \
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inst x1, x1, SEXT_IMM(imm); \
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)
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#define TEST_IMM_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
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TEST_CASE( testnum, x6, result, \
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li x4, 0; \
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1: li x1, MASK_XLEN(val1); \
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inst x3, x1, SEXT_IMM(imm); \
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TEST_INSERT_NOPS_ ## nop_cycles \
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addi x6, x3, 0; \
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addi x4, x4, 1; \
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li x5, 2; \
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bne x4, x5, 1b \
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)
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#define TEST_IMM_SRC1_BYPASS( testnum, nop_cycles, inst, result, val1, imm ) \
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TEST_CASE( testnum, x3, result, \
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li x4, 0; \
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1: li x1, MASK_XLEN(val1); \
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TEST_INSERT_NOPS_ ## nop_cycles \
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inst x3, x1, SEXT_IMM(imm); \
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addi x4, x4, 1; \
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li x5, 2; \
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bne x4, x5, 1b \
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)
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#define TEST_IMM_ZEROSRC1( testnum, inst, result, imm ) \
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TEST_CASE( testnum, x1, result, \
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inst x1, x0, SEXT_IMM(imm); \
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)
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#define TEST_IMM_ZERODEST( testnum, inst, val1, imm ) \
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TEST_CASE( testnum, x0, 0, \
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li x1, MASK_XLEN(val1); \
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inst x0, x1, SEXT_IMM(imm); \
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)
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#-----------------------------------------------------------------------
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# Tests for vector config instructions
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#-----------------------------------------------------------------------
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#define TEST_VSETCFGIVL( testnum, nxpr, nfpr, bank, vl, result ) \
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TEST_CASE( testnum, x1, result, \
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li x1, (bank << 12); \
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vsetcfg x1,nxpr,nfpr; \
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li x1, vl; \
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vsetvl x1,x1; \
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)
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#define TEST_VVCFG( testnum, nxpr, nfpr, bank, vl, result ) \
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TEST_CASE( testnum, x1, result, \
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li x1, (bank << 12) | (nfpr << 6) | nxpr; \
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vsetcfg x1; \
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li x1, vl; \
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vsetvl x1,x1; \
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)
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#define TEST_VSETVL( testnum, nxpr, nfpr, bank, vl, result ) \
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TEST_CASE( testnum, x1, result, \
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li x1, (bank << 12); \
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vsetcfg x1,nxpr,nfpr; \
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li x1, vl; \
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vsetvl x1, x1; \
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)
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#-----------------------------------------------------------------------
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# Tests for an instruction with register operands
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| 332 |
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#-----------------------------------------------------------------------
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#define TEST_R_OP( testnum, inst, result, val1 ) \
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TEST_CASE( testnum, x3, result, \
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|
|
li x1, val1; \
|
| 337 |
|
|
inst x3, x1; \
|
| 338 |
|
|
)
|
| 339 |
|
|
|
| 340 |
|
|
#define TEST_R_SRC1_EQ_DEST( testnum, inst, result, val1 ) \
|
| 341 |
|
|
TEST_CASE( testnum, x1, result, \
|
| 342 |
|
|
li x1, val1; \
|
| 343 |
|
|
inst x1, x1; \
|
| 344 |
|
|
)
|
| 345 |
|
|
|
| 346 |
|
|
#define TEST_R_DEST_BYPASS( testnum, nop_cycles, inst, result, val1 ) \
|
| 347 |
|
|
TEST_CASE( testnum, x6, result, \
|
| 348 |
|
|
li x4, 0; \
|
| 349 |
|
|
1: li x1, val1; \
|
| 350 |
|
|
inst x3, x1; \
|
| 351 |
|
|
TEST_INSERT_NOPS_ ## nop_cycles \
|
| 352 |
|
|
addi x6, x3, 0; \
|
| 353 |
|
|
addi x4, x4, 1; \
|
| 354 |
|
|
li x5, 2; \
|
| 355 |
|
|
bne x4, x5, 1b \
|
| 356 |
|
|
)
|
| 357 |
|
|
|
| 358 |
|
|
#-----------------------------------------------------------------------
|
| 359 |
|
|
# Tests for an instruction with register-register operands
|
| 360 |
|
|
#-----------------------------------------------------------------------
|
| 361 |
|
|
|
| 362 |
|
|
#define TEST_RR_OP( testnum, inst, result, val1, val2 ) \
|
| 363 |
|
|
TEST_CASE( testnum, x3, result, \
|
| 364 |
|
|
li x1, MASK_XLEN(val1); \
|
| 365 |
|
|
li x2, MASK_XLEN(val2); \
|
| 366 |
|
|
inst x3, x1, x2; \
|
| 367 |
|
|
)
|
| 368 |
|
|
|
| 369 |
|
|
#define TEST_RR_SRC1_EQ_DEST( testnum, inst, result, val1, val2 ) \
|
| 370 |
|
|
TEST_CASE( testnum, x1, result, \
|
| 371 |
|
|
li x1, MASK_XLEN(val1); \
|
| 372 |
|
|
li x2, MASK_XLEN(val2); \
|
| 373 |
|
|
inst x1, x1, x2; \
|
| 374 |
|
|
)
|
| 375 |
|
|
|
| 376 |
|
|
#define TEST_RR_SRC2_EQ_DEST( testnum, inst, result, val1, val2 ) \
|
| 377 |
|
|
TEST_CASE( testnum, x2, result, \
|
| 378 |
|
|
li x1, MASK_XLEN(val1); \
|
| 379 |
|
|
li x2, MASK_XLEN(val2); \
|
| 380 |
|
|
inst x2, x1, x2; \
|
| 381 |
|
|
)
|
| 382 |
|
|
|
| 383 |
|
|
#define TEST_RR_SRC12_EQ_DEST( testnum, inst, result, val1 ) \
|
| 384 |
|
|
TEST_CASE( testnum, x1, result, \
|
| 385 |
|
|
li x1, MASK_XLEN(val1); \
|
| 386 |
|
|
inst x1, x1, x1; \
|
| 387 |
|
|
)
|
| 388 |
|
|
|
| 389 |
|
|
#define TEST_RR_DEST_BYPASS( testnum, nop_cycles, inst, result, val1, val2 ) \
|
| 390 |
|
|
TEST_CASE( testnum, x6, result, \
|
| 391 |
|
|
li x4, 0; \
|
| 392 |
|
|
1: li x1, MASK_XLEN(val1); \
|
| 393 |
|
|
li x2, MASK_XLEN(val2); \
|
| 394 |
|
|
inst x3, x1, x2; \
|
| 395 |
|
|
TEST_INSERT_NOPS_ ## nop_cycles \
|
| 396 |
|
|
addi x6, x3, 0; \
|
| 397 |
|
|
addi x4, x4, 1; \
|
| 398 |
|
|
li x5, 2; \
|
| 399 |
|
|
bne x4, x5, 1b \
|
| 400 |
|
|
)
|
| 401 |
|
|
|
| 402 |
|
|
#define TEST_RR_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
|
| 403 |
|
|
TEST_CASE( testnum, x3, result, \
|
| 404 |
|
|
li x4, 0; \
|
| 405 |
|
|
1: li x1, MASK_XLEN(val1); \
|
| 406 |
|
|
TEST_INSERT_NOPS_ ## src1_nops \
|
| 407 |
|
|
li x2, MASK_XLEN(val2); \
|
| 408 |
|
|
TEST_INSERT_NOPS_ ## src2_nops \
|
| 409 |
|
|
inst x3, x1, x2; \
|
| 410 |
|
|
addi x4, x4, 1; \
|
| 411 |
|
|
li x5, 2; \
|
| 412 |
|
|
bne x4, x5, 1b \
|
| 413 |
|
|
)
|
| 414 |
|
|
|
| 415 |
|
|
#define TEST_RR_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, result, val1, val2 ) \
|
| 416 |
|
|
TEST_CASE( testnum, x3, result, \
|
| 417 |
|
|
li x4, 0; \
|
| 418 |
|
|
1: li x2, MASK_XLEN(val2); \
|
| 419 |
|
|
TEST_INSERT_NOPS_ ## src1_nops \
|
| 420 |
|
|
li x1, MASK_XLEN(val1); \
|
| 421 |
|
|
TEST_INSERT_NOPS_ ## src2_nops \
|
| 422 |
|
|
inst x3, x1, x2; \
|
| 423 |
|
|
addi x4, x4, 1; \
|
| 424 |
|
|
li x5, 2; \
|
| 425 |
|
|
bne x4, x5, 1b \
|
| 426 |
|
|
)
|
| 427 |
|
|
|
| 428 |
|
|
#define TEST_RR_ZEROSRC1( testnum, inst, result, val ) \
|
| 429 |
|
|
TEST_CASE( testnum, x2, result, \
|
| 430 |
|
|
li x1, MASK_XLEN(val); \
|
| 431 |
|
|
inst x2, x0, x1; \
|
| 432 |
|
|
)
|
| 433 |
|
|
|
| 434 |
|
|
#define TEST_RR_ZEROSRC2( testnum, inst, result, val ) \
|
| 435 |
|
|
TEST_CASE( testnum, x2, result, \
|
| 436 |
|
|
li x1, MASK_XLEN(val); \
|
| 437 |
|
|
inst x2, x1, x0; \
|
| 438 |
|
|
)
|
| 439 |
|
|
|
| 440 |
|
|
#define TEST_RR_ZEROSRC12( testnum, inst, result ) \
|
| 441 |
|
|
TEST_CASE( testnum, x1, result, \
|
| 442 |
|
|
inst x1, x0, x0; \
|
| 443 |
|
|
)
|
| 444 |
|
|
|
| 445 |
|
|
#define TEST_RR_ZERODEST( testnum, inst, val1, val2 ) \
|
| 446 |
|
|
TEST_CASE( testnum, x0, 0, \
|
| 447 |
|
|
li x1, MASK_XLEN(val1); \
|
| 448 |
|
|
li x2, MASK_XLEN(val2); \
|
| 449 |
|
|
inst x0, x1, x2; \
|
| 450 |
|
|
)
|
| 451 |
|
|
|
| 452 |
|
|
#-----------------------------------------------------------------------
|
| 453 |
|
|
# Test memory instructions
|
| 454 |
|
|
#-----------------------------------------------------------------------
|
| 455 |
|
|
|
| 456 |
|
|
#define TEST_LD_OP( testnum, inst, result, offset, base ) \
|
| 457 |
|
|
TEST_CASE( testnum, x3, result, \
|
| 458 |
|
|
la x1, base; \
|
| 459 |
|
|
inst x3, offset(x1); \
|
| 460 |
|
|
)
|
| 461 |
|
|
|
| 462 |
|
|
#define TEST_ST_OP( testnum, load_inst, store_inst, result, offset, base ) \
|
| 463 |
|
|
TEST_CASE( testnum, x3, result, \
|
| 464 |
|
|
la x1, base; \
|
| 465 |
|
|
li x2, result; \
|
| 466 |
|
|
store_inst x2, offset(x1); \
|
| 467 |
|
|
load_inst x3, offset(x1); \
|
| 468 |
|
|
)
|
| 469 |
|
|
|
| 470 |
|
|
#define TEST_LD_DEST_BYPASS( testnum, nop_cycles, inst, result, offset, base ) \
|
| 471 |
|
|
test_ ## testnum: \
|
| 472 |
|
|
li TESTNUM, testnum; \
|
| 473 |
|
|
li x4, 0; \
|
| 474 |
|
|
1: la x1, base; \
|
| 475 |
|
|
inst x3, offset(x1); \
|
| 476 |
|
|
TEST_INSERT_NOPS_ ## nop_cycles \
|
| 477 |
|
|
addi x6, x3, 0; \
|
| 478 |
|
|
li x29, result; \
|
| 479 |
|
|
bne x6, x29, fail; \
|
| 480 |
|
|
addi x4, x4, 1; \
|
| 481 |
|
|
li x5, 2; \
|
| 482 |
|
|
bne x4, x5, 1b; \
|
| 483 |
|
|
|
| 484 |
|
|
#define TEST_LD_SRC1_BYPASS( testnum, nop_cycles, inst, result, offset, base ) \
|
| 485 |
|
|
test_ ## testnum: \
|
| 486 |
|
|
li TESTNUM, testnum; \
|
| 487 |
|
|
li x4, 0; \
|
| 488 |
|
|
1: la x1, base; \
|
| 489 |
|
|
TEST_INSERT_NOPS_ ## nop_cycles \
|
| 490 |
|
|
inst x3, offset(x1); \
|
| 491 |
|
|
li x29, result; \
|
| 492 |
|
|
bne x3, x29, fail; \
|
| 493 |
|
|
addi x4, x4, 1; \
|
| 494 |
|
|
li x5, 2; \
|
| 495 |
|
|
bne x4, x5, 1b \
|
| 496 |
|
|
|
| 497 |
|
|
#define TEST_ST_SRC12_BYPASS( testnum, src1_nops, src2_nops, load_inst, store_inst, result, offset, base ) \
|
| 498 |
|
|
test_ ## testnum: \
|
| 499 |
|
|
li TESTNUM, testnum; \
|
| 500 |
|
|
li x4, 0; \
|
| 501 |
|
|
1: li x1, result; \
|
| 502 |
|
|
TEST_INSERT_NOPS_ ## src1_nops \
|
| 503 |
|
|
la x2, base; \
|
| 504 |
|
|
TEST_INSERT_NOPS_ ## src2_nops \
|
| 505 |
|
|
store_inst x1, offset(x2); \
|
| 506 |
|
|
load_inst x3, offset(x2); \
|
| 507 |
|
|
li x29, result; \
|
| 508 |
|
|
bne x3, x29, fail; \
|
| 509 |
|
|
addi x4, x4, 1; \
|
| 510 |
|
|
li x5, 2; \
|
| 511 |
|
|
bne x4, x5, 1b \
|
| 512 |
|
|
|
| 513 |
|
|
#define TEST_ST_SRC21_BYPASS( testnum, src1_nops, src2_nops, load_inst, store_inst, result, offset, base ) \
|
| 514 |
|
|
test_ ## testnum: \
|
| 515 |
|
|
li TESTNUM, testnum; \
|
| 516 |
|
|
li x4, 0; \
|
| 517 |
|
|
1: la x2, base; \
|
| 518 |
|
|
TEST_INSERT_NOPS_ ## src1_nops \
|
| 519 |
|
|
li x1, result; \
|
| 520 |
|
|
TEST_INSERT_NOPS_ ## src2_nops \
|
| 521 |
|
|
store_inst x1, offset(x2); \
|
| 522 |
|
|
load_inst x3, offset(x2); \
|
| 523 |
|
|
li x29, result; \
|
| 524 |
|
|
bne x3, x29, fail; \
|
| 525 |
|
|
addi x4, x4, 1; \
|
| 526 |
|
|
li x5, 2; \
|
| 527 |
|
|
bne x4, x5, 1b \
|
| 528 |
|
|
|
| 529 |
|
|
#-----------------------------------------------------------------------
|
| 530 |
|
|
# Test branch instructions
|
| 531 |
|
|
#-----------------------------------------------------------------------
|
| 532 |
|
|
|
| 533 |
|
|
#define TEST_BR1_OP_TAKEN( testnum, inst, val1 ) \
|
| 534 |
|
|
test_ ## testnum: \
|
| 535 |
|
|
li TESTNUM, testnum; \
|
| 536 |
|
|
li x1, val1; \
|
| 537 |
|
|
inst x1, 2f; \
|
| 538 |
|
|
bne x0, TESTNUM, fail; \
|
| 539 |
|
|
1: bne x0, TESTNUM, 3f; \
|
| 540 |
|
|
2: inst x1, 1b; \
|
| 541 |
|
|
bne x0, TESTNUM, fail; \
|
| 542 |
|
|
3:
|
| 543 |
|
|
|
| 544 |
|
|
#define TEST_BR1_OP_NOTTAKEN( testnum, inst, val1 ) \
|
| 545 |
|
|
test_ ## testnum: \
|
| 546 |
|
|
li TESTNUM, testnum; \
|
| 547 |
|
|
li x1, val1; \
|
| 548 |
|
|
inst x1, 1f; \
|
| 549 |
|
|
bne x0, TESTNUM, 2f; \
|
| 550 |
|
|
1: bne x0, TESTNUM, fail; \
|
| 551 |
|
|
2: inst x1, 1b; \
|
| 552 |
|
|
3:
|
| 553 |
|
|
|
| 554 |
|
|
#define TEST_BR1_SRC1_BYPASS( testnum, nop_cycles, inst, val1 ) \
|
| 555 |
|
|
test_ ## testnum: \
|
| 556 |
|
|
li TESTNUM, testnum; \
|
| 557 |
|
|
li x4, 0; \
|
| 558 |
|
|
1: li x1, val1; \
|
| 559 |
|
|
TEST_INSERT_NOPS_ ## nop_cycles \
|
| 560 |
|
|
inst x1, fail; \
|
| 561 |
|
|
addi x4, x4, 1; \
|
| 562 |
|
|
li x5, 2; \
|
| 563 |
|
|
bne x4, x5, 1b \
|
| 564 |
|
|
|
| 565 |
|
|
#define TEST_BR2_OP_TAKEN( testnum, inst, val1, val2 ) \
|
| 566 |
|
|
test_ ## testnum: \
|
| 567 |
|
|
li TESTNUM, testnum; \
|
| 568 |
|
|
li x1, val1; \
|
| 569 |
|
|
li x2, val2; \
|
| 570 |
|
|
inst x1, x2, 2f; \
|
| 571 |
|
|
bne x0, TESTNUM, fail; \
|
| 572 |
|
|
1: bne x0, TESTNUM, 3f; \
|
| 573 |
|
|
2: inst x1, x2, 1b; \
|
| 574 |
|
|
bne x0, TESTNUM, fail; \
|
| 575 |
|
|
3:
|
| 576 |
|
|
|
| 577 |
|
|
#define TEST_BR2_OP_NOTTAKEN( testnum, inst, val1, val2 ) \
|
| 578 |
|
|
test_ ## testnum: \
|
| 579 |
|
|
li TESTNUM, testnum; \
|
| 580 |
|
|
li x1, val1; \
|
| 581 |
|
|
li x2, val2; \
|
| 582 |
|
|
inst x1, x2, 1f; \
|
| 583 |
|
|
bne x0, TESTNUM, 2f; \
|
| 584 |
|
|
1: bne x0, TESTNUM, fail; \
|
| 585 |
|
|
2: inst x1, x2, 1b; \
|
| 586 |
|
|
3:
|
| 587 |
|
|
|
| 588 |
|
|
#define TEST_BR2_SRC12_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
|
| 589 |
|
|
test_ ## testnum: \
|
| 590 |
|
|
li TESTNUM, testnum; \
|
| 591 |
|
|
li x4, 0; \
|
| 592 |
|
|
1: li x1, val1; \
|
| 593 |
|
|
TEST_INSERT_NOPS_ ## src1_nops \
|
| 594 |
|
|
li x2, val2; \
|
| 595 |
|
|
TEST_INSERT_NOPS_ ## src2_nops \
|
| 596 |
|
|
inst x1, x2, fail; \
|
| 597 |
|
|
addi x4, x4, 1; \
|
| 598 |
|
|
li x5, 2; \
|
| 599 |
|
|
bne x4, x5, 1b \
|
| 600 |
|
|
|
| 601 |
|
|
#define TEST_BR2_SRC21_BYPASS( testnum, src1_nops, src2_nops, inst, val1, val2 ) \
|
| 602 |
|
|
test_ ## testnum: \
|
| 603 |
|
|
li TESTNUM, testnum; \
|
| 604 |
|
|
li x4, 0; \
|
| 605 |
|
|
1: li x2, val2; \
|
| 606 |
|
|
TEST_INSERT_NOPS_ ## src1_nops \
|
| 607 |
|
|
li x1, val1; \
|
| 608 |
|
|
TEST_INSERT_NOPS_ ## src2_nops \
|
| 609 |
|
|
inst x1, x2, fail; \
|
| 610 |
|
|
addi x4, x4, 1; \
|
| 611 |
|
|
li x5, 2; \
|
| 612 |
|
|
bne x4, x5, 1b \
|
| 613 |
|
|
|
| 614 |
|
|
#-----------------------------------------------------------------------
|
| 615 |
|
|
# Test jump instructions
|
| 616 |
|
|
#-----------------------------------------------------------------------
|
| 617 |
|
|
|
| 618 |
|
|
#define TEST_JR_SRC1_BYPASS( testnum, nop_cycles, inst ) \
|
| 619 |
|
|
test_ ## testnum: \
|
| 620 |
|
|
li TESTNUM, testnum; \
|
| 621 |
|
|
li x4, 0; \
|
| 622 |
|
|
1: la x6, 2f; \
|
| 623 |
|
|
TEST_INSERT_NOPS_ ## nop_cycles \
|
| 624 |
|
|
inst x6; \
|
| 625 |
|
|
bne x0, TESTNUM, fail; \
|
| 626 |
|
|
2: addi x4, x4, 1; \
|
| 627 |
|
|
li x5, 2; \
|
| 628 |
|
|
bne x4, x5, 1b \
|
| 629 |
|
|
|
| 630 |
|
|
#define TEST_JALR_SRC1_BYPASS( testnum, nop_cycles, inst ) \
|
| 631 |
|
|
test_ ## testnum: \
|
| 632 |
|
|
li TESTNUM, testnum; \
|
| 633 |
|
|
li x4, 0; \
|
| 634 |
|
|
1: la x6, 2f; \
|
| 635 |
|
|
TEST_INSERT_NOPS_ ## nop_cycles \
|
| 636 |
|
|
inst x19, x6, 0; \
|
| 637 |
|
|
bne x0, TESTNUM, fail; \
|
| 638 |
|
|
2: addi x4, x4, 1; \
|
| 639 |
|
|
li x5, 2; \
|
| 640 |
|
|
bne x4, x5, 1b \
|
| 641 |
|
|
|
| 642 |
|
|
|
| 643 |
|
|
#-----------------------------------------------------------------------
|
| 644 |
|
|
# RV64UF MACROS
|
| 645 |
|
|
#-----------------------------------------------------------------------
|
| 646 |
|
|
|
| 647 |
|
|
#-----------------------------------------------------------------------
|
| 648 |
|
|
# Tests floating-point instructions
|
| 649 |
|
|
#-----------------------------------------------------------------------
|
| 650 |
|
|
|
| 651 |
|
|
#define qNaNf 0f:7fc00000
|
| 652 |
|
|
#define sNaNf 0f:7f800001
|
| 653 |
|
|
#define qNaN 0d:7ff8000000000000
|
| 654 |
|
|
#define sNaN 0d:7ff0000000000001
|
| 655 |
|
|
|
| 656 |
|
|
#define TEST_FP_OP_S_INTERNAL( testnum, flags, result, val1, val2, val3, code... ) \
|
| 657 |
|
|
test_ ## testnum: \
|
| 658 |
|
|
li TESTNUM, testnum; \
|
| 659 |
|
|
la a0, test_ ## testnum ## _data ;\
|
| 660 |
|
|
flw f0, 0(a0); \
|
| 661 |
|
|
flw f1, 4(a0); \
|
| 662 |
|
|
flw f2, 8(a0); \
|
| 663 |
|
|
lw a3, 12(a0); \
|
| 664 |
|
|
code; \
|
| 665 |
|
|
fsflags a1, x0; \
|
| 666 |
|
|
li a2, flags; \
|
| 667 |
|
|
bne a0, a3, fail; \
|
| 668 |
|
|
bne a1, a2, fail; \
|
| 669 |
|
|
j 2f; \
|
| 670 |
|
|
.balign 4; \
|
| 671 |
|
|
.data; \
|
| 672 |
|
|
test_ ## testnum ## _data: \
|
| 673 |
|
|
.float val1; \
|
| 674 |
|
|
.float val2; \
|
| 675 |
|
|
.float val3; \
|
| 676 |
|
|
.result; \
|
| 677 |
|
|
.text; \
|
| 678 |
|
|
2:
|
| 679 |
|
|
|
| 680 |
|
|
#define TEST_FP_OP_D_INTERNAL( testnum, flags, result, val1, val2, val3, code... ) \
|
| 681 |
|
|
test_ ## testnum: \
|
| 682 |
|
|
li TESTNUM, testnum; \
|
| 683 |
|
|
la a0, test_ ## testnum ## _data ;\
|
| 684 |
|
|
fld f0, 0(a0); \
|
| 685 |
|
|
fld f1, 8(a0); \
|
| 686 |
|
|
fld f2, 16(a0); \
|
| 687 |
|
|
ld a3, 24(a0); \
|
| 688 |
|
|
code; \
|
| 689 |
|
|
fsflags a1, x0; \
|
| 690 |
|
|
li a2, flags; \
|
| 691 |
|
|
bne a0, a3, fail; \
|
| 692 |
|
|
bne a1, a2, fail; \
|
| 693 |
|
|
j 2f; \
|
| 694 |
|
|
.data; \
|
| 695 |
|
|
.balign 8; \
|
| 696 |
|
|
test_ ## testnum ## _data: \
|
| 697 |
|
|
.double val1; \
|
| 698 |
|
|
.double val2; \
|
| 699 |
|
|
.double val3; \
|
| 700 |
|
|
.result; \
|
| 701 |
|
|
.text; \
|
| 702 |
|
|
2:
|
| 703 |
|
|
|
| 704 |
|
|
#define TEST_FCVT_S_D( testnum, result, val1 ) \
|
| 705 |
|
|
TEST_FP_OP_D_INTERNAL( testnum, 0, double result, val1, 0.0, 0.0, \
|
| 706 |
|
|
fcvt.s.d f3, f0; fcvt.d.s f3, f3; fmv.x.d a0, f3)
|
| 707 |
|
|
|
| 708 |
|
|
#define TEST_FCVT_D_S( testnum, result, val1 ) \
|
| 709 |
|
|
TEST_FP_OP_S_INTERNAL( testnum, 0, float result, val1, 0.0, 0.0, \
|
| 710 |
|
|
fcvt.d.s f3, f0; fcvt.s.d f3, f3; fmv.x.s a0, f3)
|
| 711 |
|
|
|
| 712 |
|
|
#define TEST_FP_OP1_S( testnum, inst, flags, result, val1 ) \
|
| 713 |
|
|
TEST_FP_OP_S_INTERNAL( testnum, flags, float result, val1, 0.0, 0.0, \
|
| 714 |
|
|
inst f3, f0; fmv.x.s a0, f3)
|
| 715 |
|
|
|
| 716 |
|
|
#define TEST_FP_OP1_D( testnum, inst, flags, result, val1 ) \
|
| 717 |
|
|
TEST_FP_OP_D_INTERNAL( testnum, flags, double result, val1, 0.0, 0.0, \
|
| 718 |
|
|
inst f3, f0; fmv.x.d a0, f3)
|
| 719 |
|
|
|
| 720 |
|
|
#define TEST_FP_OP1_S_DWORD_RESULT( testnum, inst, flags, result, val1 ) \
|
| 721 |
|
|
TEST_FP_OP_S_INTERNAL( testnum, flags, dword result, val1, 0.0, 0.0, \
|
| 722 |
|
|
inst f3, f0; fmv.x.s a0, f3)
|
| 723 |
|
|
|
| 724 |
|
|
#define TEST_FP_OP1_D_DWORD_RESULT( testnum, inst, flags, result, val1 ) \
|
| 725 |
|
|
TEST_FP_OP_D_INTERNAL( testnum, flags, dword result, val1, 0.0, 0.0, \
|
| 726 |
|
|
inst f3, f0; fmv.x.d a0, f3)
|
| 727 |
|
|
|
| 728 |
|
|
#define TEST_FP_OP2_S( testnum, inst, flags, result, val1, val2 ) \
|
| 729 |
|
|
TEST_FP_OP_S_INTERNAL( testnum, flags, float result, val1, val2, 0.0, \
|
| 730 |
|
|
inst f3, f0, f1; fmv.x.s a0, f3)
|
| 731 |
|
|
|
| 732 |
|
|
#define TEST_FP_OP2_D( testnum, inst, flags, result, val1, val2 ) \
|
| 733 |
|
|
TEST_FP_OP_D_INTERNAL( testnum, flags, double result, val1, val2, 0.0, \
|
| 734 |
|
|
inst f3, f0, f1; fmv.x.d a0, f3)
|
| 735 |
|
|
|
| 736 |
|
|
#define TEST_FP_OP3_S( testnum, inst, flags, result, val1, val2, val3 ) \
|
| 737 |
|
|
TEST_FP_OP_S_INTERNAL( testnum, flags, float result, val1, val2, val3, \
|
| 738 |
|
|
inst f3, f0, f1, f2; fmv.x.s a0, f3)
|
| 739 |
|
|
|
| 740 |
|
|
#define TEST_FP_OP3_D( testnum, inst, flags, result, val1, val2, val3 ) \
|
| 741 |
|
|
TEST_FP_OP_D_INTERNAL( testnum, flags, double result, val1, val2, val3, \
|
| 742 |
|
|
inst f3, f0, f1, f2; fmv.x.d a0, f3)
|
| 743 |
|
|
|
| 744 |
|
|
#define TEST_FP_INT_OP_S( testnum, inst, flags, result, val1, rm ) \
|
| 745 |
|
|
TEST_FP_OP_S_INTERNAL( testnum, flags, word result, val1, 0.0, 0.0, \
|
| 746 |
|
|
inst a0, f0, rm)
|
| 747 |
|
|
|
| 748 |
|
|
#define TEST_FP_INT_OP_D( testnum, inst, flags, result, val1, rm ) \
|
| 749 |
|
|
TEST_FP_OP_D_INTERNAL( testnum, flags, dword result, val1, 0.0, 0.0, \
|
| 750 |
|
|
inst a0, f0, rm)
|
| 751 |
|
|
|
| 752 |
|
|
#define TEST_FP_CMP_OP_S( testnum, inst, flags, result, val1, val2 ) \
|
| 753 |
|
|
TEST_FP_OP_S_INTERNAL( testnum, flags, word result, val1, val2, 0.0, \
|
| 754 |
|
|
inst a0, f0, f1)
|
| 755 |
|
|
|
| 756 |
|
|
#define TEST_FP_CMP_OP_D( testnum, inst, flags, result, val1, val2 ) \
|
| 757 |
|
|
TEST_FP_OP_D_INTERNAL( testnum, flags, dword result, val1, val2, 0.0, \
|
| 758 |
|
|
inst a0, f0, f1)
|
| 759 |
|
|
|
| 760 |
|
|
#define TEST_FCLASS_S(testnum, correct, input) \
|
| 761 |
|
|
TEST_CASE(testnum, a0, correct, li a0, input; fmv.s.x fa0, a0; \
|
| 762 |
|
|
fclass.s a0, fa0)
|
| 763 |
|
|
|
| 764 |
|
|
#define TEST_FCLASS_D(testnum, correct, input) \
|
| 765 |
|
|
TEST_CASE(testnum, a0, correct, li a0, input; fmv.d.x fa0, a0; \
|
| 766 |
|
|
fclass.d a0, fa0)
|
| 767 |
|
|
|
| 768 |
|
|
#define TEST_INT_FP_OP_S( testnum, inst, result, val1 ) \
|
| 769 |
|
|
test_ ## testnum: \
|
| 770 |
|
|
li TESTNUM, testnum; \
|
| 771 |
|
|
la a0, test_ ## testnum ## _data ;\
|
| 772 |
|
|
lw a3, 0(a0); \
|
| 773 |
|
|
li a0, val1; \
|
| 774 |
|
|
inst f0, a0; \
|
| 775 |
|
|
fsflags x0; \
|
| 776 |
|
|
fmv.x.s a0, f0; \
|
| 777 |
|
|
bne a0, a3, fail; \
|
| 778 |
|
|
j 1f; \
|
| 779 |
|
|
.balign 4; \
|
| 780 |
|
|
test_ ## testnum ## _data: \
|
| 781 |
|
|
.float result; \
|
| 782 |
|
|
1:
|
| 783 |
|
|
|
| 784 |
|
|
#define TEST_INT_FP_OP_D( testnum, inst, result, val1 ) \
|
| 785 |
|
|
test_ ## testnum: \
|
| 786 |
|
|
li TESTNUM, testnum; \
|
| 787 |
|
|
la a0, test_ ## testnum ## _data ;\
|
| 788 |
|
|
ld a3, 0(a0); \
|
| 789 |
|
|
li a0, val1; \
|
| 790 |
|
|
inst f0, a0; \
|
| 791 |
|
|
fsflags x0; \
|
| 792 |
|
|
fmv.x.d a0, f0; \
|
| 793 |
|
|
bne a0, a3, fail; \
|
| 794 |
|
|
j 1f; \
|
| 795 |
|
|
.balign 8; \
|
| 796 |
|
|
test_ ## testnum ## _data: \
|
| 797 |
|
|
.double result; \
|
| 798 |
|
|
1:
|
| 799 |
|
|
|
| 800 |
|
|
#-----------------------------------------------------------------------
|
| 801 |
|
|
# Pass and fail code (assumes test num is in TESTNUM)
|
| 802 |
|
|
#-----------------------------------------------------------------------
|
| 803 |
|
|
|
| 804 |
|
|
#define TEST_PASSFAIL \
|
| 805 |
|
|
bne x0, TESTNUM, pass; \
|
| 806 |
|
|
fail: \
|
| 807 |
|
|
RVTEST_FAIL; \
|
| 808 |
|
|
pass: \
|
| 809 |
|
|
RVTEST_PASS \
|
| 810 |
|
|
|
| 811 |
|
|
|
| 812 |
|
|
#-----------------------------------------------------------------------
|
| 813 |
|
|
# Test data section
|
| 814 |
|
|
#-----------------------------------------------------------------------
|
| 815 |
|
|
|
| 816 |
|
|
#define TEST_DATA
|
| 817 |
|
|
|
| 818 |
|
|
#endif
|
| 819 |
|
|
|
