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[/] [yifive/] [trunk/] [caravel_yifive/] [verilog/] [rtl/] [syntacore/] [scr1/] [src/] [includes/] [scr1_ahb.svh] - Blame information for rev 11

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/// Copyright by Syntacore LLC � 2016-2021. See LICENSE for details
/// @file       
/// @brief      AHB header file
///
 
`ifndef SCR1_AHB_SVH
`define SCR1_AHB_SVH
 
`include "scr1_arch_description.svh"
 
parameter SCR1_AHB_WIDTH  = 32;
 
// Encoding for HTRANS signal
parameter logic [1:0] SCR1_HTRANS_IDLE   = 2'b00;
parameter logic [1:0] SCR1_HTRANS_NONSEQ = 2'b10;
`ifdef SCR1_XPROP_EN
parameter logic [1:0] SCR1_HTRANS_ERR    = 'x;
`else // SCR1_XPROP_EN
parameter logic [1:0] SCR1_HTRANS_ERR    = '0;
`endif // SCR1_XPROP_EN
 
// Encoding for HBURST signal
parameter logic [2:0] SCR1_HBURST_SINGLE = 3'b000;
`ifdef SCR1_XPROP_EN
parameter logic [2:0] SCR1_HBURST_ERR    = 'x;
`else // SCR1_XPROP_EN
parameter logic [1:0] SCR1_HBURST_ERR    = '0;
`endif // SCR1_XPROP_EN
 
// Encoding for HSIZE signal
parameter logic [2:0] SCR1_HSIZE_8B    = 3'b000;
parameter logic [2:0] SCR1_HSIZE_16B   = 3'b001;
parameter logic [2:0] SCR1_HSIZE_32B   = 3'b010;
`ifdef SCR1_XPROP_EN
parameter logic [2:0] SCR1_HSIZE_ERR   = 'x;
`else // SCR1_XPROP_EN
parameter logic [1:0] SCR1_HSIZE_ERR   = '0;
`endif // SCR1_XPROP_EN
 
// Encoding HPROT signal
// HPROT[0] : 0 - instr;      1 - data
// HPROT[1] : 0 - user;       1 - privilege
// HPROT[2] : 0 - not buffer; 1 - buffer
// HPROT[3] : 0 - cacheable;  1 - cacheable
parameter SCR1_HPROT_DATA  = 0;
parameter SCR1_HPROT_PRV   = 1;
parameter SCR1_HPROT_BUF   = 2;
parameter SCR1_HPROT_CACHE = 3;
 
// Encoding HRESP signal
parameter logic SCR1_HRESP_OKAY  = 1'b0;
parameter logic SCR1_HRESP_ERROR = 1'b1;
`ifdef SCR1_XPROP_EN
parameter logic SCR1_HRESP_ERR   = 1'bx;
`else // SCR1_XPROP_EN
parameter logic SCR1_HRESP_ERR   = 1'b0;
`endif // SCR1_XPROP_EN
 
`endif // SCR1_AHB_SVH

Line No.	Rev	Author	Line
1	11	dinesha	`/// Copyright by Syntacore LLC � 2016-2021. See LICENSE for details`
2			`/// @file`
3			`/// @brief AHB header file`
4			`///`
5
6			`ifndef SCR1_AHB_SVH
7			`define SCR1_AHB_SVH
8
9			`include "scr1_arch_description.svh"
10
11			`parameter SCR1_AHB_WIDTH = 32;`
12
13			`// Encoding for HTRANS signal`
14			`parameter logic [1:0] SCR1_HTRANS_IDLE = 2'b00;`
15			`parameter logic [1:0] SCR1_HTRANS_NONSEQ = 2'b10;`
16			`ifdef SCR1_XPROP_EN
17			`parameter logic [1:0] SCR1_HTRANS_ERR = 'x;`
18			`else // SCR1_XPROP_EN
19			`parameter logic [1:0] SCR1_HTRANS_ERR = '0;`
20			`endif // SCR1_XPROP_EN
21
22			`// Encoding for HBURST signal`
23			`parameter logic [2:0] SCR1_HBURST_SINGLE = 3'b000;`
24			`ifdef SCR1_XPROP_EN
25			`parameter logic [2:0] SCR1_HBURST_ERR = 'x;`
26			`else // SCR1_XPROP_EN
27			`parameter logic [1:0] SCR1_HBURST_ERR = '0;`
28			`endif // SCR1_XPROP_EN
29
30			`// Encoding for HSIZE signal`
31			`parameter logic [2:0] SCR1_HSIZE_8B = 3'b000;`
32			`parameter logic [2:0] SCR1_HSIZE_16B = 3'b001;`
33			`parameter logic [2:0] SCR1_HSIZE_32B = 3'b010;`
34			`ifdef SCR1_XPROP_EN
35			`parameter logic [2:0] SCR1_HSIZE_ERR = 'x;`
36			`else // SCR1_XPROP_EN
37			`parameter logic [1:0] SCR1_HSIZE_ERR = '0;`
38			`endif // SCR1_XPROP_EN
39
40			`// Encoding HPROT signal`
41			`// HPROT[0] : 0 - instr; 1 - data`
42			`// HPROT[1] : 0 - user; 1 - privilege`
43			`// HPROT[2] : 0 - not buffer; 1 - buffer`
44			`// HPROT[3] : 0 - cacheable; 1 - cacheable`
45			`parameter SCR1_HPROT_DATA = 0;`
46			`parameter SCR1_HPROT_PRV = 1;`
47			`parameter SCR1_HPROT_BUF = 2;`
48			`parameter SCR1_HPROT_CACHE = 3;`
49
50			`// Encoding HRESP signal`
51			`parameter logic SCR1_HRESP_OKAY = 1'b0;`
52			`parameter logic SCR1_HRESP_ERROR = 1'b1;`
53			`ifdef SCR1_XPROP_EN
54			`parameter logic SCR1_HRESP_ERR = 1'bx;`
55			`else // SCR1_XPROP_EN
56			`parameter logic SCR1_HRESP_ERR = 1'b0;`
57			`endif // SCR1_XPROP_EN
58
59			`endif // SCR1_AHB_SVH

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[/] [yifive/] [trunk/] [caravel_yifive/] [verilog/] [rtl/] [syntacore/] [scr1/] [src/] [includes/] [scr1_ahb.svh] - Blame information for rev 11