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[/] [yifive/] [trunk/] [caravel_yifive/] [verilog/] [rtl/] [syntacore/] [scr1/] [src/] [includes/] [scr1_tapc.svh] - Blame information for rev 11

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1 11 dinesha
/// Copyright by Syntacore LLC © 2016-2021. See LICENSE for details
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/// @file       
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/// @brief      TAPC header file
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///
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`ifndef SCR1_INCLUDE_TAPC_DEFS
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`define SCR1_INCLUDE_TAPC_DEFS
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`include "scr1_arch_description.svh"
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`ifdef SCR1_DBG_EN
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//==============================================================================
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// Parameters
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//==============================================================================
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localparam int unsigned                         SCR1_TAP_STATE_WIDTH            = 4;
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localparam int unsigned                         SCR1_TAP_INSTRUCTION_WIDTH      = 5;
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localparam int unsigned                         SCR1_TAP_DR_IDCODE_WIDTH        = 32;
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localparam int unsigned                         SCR1_TAP_DR_BLD_ID_WIDTH        = 32;
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localparam int unsigned                         SCR1_TAP_DR_BYPASS_WIDTH        = 1;
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//localparam bit [SCR1_TAP_DR_IDCODE_WIDTH-1:0]   SCR1_TAP_IDCODE_RISCV_SC        = `SCR1_TAP_IDCODE;
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localparam bit [SCR1_TAP_DR_BLD_ID_WIDTH-1:0]   SCR1_TAP_BLD_ID_VALUE           = `SCR1_MIMPID;
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//==============================================================================
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// Types
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//==============================================================================
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typedef enum logic [SCR1_TAP_STATE_WIDTH-1:0] {
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    SCR1_TAP_STATE_RESET,
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    SCR1_TAP_STATE_IDLE,
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    SCR1_TAP_STATE_DR_SEL_SCAN,
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    SCR1_TAP_STATE_DR_CAPTURE,
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    SCR1_TAP_STATE_DR_SHIFT,
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    SCR1_TAP_STATE_DR_EXIT1,
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    SCR1_TAP_STATE_DR_PAUSE,
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    SCR1_TAP_STATE_DR_EXIT2,
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    SCR1_TAP_STATE_DR_UPDATE,
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    SCR1_TAP_STATE_IR_SEL_SCAN,
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    SCR1_TAP_STATE_IR_CAPTURE,
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    SCR1_TAP_STATE_IR_SHIFT,
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    SCR1_TAP_STATE_IR_EXIT1,
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    SCR1_TAP_STATE_IR_PAUSE,
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    SCR1_TAP_STATE_IR_EXIT2,
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    SCR1_TAP_STATE_IR_UPDATE
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`ifdef SCR1_XPROP_EN
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    ,
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    SCR1_TAP_STATE_XXX       = 'X
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`endif // SCR1_XPROP_EN
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} type_scr1_tap_state_e;
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typedef enum logic [SCR1_TAP_INSTRUCTION_WIDTH - 1:0] {
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    SCR1_TAP_INSTR_IDCODE            = 5'h01,
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    SCR1_TAP_INSTR_BLD_ID            = 5'h04,
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    SCR1_TAP_INSTR_SCU_ACCESS        = 5'h09,
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    SCR1_TAP_INSTR_DTMCS             = 5'h10,
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    SCR1_TAP_INSTR_DMI_ACCESS        = 5'h11,
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    SCR1_TAP_INSTR_BYPASS            = 5'h1F
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`ifdef SCR1_XPROP_EN
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    ,
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    SCR1_TAP_INSTR_XXX               = 'X
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`endif // SCR1_XPROP_EN
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} type_scr1_tap_instr_e;
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`endif // SCR1_DBG_EN
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`endif // SCR1_INCLUDE_TAPC_DEFS

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