Subversion Repositories z80soc

# Date: Thu Feb 18 17:31:51 2010

SET addpads = False

SET asysymbol = True

SET busformat = BusFormatAngleBracketNotRipped

SET createndf = False

SET designentry = VHDL

SET device = xc3s500e

SET devicefamily = spartan3e

SET flowvendor = Other

SET formalverification = False

SET foundationsym = False

SET implementationfiletype = Ngc

SET package = fg320

SET removerpms = False

SET simulationfiles = Behavioral

SET speedgrade = -4

SET verilogsim = False

SET vhdlsim = True

SET workingdirectory = .\tmp\

# CRC: f5ba11a6