URL https://opencores.org/ocsvn/z80soc/z80soc/trunk

Subversion Repositories z80soc

[/] [z80soc/] [trunk/] [V0.7.2/] [DE1/] [memoryCores/] [vram3200x8_inst.vhd] - Blame information for rev 44

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vram3200x8_inst : vram3200x8 PORT MAP (
                data     => data_sig,
                rdaddress        => rdaddress_sig,
                rdclock  => rdclock_sig,
                wraddress        => wraddress_sig,
                wrclock  => wrclock_sig,
                wren     => wren_sig,
                q        => q_sig
        );

Line No.	Rev	Author	Line
1	44	rrred	`vram3200x8_inst : vram3200x8 PORT MAP (`
2			`data => data_sig,`
3			`rdaddress => rdaddress_sig,`
4			`rdclock => rdclock_sig,`
5			`wraddress => wraddress_sig,`
6			`wrclock => wrclock_sig,`
7			`wren => wren_sig,`
8			`q => q_sig`
9			`);`

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Subversion Repositories z80soc

[/] [z80soc/] [trunk/] [V0.7.2/] [DE1/] [memoryCores/] [vram3200x8_inst.vhd] - Blame information for rev 44