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[/] [zap/] [trunk/] [src/] [testbench/] [uart_rx_logger.v] - Blame information for rev 43

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1 43 Revanth
// -----------------------------------------------------------------------------
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// --                                                                         --
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// --                   (C) 2016-2018 Revanth Kamaraj.                        --
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// --                                                                         -- 
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// -- --------------------------------------------------------------------------
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// --                                                                         --
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// -- This program is free software; you can redistribute it and/or           --
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// -- modify it under the terms of the GNU General Public License             --
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// -- as published by the Free Software Foundation; either version 2          --
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// -- of the License, or (at your option) any later version.                  --
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// --                                                                         --
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// -- This program is distributed in the hope that it will be useful,         --
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// -- but WITHOUT ANY WARRANTY; without even the implied warranty of          --
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// -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the           --
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// -- GNU General Public License for more details.                            --
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// --                                                                         --
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// -- You should have received a copy of the GNU General Public License       --
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// -- along with this program; if not, write to the Free Software             --
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// -- Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA           --
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// -- 02110-1301, USA.                                                        --
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// --                                                                         --
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// -----------------------------------------------------------------------------
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`default_nettype none
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//
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// P = 0 UART0 P = 1 UART1
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//
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// Assumes no parity, 8 bits per character and
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// 1 stop bit. 
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//
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// Gets UART characters from file and serializes them.
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//
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// If UART0, output file is `UART0_FILE_PATH_RX
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// If UART1, output file is `UART1_FILE_PATH_RX
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//
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module uart_rx_logger #(parameter [0:0] P = 0 ) ( input wire i_clk, output reg o_line = 1'd1 );
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integer signed    fh;
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reg               feof;
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integer signed    wchar;
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initial
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begin
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        if ( P == 0 )
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                fh = $fopen(`UART0_FILE_PATH_RX, "r+");
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        else
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                fh = $fopen(`UART1_FILE_PATH_RX, "r+");
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        if ( fh == 0 )
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        begin
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                $display($time, " - %m :: Error: Failed to open UART input stream. Handle = %d", fh);
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                $finish;
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        end
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        while ( 1 )
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        begin
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               wchar = $fgetc(fh);
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               if ( wchar != -1 )
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                       write_to_uart (wchar);
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               else
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               begin
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                       @(posedge i_clk);
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               end
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        end
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end
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task write_to_uart ( input integer signed wchar );
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begin
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        repeat(16) @(posedge i_clk) o_line <=     1'd0;
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        repeat(16) @(posedge i_clk) o_line <= wchar[0];
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        repeat(16) @(posedge i_clk) o_line <= wchar[1];
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        repeat(16) @(posedge i_clk) o_line <= wchar[2];
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        repeat(16) @(posedge i_clk) o_line <= wchar[3];
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        repeat(16) @(posedge i_clk) o_line <= wchar[4];
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        repeat(16) @(posedge i_clk) o_line <= wchar[5];
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        repeat(16) @(posedge i_clk) o_line <= wchar[6];
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        repeat(16) @(posedge i_clk) o_line <= wchar[7];
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        // Wait 1K clocks between input bytes.
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        repeat(1024) @(posedge i_clk) o_line <=     1'd1;
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end
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endtask
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endmodule // uart_rx_logger
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`default_nettype wire
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