OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [sw/] [gas-zippatch.patch] - Blame information for rev 209

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/bfd/archures.c binutils-2.27-zip/bfd/archures.c
2
--- binutils-2.27-original/bfd/archures.c       2016-08-03 03:36:50.000000000 -0400
3 202 dgisselq
+++ binutils-2.27-zip/bfd/archures.c    2017-01-04 14:22:45.000000000 -0500
4
@@ -525,6 +525,8 @@
5
 .#define bfd_mach_nios2r2      2
6
 .  bfd_arch_visium,    {* Visium *}
7
 .#define bfd_mach_visium       1
8
+.  bfd_arch_zip,       {* ZipCPU *}
9
+.#define bfd_mach_zip          0
10
 .  bfd_arch_last
11
 .  };
12
 */
13
@@ -655,6 +657,7 @@
14
 extern const bfd_arch_info_type bfd_xgate_arch;
15
 extern const bfd_arch_info_type bfd_z80_arch;
16
 extern const bfd_arch_info_type bfd_z8k_arch;
17
+extern const bfd_arch_info_type bfd_zip_arch;
18
 
19
 static const bfd_arch_info_type * const bfd_archures_list[] =
20
   {
21
@@ -744,6 +747,7 @@
22
     &bfd_xgate_arch,
23
     &bfd_z80_arch,
24
     &bfd_z8k_arch,
25
+    &bfd_zip_arch,
26
 #endif
27
 
28
 };
29 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/bfd/bfd-in2.h binutils-2.27-zip/bfd/bfd-in2.h
30
--- binutils-2.27-original/bfd/bfd-in2.h        2016-08-03 03:36:50.000000000 -0400
31 202 dgisselq
+++ binutils-2.27-zip/bfd/bfd-in2.h     2017-01-04 22:04:11.000000000 -0500
32
@@ -2336,6 +2336,8 @@
33
 #define bfd_mach_nios2r2       2
34
   bfd_arch_visium,     /* Visium */
35
 #define bfd_mach_visium        1
36
+  bfd_arch_zip,        /* ZipCPU */
37
+#define bfd_mach_zip           0
38
   bfd_arch_last
39
   };
40
 
41
@@ -6335,6 +6337,22 @@
42
   BFD_RELOC_VISIUM_HI16_PCREL,
43
   BFD_RELOC_VISIUM_LO16_PCREL,
44
   BFD_RELOC_VISIUM_IM16_PCREL,
45
+
46
+/* ZipCPU - 32 bit absolute value for LJMP instruction  */
47
+  BFD_RELOC_ZIP_VALUE,
48
+
49
+/* ZipCPU - 18-bit PC-relative offset for BRA (ADD #x,PC) instructions  */
50
+  BFD_RELOC_ZIP_BRANCH,
51
+
52
+/* ZipCPU value relocations  */
53
+  BFD_RELOC_ZIP_OPB_IMM,
54
+  BFD_RELOC_ZIP_OPB_OFFSET,
55
+  BFD_RELOC_ZIP_OPB_PCREL,
56
+  BFD_RELOC_ZIP_MOV_OFFSET,
57
+  BFD_RELOC_ZIP_MOV_PCREL,
58
+  BFD_RELOC_ZIP_LDI,
59
+  BFD_RELOC_ZIP_LLO,
60
+  BFD_RELOC_ZIP_BREV,
61
   BFD_RELOC_UNUSED };
62
 
63
 typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
64 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/bfd/config.bfd binutils-2.27-zip/bfd/config.bfd
65
--- binutils-2.27-original/bfd/config.bfd       2016-08-03 03:36:50.000000000 -0400
66 202 dgisselq
+++ binutils-2.27-zip/bfd/config.bfd    2016-12-31 17:11:00.961307172 -0500
67
@@ -1742,6 +1742,10 @@
68
     targ_underscore=yes
69
     ;;
70
 
71
+  zip*)
72
+    targ_defvec=zip_elf32_vec
73
+    ;;
74
+
75
   *-*-ieee*)
76
     targ_defvec=ieee_vec
77
     ;;
78 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/bfd/configure binutils-2.27-zip/bfd/configure
79
--- binutils-2.27-original/bfd/configure        2016-08-03 04:33:36.000000000 -0400
80 202 dgisselq
+++ binutils-2.27-zip/bfd/configure     2016-12-31 17:12:22.360697343 -0500
81
@@ -14542,6 +14542,7 @@
82
     xtensa_elf32_le_vec)        tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
83
     z80_coff_vec)               tb="$tb coff-z80.lo reloc16.lo $coffgen" ;;
84
     z8k_coff_vec)               tb="$tb coff-z8k.lo reloc16.lo $coff" ;;
85
+    zip_elf32_vec)              tb="$tb elf32-zip.lo elf32.lo $elf" ;;
86
 
87
     # These appear out of order in targets.c
88
     srec_vec)                   tb="$tb srec.lo" ;;
89
@@ -14924,6 +14925,9 @@
90
   x86_64-*-netbsd* | x86_64-*-openbsd*)
91
        COREFILE=netbsd-core.lo
92
        ;;
93
+  zip*)
94
+       COREFILE=netbsd-core.lo
95
+       ;;
96
   esac
97
 
98
   case "$COREFILE" in
99 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/bfd/configure.ac binutils-2.27-zip/bfd/configure.ac
100
--- binutils-2.27-original/bfd/configure.ac     2016-08-03 03:36:50.000000000 -0400
101 202 dgisselq
+++ binutils-2.27-zip/bfd/configure.ac  2016-12-31 17:13:38.600136486 -0500
102
@@ -717,6 +717,7 @@
103
     xtensa_elf32_le_vec)        tb="$tb xtensa-isa.lo xtensa-modules.lo elf32-xtensa.lo elf32.lo $elf" ;;
104
     z80_coff_vec)               tb="$tb coff-z80.lo reloc16.lo $coffgen" ;;
105
     z8k_coff_vec)               tb="$tb coff-z8k.lo reloc16.lo $coff" ;;
106
+    zip_elf32_vec)              tb="$tb elf32-zip.lo elf32.lo $elf" ;;
107
 
108
     # These appear out of order in targets.c
109
     srec_vec)                   tb="$tb srec.lo" ;;
110
@@ -1092,6 +1093,9 @@
111
   x86_64-*-netbsd* | x86_64-*-openbsd*)
112
        COREFILE=netbsd-core.lo
113
        ;;
114
+  zip*)
115
+       COREFILE=netbsd-core.lo
116
+       ;;
117
   esac
118
 
119
   case "$COREFILE" in
120 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/bfd/cpu-zip.c binutils-2.27-zip/bfd/cpu-zip.c
121
--- binutils-2.27-original/bfd/cpu-zip.c        1969-12-31 19:00:00.000000000 -0500
122 202 dgisselq
+++ binutils-2.27-zip/bfd/cpu-zip.c     2017-01-04 14:26:27.000000000 -0500
123
@@ -0,0 +1,65 @@
124
+////////////////////////////////////////////////////////////////////////////////
125
+//
126
+// Filename:   tc-zip.c
127
+//
128
+// Project:    Zip CPU backend for GNU Binutils
129
+//
130
+// Purpose:    BFD support for the Zip CPU architecture.
131
+//
132
+//             This file is part of BFD, the Binary File Descriptor library.
133
+//
134
+// Creator:    Dan Gisselquist, Ph.D.
135
+//             Gisselquist Technology, LLC
136
+//
137
+////////////////////////////////////////////////////////////////////////////////
138
+//
139
+// Copyright (C) 2016-2017, Gisselquist Technology, LLC
140
+//
141
+// This program is free software (firmware): you can redistribute it and/or
142
+// modify it under the terms of  the GNU General Public License as published
143
+// by the Free Software Foundation, either version 3 of the License, or (at
144
+// your option) any later version.
145
+//
146
+// This program is distributed in the hope that it will be useful, but WITHOUT
147
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
148
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
149
+// for more details.
150
+//
151
+// You should have received a copy of the GNU General Public License along
152
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
153
+// target there if the PDF file isn't present.)  If not, see
154
+// <http://www.gnu.org/licenses/> for a copy.
155
+//
156
+// License:    GPL, v3, as defined and found on www.gnu.org,
157
+//             http://www.gnu.org/licenses/gpl.html
158
+//
159
+//
160
+////////////////////////////////////////////////////////////////////////////////
161
+#include "sysdep.h"
162
+#include "bfd.h"
163
+#include "libbfd.h"
164
+
165
+const bfd_arch_info_type
166
+bfd_zip_arch =
167
+{
168
+  32,                          // There's 32 bits_per_word.
169
+  32,                          // There's 34 bits_per_address.
170
+  8,                           // There's 32 bits_per_byte.
171
+  bfd_arch_zip,                        // One of enum bfd_architecture, defined
172
+                               // in archures.c and provided in
173
+                               // generated header files.
174
+  bfd_mach_zip,                        // Random BFD-internal number for this
175
+                               // machine, similarly listed in
176
+                               // archures.c.  Not emitted in output.
177
+  "zip",                       // The arch_name.
178
+  "zip",                       // The printable name is the same.
179
+  2,                           // Section alignment power; each section
180
+                               // is aligned to (only) 2^2 (i.e. 4) bytes.
181
+  TRUE,                                // This is the default "machine".
182
+  bfd_default_compatible,      // Architecture comparison function
183
+  bfd_default_scan,            // String to architecture conversion
184
+  bfd_arch_default_fill,       // Default fill.
185
+  NULL                         // Pointer to next bfd_arch_info_type in
186
+                               // the same family.
187
+};
188
+
189 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/bfd/doc/archures.texi binutils-2.27-zip/bfd/doc/archures.texi
190
--- binutils-2.27-original/bfd/doc/archures.texi        2016-08-03 04:36:22.000000000 -0400
191 202 dgisselq
+++ binutils-2.27-zip/bfd/doc/archures.texi     2016-12-31 17:14:43.103668704 -0500
192
@@ -492,6 +492,8 @@
193
 #define bfd_mach_nios2r2       2
194
   bfd_arch_visium,     /* Visium */
195
 #define bfd_mach_visium        1
196
+  bfd_mach_zip,
197
+#define bfd_mach_zip           0
198
   bfd_arch_last
199
   @};
200
 @end example
201 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/bfd/doc/bfd.info binutils-2.27-zip/bfd/doc/bfd.info
202
--- binutils-2.27-original/bfd/doc/bfd.info     2016-08-03 04:36:22.000000000 -0400
203 202 dgisselq
+++ binutils-2.27-zip/bfd/doc/bfd.info  2017-01-04 14:40:21.000000000 -0500
204
@@ -8466,6 +8466,8 @@
205
      #define bfd_mach_nios2r2       2
206
        bfd_arch_visium,     /* Visium */
207
      #define bfd_mach_visium        1
208
+       bfd_arch_zip,        /* ZipCPU */
209
+     #define bfd_mach_zip           0
210
        bfd_arch_last
211
        };
212
 
213 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/bfd/doc/reloc.texi binutils-2.27-zip/bfd/doc/reloc.texi
214
--- binutils-2.27-original/bfd/doc/reloc.texi   2016-08-03 04:36:22.000000000 -0400
215 202 dgisselq
+++ binutils-2.27-zip/bfd/doc/reloc.texi        2016-12-31 17:17:15.950640091 -0500
216
@@ -4214,6 +4214,19 @@
217
 @deffnx {} BFD_RELOC_VISIUM_IM16_PCREL
218
 Visium Relocations.
219
 @end deffn
220
+@deffn {} BFD_RELOC_ZIP_VALUE
221
+@deffnx {} BFD_RELOC_OPB_IMM
222
+@deffnx {} BFD_RELOC_OPB_OFFSET
223
+@deffnx {} BFD_RELOC_OPB_PCREL
224
+@deffnx {} BFD_RELOC_OPB_GOTREL
225
+@deffnx {} BFD_RELOC_MOV_OFFSET
226
+@deffnx {} BFD_RELOC_MOV_PCREL
227
+@deffnx {} BFD_RELOC_MOV_GOTREL
228
+@deffnx {} BFD_RELOC_ZIP_LDI
229
+@deffnx {} BFD_RELOC_ZIP_LLO
230
+@deffnx {} BFD_RELOC_ZIP_LHI
231
+ZipCPU relocations
232
+@end deffn
233
 
234
 @example
235
 
236 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/bfd/elf32-zip.c binutils-2.27-zip/bfd/elf32-zip.c
237
--- binutils-2.27-original/bfd/elf32-zip.c      1969-12-31 19:00:00.000000000 -0500
238 202 dgisselq
+++ binutils-2.27-zip/bfd/elf32-zip.c   2017-01-24 13:54:25.214097101 -0500
239
@@ -0,0 +1,1134 @@
240
+////////////////////////////////////////////////////////////////////////////////
241
+//
242
+// Filename:   tc-zip.c
243
+//
244
+// Project:    Zip CPU backend for GNU Binutils
245
+//
246
+// Purpose:    Zip-specific support for 32-bit ELF.
247
+//
248
+//     This file is part of BFD, the Binary File Descriptor library.
249
+//
250
+// Creator:    Dan Gisselquist, Ph.D.
251
+//             Gisselquist Technology, LLC
252
+//
253
+////////////////////////////////////////////////////////////////////////////////
254
+//
255
+// Copyright (C) 2016, Gisselquist Technology, LLC
256
+//
257
+// This program is free software (firmware): you can redistribute it and/or
258
+// modify it under the terms of  the GNU General Public License as published
259
+// by the Free Software Foundation, either version 3 of the License, or (at
260
+// your option) any later version.
261
+//
262
+// This program is distributed in the hope that it will be useful, but WITHOUT
263
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
264
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
265
+// for more details.
266
+//
267
+// You should have received a copy of the GNU General Public License along
268
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
269
+// target there if the PDF file isn't present.)  If not, see
270
+// <http://www.gnu.org/licenses/> for a copy.
271
+//
272
+// License:    GPL, v3, as defined and found on www.gnu.org,
273
+//             http://www.gnu.org/licenses/gpl.html
274
+//
275
+//
276
+////////////////////////////////////////////////////////////////////////////////
277
+#include "sysdep.h"
278
+#include "bfd.h"
279
+#include "bfdlink.h"
280
+#include "libbfd.h"
281
+#include "elf-bfd.h"
282
+#include "elf/zip.h"
283
+#include <limits.h>
284
+#include <stdint.h>
285
+
286
+#define        zip_relocation  bfd_elf_generic_reloc
287
+
288
+static bfd_reloc_status_type
289
+zip_brev_relocation(bfd *, arelent *, asymbol *, void *, asection *,
290
+               bfd *, char **error_messsage);
291
+static uint32_t zip_bitreverse(uint32_t v);
292
+
293
+/* Forward declarations.  */
294
+static reloc_howto_type zip_elf_howto_table [] =
295
+{
296
+  /* This reloc does nothing.  */
297
+  HOWTO (R_ZIP_NONE,           /* type */
298
+        0,                     /* rightshift */
299
+        2,                     /* size (0 = byte, 1 = short, 2 = long) */
300
+        32,                    /* bitsize */
301
+        FALSE,                 /* pc_relative */
302
+        0,                     /* bitpos */
303
+        complain_overflow_dont, /* complain_on_overflow */
304
+        zip_relocation,        /* special_function */
305
+        "R_ZIP_NONE",          /* name */
306
+        FALSE,                 /* partial_inplace */
307
+        0,                     /* src_mask */
308
+        0,                     /* dst_mask */
309
+        FALSE),                /* pcrel_offset */
310
+
311
+  /* A 32 bit absolute relocation.  */
312
+  HOWTO (R_ZIP_VALUE,          /* type */
313
+        0,                     /* rightshift */
314
+        2,                     /* size (0 = byte, 1 = short, 2 = long) */
315
+        32,                    /* bitsize */
316
+        FALSE,                 /* pc_relative */
317
+        0,                     /* bitpos */
318
+        complain_overflow_dont, /* complain_on_overflow */
319
+        zip_relocation,        /* special_function */
320
+        "R_ZIP_VALUE",         /* name */
321
+        FALSE,                 /* partial_inplace */
322
+        0x00000000,            /* src_mask */
323
+        0xffffffff,            /* dst_mask */
324
+        FALSE),                /* pcrel_offset */
325
+
326
+  HOWTO (R_ZIP_BREV,           /* type -- LDIHI, but with bitreverse */
327
+        0,                     /* rightshift */
328
+        2,                     /* size (0 = byte, 1 = short, 2 = long) */
329
+        16,                    /* bitsize */
330
+        FALSE,                 /* pc_relative */
331
+        0,                     /* bitpos */
332
+        complain_overflow_bitfield, /* complain_on_overflow */
333
+        zip_brev_relocation,    /* special_function--needed for the bitreverse */
334
+        "R_ZIP_BREV",          /* name */
335
+        FALSE,                 /* partial_inplace */
336
+        0,                     /* src_mask */
337
+        0x0003ffff,            /* dst_mask */
338
+        FALSE),                /* pcrel_offset */
339
+
340
+  HOWTO (R_ZIP_LLO,            /* type */
341
+        0,                     /* rightshift */
342
+        2,                     /* size (0 = byte, 1 = short, 2 = long) */
343
+        23,                    /* bitsize */
344
+        FALSE,                 /* pc_relative */
345
+        0,                     /* bitpos */
346
+        complain_overflow_dont, /* don't complain_on_overflow */
347
+        zip_relocation,         /* special_function */
348
+        "R_ZIP_LLO",           /* name */
349
+        FALSE,                 /* partial_inplace */
350
+        0,                     /* src_mask */
351
+        0x0000ffff,            /* dst_mask */
352
+        FALSE),                /* pcrel_offset */
353
+
354
+  HOWTO (R_ZIP_LDI,            /* type */
355
+        0,                     /* rightshift */
356
+        2,                     /* size (0 = byte, 1 = short, 2 = long) */
357
+        23,                    /* bitsize */
358
+        FALSE,                 /* pc_relative */
359
+        0,                     /* bitpos */
360
+        complain_overflow_signed, /* complain_on_overflow */
361
+        zip_relocation,         /* special_function */
362
+        "R_ZIP_LDI",           /* name */
363
+        FALSE,                 /* partial_inplace */
364
+        0,                     /* src_mask */
365
+        0x007fffff,            /* dst_mask */
366
+        FALSE),                /* pcrel_offset */
367
+
368
+  /* An 18 bit pc-relative relocation.  */
369
+  HOWTO (R_ZIP_BRANCH,         /* type */
370
+        0,                     /* rightshift */
371
+        2,                     /* size (0 = byte, 1 = short, 2 = long) */
372
+        18,                    /* bitsize */
373
+        TRUE,                  /* pc_relative */
374
+        0,                     /* bitpos */
375
+        complain_overflow_signed, /* complain_on_overflow */
376
+        zip_relocation,        /* special_function */
377
+        "R_ZIP_BRANCH",        /* name */
378
+        FALSE,                 /* partial_inplace */
379
+        0x00000000,            /* src_mask */
380
+        0x0003fffc,            /* dst_mask */
381
+        TRUE),         /* pcrel_offset */
382
+
383
+  /* An 18 bit operand B immediate.  */
384
+  HOWTO (R_ZIP_OPB_IMM,        /* type */
385
+        0,                     /* rightshift */
386
+        2,                     /* size (0 = byte, 1 = short, 2 = long) */
387
+        18,                    /* bitsize */
388
+        FALSE,                 /* pc_relative */
389
+        0,                     /* bitpos */
390
+        complain_overflow_signed, /* complain_on_overflow */
391
+        zip_relocation,        /* special_function */
392
+        "R_ZIP_OPB_IMM",       /* name */
393
+        FALSE,                 /* partial_inplace */
394
+        0x00000000,            /* src_mask */
395
+        0x0003ffff,            /* dst_mask */
396
+        FALSE),                        /* pcrel_offset */
397
+
398
+  /* An 18 bit relocation.  */
399
+  HOWTO (R_ZIP_OPB_OFFSET,     /* type */
400
+        0,                     /* rightshift */
401
+        2,                     /* size (0 = byte, 1 = short, 2 = long) */
402
+        14,                    /* bitsize */
403
+        FALSE,                 /* pc_relative */
404
+        0,                     /* bitpos */
405
+        complain_overflow_signed, /* complain_on_overflow */
406
+        zip_relocation,        /* special_function */
407
+        "R_ZIP_OPB_OFFSET",    /* name */
408
+        FALSE,                 /* partial_inplace */
409
+        0x00000000,            /* src_mask */
410
+        0x00003fff,            /* dst_mask-14 bits */
411
+        FALSE),                        /* pcrel_offset */
412
+
413
+  /* An 18 bit operand B immediate, but relative to the current PC.  */
414
+  HOWTO (R_ZIP_OPB_PCREL,      /* type */
415
+        2,                     /* rightshift */
416
+        2,                     /* size (0 = byte, 1 = short, 2 = long) */
417
+        14,                    /* bitsize */
418
+        TRUE,                  /* pc_relative */
419
+        0,                     /* bitpos */
420
+        complain_overflow_signed, /* complain_on_overflow */
421
+        zip_relocation,        /* special_function */
422
+        "R_ZIP_OPB_PCREL",     /* name */
423
+        FALSE,                 /* partial_inplace */
424
+        0x00000000,            /* src_mask */
425
+        0x00003fff,            /* dst_mask-14 bits */
426
+        TRUE),                 /* pcrel_offset */
427
+
428
+  /* An 18 bit operand B immediate, but relative to the Global Offset Table. */
429
+  //HOWTO (R_ZIP_OPB_GOTREL,   /* type */
430
+        //0,                   /* rightshift */
431
+        //2,                   /* size (0 = byte, 1 = short, 2 = long) */
432
+        //18,                  /* bitsize */
433
+        //FALSE,                       /* pc_relative */
434
+        //0,                   /* bitpos */
435
+        //complain_overflow_signed, /* complain_on_overflow */
436
+        //zip_relocation,      /* special_function */
437
+        //"R_ZIP_OPB_GOTREL",  /* name */
438
+        //FALSE,                       /* partial_inplace */
439
+        //0x00000000,          /* src_mask */
440
+        //0x0003ffff,          /* dst_mask-14 bits */
441
+        //FALSE),              /* pcrel_offset */
442
+
443
+  /* */
444
+  HOWTO (R_ZIP_MOV_OFFSET,     /* type */
445
+        0,                     /* rightshift */
446
+        2,                     /* size (0 = byte, 1 = short, 2 = long) */
447
+        13,                    /* bitsize */
448
+        FALSE,                 /* pc_relative */
449
+        0,                     /* bitpos */
450
+        complain_overflow_signed, /* complain_on_overflow */
451
+        zip_relocation,         /* special_function */
452
+        "R_ZIP_MOV_OFFSET",    /* name */
453
+        FALSE,                 /* partial_inplace */
454
+        0,                     /* src_mask */
455
+        0x00001fff,            /* dst_mask */
456
+        FALSE),                /* pcrel_offset */
457
+
458
+  /* */
459
+  HOWTO (R_ZIP_MOV_PCREL,      /* type */
460
+        2,                     /* rightshift */
461
+        2,                     /* size (0 = byte, 1 = short, 2 = long) */
462
+        13,                    /* bitsize */
463
+        TRUE,                  /* pc_relative */
464
+        0,                     /* bitpos */
465
+        complain_overflow_signed, /* complain_on_overflow */
466
+        zip_relocation,         /* special_function */
467
+        "R_ZIP_MOV_PCREL",     /* name */
468
+        FALSE,                 /* partial_inplace */
469
+        0,                     /* src_mask */
470
+        0x00001fff,            /* dst_mask */
471
+        TRUE)                  /* pcrel_offset */
472
+
473
+  /* */
474
+  //HOWTO (R_ZIP_MOV_GOTREL,   /* type */
475
+        //0,                   /* rightshift */
476
+        //2,                   /* size (0 = byte, 1 = short, 2 = long) */
477
+        //13,                  /* bitsize */
478
+        //FALSE,                       /* pc_relative */
479
+        //0,                   /* bitpos */
480
+        //complain_overflow_signed, /* complain_on_overflow */
481
+        //zip_relocation,       /* special_function */
482
+        //"R_ZIP_MOV_GOTREL",  /* name */
483
+        //FALSE,                       /* partial_inplace */
484
+        //0,                   /* src_mask */
485
+        //0x00001fff,          /* dst_mask */
486
+        //FALSE),              /* pcrel_offset */
487
+
488
+};
489
+
490
+/* This structure is used to map BFD reloc codes to Zip ELF relocations */
491
+
492
+struct elf_reloc_map
493
+{
494
+  bfd_reloc_code_real_type bfd_reloc_val;
495
+  unsigned int elf_reloc_val;
496
+};
497
+
498
+static const struct elf_reloc_map zip_reloc_map [] =
499
+{
500
+  { BFD_RELOC_NONE,            R_ZIP_NONE },
501
+  { BFD_RELOC_ZIP_VALUE,       R_ZIP_VALUE },
502
+  { BFD_RELOC_ZIP_BRANCH,      R_ZIP_BRANCH },
503
+  { BFD_RELOC_ZIP_OPB_IMM,     R_ZIP_OPB_IMM },
504
+  { BFD_RELOC_ZIP_OPB_OFFSET,  R_ZIP_OPB_OFFSET },
505
+  { BFD_RELOC_ZIP_MOV_OFFSET,  R_ZIP_MOV_OFFSET },
506
+  { BFD_RELOC_ZIP_LDI,         R_ZIP_LDI },
507
+  { BFD_RELOC_ZIP_LLO,         R_ZIP_LLO },
508
+  { BFD_RELOC_ZIP_BREV,                R_ZIP_BREV },
509
+  { BFD_RELOC_14,              R_ZIP_OPB_OFFSET },
510
+  { BFD_RELOC_16,              R_ZIP_LLO },
511
+  { BFD_RELOC_32,              R_ZIP_VALUE },
512
+  { BFD_RELOC_ZIP_OPB_PCREL,   R_ZIP_OPB_PCREL },
513
+  { BFD_RELOC_ZIP_MOV_PCREL,   R_ZIP_MOV_PCREL }
514
+  // { BFD_RELOC_ZIP_OPB_GOTREL,       R_ZIP_OPB_GOTREL },
515
+  // { BFD_RELOC_ZIP_MOV_GOTREL,       R_ZIP_MOV_GOTREL },
516
+};
517
+
518
+/* Given a BFD reloc code, return the howto structure for the corresponding
519
+ * Zip ELF relocation. */
520
+static reloc_howto_type *
521
+zip_elf_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED,
522
+                       bfd_reloc_code_real_type code)
523
+{
524
+  unsigned int i;
525
+
526
+  for (i = 0; i < sizeof (zip_reloc_map) / sizeof (zip_reloc_map[0]); i++)
527
+    if (zip_reloc_map [i].bfd_reloc_val == code)
528
+      return & zip_elf_howto_table [(int)zip_reloc_map[i].elf_reloc_val];
529
+
530
+  return NULL;
531
+}
532
+
533
+static reloc_howto_type *
534
+zip_elf_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, const char *r_name)
535
+{
536
+  unsigned int i;
537
+
538
+  for (i = 0;
539
+       i < sizeof (zip_elf_howto_table) / sizeof (zip_elf_howto_table[0]);
540
+       i++)
541
+    if (zip_elf_howto_table[i].name != NULL
542
+       && strcasecmp (zip_elf_howto_table[i].name, r_name) == 0)
543
+      return &zip_elf_howto_table[i];
544
+
545
+  return NULL;
546
+}
547
+
548
+/* Given an ELF reloc, fill in the howto field of a relent. */
549
+static void
550
+zip_elf_info_to_howto(bfd * abfd ATTRIBUTE_UNUSED,
551
+                        arelent * cache_ptr,
552
+                        Elf_Internal_Rela * dst)
553
+{
554
+       unsigned int r;
555
+
556
+       r = ELF32_R_TYPE(dst->r_info);
557
+       BFD_ASSERT (r < (unsigned int) R_ZIP_max);
558
+       cache_ptr->howto = &zip_elf_howto_table [r];
559
+}
560
+
561
+static bfd_boolean
562
+zip_elf_relocate_section(bfd *output_bfd,
563
+                       struct bfd_link_info *info,
564
+                       bfd *input_bfd,
565
+                       asection *input_section,
566
+                       bfd_byte *contents,
567
+                       Elf_Internal_Rela *relocs,
568
+                       Elf_Internal_Sym *local_syms,
569
+                       asection **local_sections)
570
+{
571
+       Elf_Internal_Shdr               *symtab_hdr;
572
+       struct  elf_link_hash_entry     **sym_hashes;
573
+       Elf_Internal_Rela               *rel, *relend;
574
+
575
+       symtab_hdr = &elf_tdata(input_bfd)->symtab_hdr;
576
+       sym_hashes = elf_sym_hashes(input_bfd);
577
+       relend     = relocs+input_section->reloc_count;
578
+
579
+       for(rel=relocs; rel<relend; rel++) {
580
+               reloc_howto_type                *howto;
581
+               unsigned long                   r_symndx;
582
+               Elf_Internal_Sym                *sym;
583
+               asection                        *sec;
584
+               struct elf_link_hash_entry      *h;
585
+               bfd_vma                         relocation;
586
+               bfd_reloc_status_type           r;
587
+               const char                      *name = NULL;
588
+               int                             r_type;
589
+
590
+               r_type = ELF32_R_TYPE(rel->r_info);
591
+               r_symndx = ELF32_R_SYM(rel->r_info);
592
+
593
+               if ((r_type < 0) || (r_type >= (int)R_ZIP_max))
594
+               {
595
+                       bfd_set_error(bfd_error_bad_value);
596
+                       return FALSE;
597
+               }
598
+
599
+               howto = zip_elf_howto_table + ELF32_R_TYPE(rel->r_info);
600
+               h = NULL;
601
+               sym = NULL;
602
+               sec = NULL;
603
+
604
+               if (r_symndx < symtab_hdr->sh_info)
605
+               {
606
+                       sym = local_syms + r_symndx;
607
+                       sec = local_sections[r_symndx];
608
+                       relocation = _bfd_elf_rela_local_sym(output_bfd, sym, &sec, rel);
609
+                       name = bfd_elf_string_from_elf_section
610
+                               (input_bfd, symtab_hdr->sh_link, sym->st_name);
611
+                       name = (name == NULL) ? bfd_section_name(input_bfd, sec)
612
+                                       : name;
613
+               } else {
614
+                       bfd_boolean unresolved_reloc, warned, ignored;
615
+
616
+                       RELOC_FOR_GLOBAL_SYMBOL(info, input_bfd, input_section,
617
+                               rel, r_symndx, symtab_hdr, sym_hashes, h, sec,
618
+                               relocation, unresolved_reloc, warned, ignored);
619
+               }
620
+
621
+               if ((sec != NULL)&&(discarded_section(sec))) {
622
+                       RELOC_AGAINST_DISCARDED_SECTION(info, input_bfd,
623
+                               input_section, rel, 1, relend, howto, 0,
624
+                               contents);
625
+               }
626
+
627
+               if (bfd_link_relocatable(info))
628
+                       continue;
629
+
630
+               if (howto->type == R_ZIP_BREV) {
631
+                       if (rel->r_offset > bfd_get_section_limit(input_bfd, input_section)) {
632
+                               r = bfd_reloc_outofrange;
633
+                       } else {
634
+                               uint32_t        brev_reloc;
635
+                               bfd_byte        *location;
636
+                               bfd_vma         insn;
637
+
638
+                               location = contents + rel->r_offset * bfd_octets_per_byte(input_bfd);
639
+
640
+                               relocation += rel->r_addend;
641
+                               brev_reloc= zip_bitreverse(relocation);
642
+                               insn = bfd_get_32(input_bfd, location);
643
+                               insn = ((insn & ~howto->dst_mask)
644
+                               |(((insn & howto->src_mask)+brev_reloc)&howto->dst_mask));
645
+                               bfd_put_32(input_bfd, insn, location);
646
+                               r = bfd_reloc_ok;
647
+                       }
648
+               } else {
649
+                       r = _bfd_final_link_relocate(howto, input_bfd,
650
+                               input_section,
651
+                               contents, rel->r_offset,
652
+                               relocation,
653
+                               rel->r_addend);
654
+               }
655
+
656
+
657
+               if (r != bfd_reloc_ok)
658
+               {
659
+                       const char *msg = NULL;
660
+
661
+                       switch(r)
662
+                       {
663
+                               case bfd_reloc_overflow:
664
+                                       info->callbacks->reloc_overflow(
665
+                                               info, (h?&h->root:NULL),
666
+                                               name, howto->name,
667
+                                               (bfd_vma)0, input_bfd,
668
+                                               input_section, rel->r_offset);
669
+                                       break;
670
+                               case bfd_reloc_undefined:
671
+                                       info->callbacks->undefined_symbol(
672
+                                               info, name, input_bfd,
673
+                                               input_section, rel->r_offset,
674
+                                               TRUE);
675
+                                       break;
676
+                               case bfd_reloc_outofrange:
677
+                                       msg = _("internal error: out of range error");
678
+                                       break;
679
+                               case bfd_reloc_notsupported:
680
+                                       msg = _("internal error: unsupported relocation");
681
+                                       break;
682
+                               case bfd_reloc_dangerous:
683
+                                       msg = _("internal error: dangerous relocation");
684
+                                       break;
685
+                               default:
686
+                                       msg = _("internal error: unknown error");
687
+                                       break;
688
+                       }
689
+
690
+                       if (msg)
691
+                               info->callbacks->warning(info, msg, name,
692
+                                       input_bfd, input_section,
693
+                                       rel->r_offset);
694
+
695
+                       if (!r)
696
+                               return FALSE;
697
+               }
698
+       }
699
+       return TRUE;
700
+}
701
+
702
+static uint32_t
703
+zip_bitreverse(uint32_t v) {
704
+       unsigned r = 0, b;
705
+
706
+       for(b=0; b<32; b++, v>>=1)
707
+               r = (r<<1)|(v&1);
708
+
709
+       return r;
710
+}
711
+
712
+static bfd_reloc_status_type
713
+zip_brev_relocation(bfd *abfd,
714
+               arelent *reloc_entry,
715
+               asymbol *symbol,
716
+               void *data,
717
+               asection *input_section,
718
+               bfd *output_bfd,
719
+               char **error_message)
720
+{
721
+       bfd_vma relocation;
722
+       bfd_size_type octets = reloc_entry->address * bfd_octets_per_byte(abfd);
723
+       bfd_vma output_base = 0;
724
+       reloc_howto_type *howto = reloc_entry->howto;
725
+
726
+       // If this isn't a final relocation, then just use the generic
727
+       // relocation function.
728
+       if (output_bfd != NULL) {
729
+               return zip_relocation(abfd, reloc_entry, symbol, data,
730
+                       input_section, output_bfd, error_message);
731
+       }
732
+
733
+       // Otherwise, we need to adjust our file itself with this value ...
734
+       // Check that our relocation lies within the file, and particularly
735
+       // the section we think it should.  (This should really be an assert...)
736
+       if (reloc_entry->address > bfd_get_section_limit(abfd, input_section))
737
+               return bfd_reloc_outofrange;
738
+
739
+       // Get symbol value
740
+       if (bfd_is_com_section(symbol->section))
741
+               relocation = 0;
742
+       else
743
+               relocation = symbol->value;
744
+
745
+       /* Convert input-section relative symbol value to absolute */
746
+       if ((!howto->partial_inplace)
747
+                       ||(symbol->section->output_section == NULL))
748
+               output_base = 0;
749
+       else
750
+               output_base = symbol->section->output_section->vma;
751
+
752
+       relocation += output_base + symbol->section->output_offset;
753
+
754
+       /* Add in supplied addend. */
755
+       relocation += reloc_entry->addend;
756
+
757
+       // BREV does not handle PC relative offsets
758
+
759
+       // Ignore overflow checking ... BREV handles the top 18 bits of a 32-bit
760
+       // number.  Overflow would mean overflowing the 32-bit address space--
761
+       // not possible.
762
+       //
763
+       // if howto->complain_on_overflow ...
764
+
765
+       // relocation >>= howto->rightshift;    // = 0
766
+       // relocation <<= howto->bitpos;        // = 0
767
+
768
+       // Logic (nearly) copied from reloc.c:bfd_perform_relocation
769
+       unsigned        insn = bfd_get_32(abfd, (bfd_byte *)data + octets);
770
+
771
+       // Here's why we are going through this pain!
772
+       insn = zip_bitreverse((unsigned)insn);
773
+
774
+       // Now we can continue as before....
775
+       insn = ((insn&(~howto->dst_mask))
776
+               |(((insn&howto->src_mask)+relocation)&howto->dst_mask));
777
+       bfd_put_32(abfd, (bfd_vma)insn, (bfd_byte *)data + octets);
778
+
779
+       return bfd_reloc_ok;
780
+}
781
+
782
+// Zip Defines
783
+#define        TARGET_BIG_SYM  zip_elf32_vec
784
+#define        TARGET_BIG_NAME "elf32-zip"
785
+
786
+#define        ELF_ARCH        bfd_arch_zip
787
+// #define ELF_TARGET_ID               ZIP_ELF_DATA
788
+#define        ELF_MACHINE_CODE        EM_ZIP
789
+
790
+#define        ELF_MAXPAGESIZE         0x1000
791
+#define        ARCH_SIZE               32
792
+
793
+
794
+#define bfd_elf32_bfd_define_common_symbol     bfd_generic_define_common_symbol
795
+
796
+
797
+#define        bfd_elf32_bfd_reloc_type_lookup zip_elf_reloc_type_lookup
798
+#define        bfd_elf32_bfd_reloc_name_lookup zip_elf_reloc_name_lookup
799
+#define        elf_info_to_howto_rel   0
800
+#define        elf_info_to_howto       zip_elf_info_to_howto
801
+#define        elf_backend_relocate_section    zip_elf_relocate_section
802
+#define        elf_backend_rela_normal         1
803
+
804
+// Default ELF32 defines from elf32-target.h that we would've normally included
805
+// here, had we not been a OCTETS_PER_BYTE=4 machine
806
+
807
+#define        bfd_elf32_close_and_cleanup _bfd_elf_close_and_cleanup
808
+#define bfd_elf32_bfd_free_cached_info _bfd_free_cached_info
809
+#define bfd_elf32_get_section_contents _bfd_generic_get_section_contents
810
+#define bfd_elf32_canonicalize_dynamic_symtab \
811
+  _bfd_elf_canonicalize_dynamic_symtab
812
+#define bfd_elf32_get_synthetic_symtab _bfd_elf_get_synthetic_symtab
813
+#define bfd_elf32_canonicalize_reloc   _bfd_elf_canonicalize_reloc
814
+#define bfd_elf32_find_nearest_line    _bfd_elf_find_nearest_line
815
+#define bfd_elf32_find_line            _bfd_elf_find_line
816
+#define bfd_elf32_find_inliner_info    _bfd_elf_find_inliner_info
817
+#define bfd_elf32_read_minisymbols     _bfd_elf_read_minisymbols
818
+#define bfd_elf32_minisymbol_to_symbol _bfd_elf_minisymbol_to_symbol
819
+#define bfd_elf32_get_dynamic_symtab_upper_bound \
820
+  _bfd_elf_get_dynamic_symtab_upper_bound
821
+#define bfd_elf32_get_lineno           _bfd_elf_get_lineno
822
+#define bfd_elf32_get_reloc_upper_bound _bfd_elf_get_reloc_upper_bound
823
+#define bfd_elf32_get_symbol_info      _bfd_elf_get_symbol_info
824
+#define bfd_elf32_get_symbol_version_string    _bfd_elf_get_symbol_version_string
825
+#define bfd_elf32_canonicalize_symtab  _bfd_elf_canonicalize_symtab
826
+#define bfd_elf32_get_symtab_upper_bound _bfd_elf_get_symtab_upper_bound
827
+#define bfd_elf32_make_empty_symbol    _bfd_elf_make_empty_symbol
828
+#define bfd_elf32_new_section_hook     _bfd_elf_new_section_hook
829
+#define bfd_elf32_set_arch_mach                _bfd_elf_set_arch_mach
830
+#define bfd_elf32_set_section_contents _bfd_elf_set_section_contents
831
+#define bfd_elf32_sizeof_headers       _bfd_elf_sizeof_headers
832
+#define bfd_elf32_write_object_contents _bfd_elf_write_object_contents
833
+#define bfd_elf32_write_corefile_contents _bfd_elf_write_corefile_contents
834
+
835
+#define bfd_elf32_get_section_contents_in_window \
836
+  _bfd_generic_get_section_contents_in_window
837
+
838
+#define elf_backend_can_refcount 0
839
+#define elf_backend_want_got_plt 0
840
+#define elf_backend_plt_readonly 0
841
+#define elf_backend_want_plt_sym 0
842
+#define elf_backend_plt_not_loaded 0
843
+#define elf_backend_plt_alignment 2
844
+#define elf_backend_want_dynbss 1
845
+#define elf_backend_want_p_paddr_set_to_zero 0
846
+#define elf_backend_default_execstack 1
847
+#define elf_backend_caches_rawsize 0
848
+#define elf_backend_extern_protected_data 0
849
+#define elf_backend_stack_align 4
850
+#define elf_backend_strtab_flags 0
851
+
852
+#define bfd_elf32_bfd_debug_info_start bfd_void
853
+#define bfd_elf32_bfd_debug_info_end   bfd_void
854
+#define bfd_elf32_bfd_debug_info_accumulate \
855
+  ((void (*) (bfd*, struct bfd_section *)) bfd_void)
856
+
857
+#define bfd_elf32_bfd_get_relocated_section_contents \
858
+  bfd_generic_get_relocated_section_contents
859
+
860
+#define bfd_elf32_bfd_relax_section bfd_generic_relax_section
861
+
862
+#define elf_backend_can_gc_sections 1
863
+#define elf_backend_can_refcount 0
864
+#define elf_backend_want_got_sym 1
865
+#define elf_backend_gc_keep            _bfd_elf_gc_keep
866
+#define elf_backend_gc_mark_dynamic_ref        bfd_elf_gc_mark_dynamic_ref_symbol
867
+#define elf_backend_gc_mark_hook       _bfd_elf_gc_mark_hook
868
+#define elf_backend_gc_mark_extra_sections _bfd_elf_gc_mark_extra_sections
869
+#define elf_backend_gc_sweep_hook      NULL
870
+#define bfd_elf32_bfd_gc_sections bfd_elf_gc_sections
871
+
872
+#ifndef bfd_elf32_bfd_merge_sections
873
+#define bfd_elf32_bfd_merge_sections _bfd_elf_merge_sections
874
+#endif
875
+
876
+#ifndef bfd_elf32_bfd_is_group_section
877
+#define bfd_elf32_bfd_is_group_section bfd_elf_is_group_section
878
+#endif
879
+
880
+#ifndef bfd_elf32_bfd_discard_group
881
+#define bfd_elf32_bfd_discard_group bfd_generic_discard_group
882
+#endif
883
+
884
+#ifndef bfd_elf32_section_already_linked
885
+#define bfd_elf32_section_already_linked _bfd_elf_section_already_linked
886
+#endif
887
+
888
+#ifndef bfd_elf32_bfd_define_common_symbol
889
+#define bfd_elf32_bfd_define_common_symbol bfd_generic_define_common_symbol
890
+#endif
891
+
892
+#ifndef bfd_elf32_bfd_lookup_section_flags
893
+#define bfd_elf32_bfd_lookup_section_flags bfd_elf_lookup_section_flags
894
+#endif
895
+
896
+#ifndef bfd_elf32_bfd_make_debug_symbol
897
+#define bfd_elf32_bfd_make_debug_symbol \
898
+  ((asymbol * (*) (bfd *, void *, unsigned long)) bfd_nullvoidptr)
899
+#endif
900
+
901
+#ifndef bfd_elf32_bfd_copy_private_symbol_data
902
+#define bfd_elf32_bfd_copy_private_symbol_data _bfd_elf_copy_private_symbol_data
903
+#endif
904
+
905
+#ifndef bfd_elf32_bfd_copy_private_section_data
906
+#define bfd_elf32_bfd_copy_private_section_data \
907
+  _bfd_elf_copy_private_section_data
908
+#endif
909
+#ifndef bfd_elf32_bfd_copy_private_header_data
910
+#define bfd_elf32_bfd_copy_private_header_data \
911
+  _bfd_elf_copy_private_header_data
912
+#endif
913
+#ifndef bfd_elf32_bfd_copy_private_bfd_data
914
+#define bfd_elf32_bfd_copy_private_bfd_data \
915
+  _bfd_elf_copy_private_bfd_data
916
+#endif
917
+#ifndef bfd_elf32_bfd_print_private_bfd_data
918
+#define bfd_elf32_bfd_print_private_bfd_data \
919
+  _bfd_elf_print_private_bfd_data
920
+#endif
921
+#ifndef bfd_elf32_bfd_merge_private_bfd_data
922
+#define bfd_elf32_bfd_merge_private_bfd_data \
923
+  ((bfd_boolean (*) (bfd *, bfd *)) bfd_true)
924
+#endif
925
+#ifndef bfd_elf32_bfd_set_private_flags
926
+#define bfd_elf32_bfd_set_private_flags \
927
+  ((bfd_boolean (*) (bfd *, flagword)) bfd_true)
928
+#endif
929
+#ifndef bfd_elf32_bfd_is_local_label_name
930
+#define bfd_elf32_bfd_is_local_label_name _bfd_elf_is_local_label_name
931
+#endif
932
+#ifndef bfd_elf32_bfd_is_target_special_symbol
933
+#define bfd_elf32_bfd_is_target_special_symbol \
934
+  ((bfd_boolean (*) (bfd *, asymbol *)) bfd_false)
935
+#endif
936
+
937
+#ifndef bfd_elf32_get_dynamic_reloc_upper_bound
938
+#define bfd_elf32_get_dynamic_reloc_upper_bound \
939
+  _bfd_elf_get_dynamic_reloc_upper_bound
940
+#endif
941
+#ifndef bfd_elf32_canonicalize_dynamic_reloc
942
+#define bfd_elf32_canonicalize_dynamic_reloc _bfd_elf_canonicalize_dynamic_reloc
943
+#endif
944
+
945
+#define bfd_elf32_bfd_link_hash_table_create _bfd_elf_link_hash_table_create
946
+#define bfd_elf32_bfd_link_add_symbols bfd_elf_link_add_symbols
947
+#define bfd_elf32_bfd_final_link       bfd_elf_final_link
948
+
949
+#define bfd_elf32_bfd_link_just_syms   _bfd_elf_link_just_syms
950
+
951
+#define bfd_elf32_bfd_copy_link_hash_symbol_type \
952
+  _bfd_elf_copy_link_hash_symbol_type
953
+
954
+#define bfd_elf32_bfd_link_split_section _bfd_generic_link_split_section
955
+#define bfd_elf32_bfd_link_check_relocs _bfd_generic_link_check_relocs
956
+#define bfd_elf32_archive_p bfd_generic_archive_p
957
+#define bfd_elf32_write_archive_contents _bfd_write_archive_contents
958
+#define bfd_elf32_mkobject bfd_elf_make_object
959
+#define bfd_elf32_mkcorefile bfd_elf_mkcorefile
960
+#define bfd_elf32_mkarchive _bfd_generic_mkarchive
961
+#define bfd_elf32_print_symbol bfd_elf_print_symbol
962
+#define elf_symbol_leading_char 0
963
+
964
+#define elf_backend_arch_data NULL
965
+
966
+#ifndef ELF_TARGET_ID
967
+#define ELF_TARGET_ID  GENERIC_ELF_DATA
968
+#endif
969
+
970
+#ifndef ELF_OSABI
971
+#define ELF_OSABI ELFOSABI_NONE
972
+#endif
973
+
974
+#define ELF_COMMONPAGESIZE ELF_MAXPAGESIZE
975
+#define ELF_MINPAGESIZE ELF_COMMONPAGESIZE
976
+
977
+#if ELF_COMMONPAGESIZE > ELF_MAXPAGESIZE
978
+# error ELF_COMMONPAGESIZE > ELF_MAXPAGESIZE
979
+#endif
980
+#if ELF_MINPAGESIZE > ELF_COMMONPAGESIZE
981
+# error ELF_MINPAGESIZE > ELF_COMMONPAGESIZE
982
+#endif
983
+
984
+#ifndef ELF_DYNAMIC_SEC_FLAGS
985
+/* Note that we set the SEC_IN_MEMORY flag for these sections.  */
986
+#define ELF_DYNAMIC_SEC_FLAGS                  \
987
+  (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS     \
988
+   | SEC_IN_MEMORY | SEC_LINKER_CREATED)
989
+#endif
990
+
991
+#define elf_backend_collect FALSE
992
+#define elf_backend_type_change_ok FALSE
993
+
994
+#define elf_backend_sym_is_global      0
995
+#define elf_backend_object_p           0
996
+#define elf_backend_symbol_processing  0
997
+#define elf_backend_symbol_table_processing    0
998
+#define elf_backend_get_symbol_type 0
999
+#define elf_backend_archive_symbol_lookup _bfd_elf_archive_symbol_lookup
1000
+#define elf_backend_name_local_section_symbols 0
1001
+#define elf_backend_section_processing 0
1002
+#define elf_backend_section_from_shdr  _bfd_elf_make_section_from_shdr
1003
+#define elf_backend_section_flags      0
1004
+#define elf_backend_get_sec_type_attr  _bfd_elf_get_sec_type_attr
1005
+#define elf_backend_section_from_phdr  _bfd_elf_make_section_from_phdr
1006
+#define elf_backend_fake_sections      0
1007
+#define elf_backend_section_from_bfd_section   0
1008
+#define elf_backend_add_symbol_hook    0
1009
+#define elf_backend_link_output_symbol_hook 0
1010
+#define elf_backend_create_dynamic_sections 0
1011
+#define elf_backend_omit_section_dynsym _bfd_elf_link_omit_section_dynsym
1012
+#define elf_backend_relocs_compatible _bfd_elf_default_relocs_compatible
1013
+#define elf_backend_check_relocs       0
1014
+#define elf_backend_check_directives   0
1015
+#define elf_backend_notice_as_needed   _bfd_elf_notice_as_needed
1016
+#define elf_backend_adjust_dynamic_symbol 0
1017
+#define elf_backend_always_size_sections 0
1018
+#define elf_backend_size_dynamic_sections 0
1019
+#define elf_backend_init_index_section \
1020
+ ((void (*) (bfd *, struct bfd_link_info *)) bfd_void)
1021
+#define elf_backend_finish_dynamic_symbol      0
1022
+#define elf_backend_finish_dynamic_sections    0
1023
+#define elf_backend_begin_write_processing     0
1024
+#define elf_backend_final_write_processing     0
1025
+#define elf_backend_additional_program_headers 0
1026
+#define elf_backend_modify_segment_map 0
1027
+#ifndef elf_backend_modify_program_headers
1028
+#define elf_backend_modify_program_headers     0
1029
+#endif
1030
+#ifndef elf_backend_ecoff_debug_swap
1031
+#define elf_backend_ecoff_debug_swap   0
1032
+#endif
1033
+#ifndef elf_backend_bfd_from_remote_memory
1034
+#define elf_backend_bfd_from_remote_memory _bfd_elf32_bfd_from_remote_memory
1035
+#endif
1036
+#ifndef elf_backend_got_header_size
1037
+#define elf_backend_got_header_size    0
1038
+#endif
1039
+#ifndef elf_backend_got_elt_size
1040
+#define elf_backend_got_elt_size _bfd_elf_default_got_elt_size
1041
+#endif
1042
+#ifndef elf_backend_obj_attrs_vendor
1043
+#define elf_backend_obj_attrs_vendor           NULL
1044
+#endif
1045
+#ifndef elf_backend_obj_attrs_section
1046
+#define elf_backend_obj_attrs_section          NULL
1047
+#endif
1048
+#ifndef elf_backend_obj_attrs_arg_type
1049
+#define elf_backend_obj_attrs_arg_type         NULL
1050
+#endif
1051
+#ifndef elf_backend_obj_attrs_section_type
1052
+#define elf_backend_obj_attrs_section_type             SHT_GNU_ATTRIBUTES
1053
+#endif
1054
+#ifndef elf_backend_obj_attrs_order
1055
+#define elf_backend_obj_attrs_order            NULL
1056
+#endif
1057
+#define elf_backend_obj_attrs_handle_unknown   NULL
1058
+#define elf_backend_static_tls_alignment       1
1059
+#define elf_backend_post_process_headers       _bfd_elf_post_process_headers
1060
+#define elf_backend_print_symbol_all           NULL
1061
+#define elf_backend_output_arch_local_syms     NULL
1062
+#define elf_backend_output_arch_syms           NULL
1063
+#define elf_backend_copy_indirect_symbol  _bfd_elf_link_hash_copy_indirect
1064
+#define elf_backend_hide_symbol                _bfd_elf_link_hash_hide_symbol
1065
+#define elf_backend_fixup_symbol               NULL
1066
+#define elf_backend_merge_symbol_attribute     NULL
1067
+#define elf_backend_get_target_dtag            NULL
1068
+#define elf_backend_ignore_undef_symbol                NULL
1069
+#define elf_backend_emit_relocs                        _bfd_elf_link_output_relocs
1070
+#define elf_backend_count_relocs               NULL
1071
+#define elf_backend_count_additional_relocs    NULL
1072
+#define elf_backend_sort_relocs_p              NULL
1073
+#define elf_backend_grok_prstatus              NULL
1074
+#define elf_backend_grok_psinfo                        NULL
1075
+#define elf_backend_write_core_note            NULL
1076
+#define elf_backend_lookup_section_flags_hook  NULL
1077
+#define elf_backend_reloc_type_class           _bfd_elf_reloc_type_class
1078
+#define elf_backend_discard_info               NULL
1079
+#define elf_backend_ignore_discarded_relocs    NULL
1080
+#define elf_backend_action_discarded _bfd_elf_default_action_discarded
1081
+#define elf_backend_eh_frame_address_size _bfd_elf_eh_frame_address_size
1082
+#define elf_backend_can_make_relative_eh_frame _bfd_elf_can_make_relative
1083
+#define elf_backend_can_make_lsda_relative_eh_frame    _bfd_elf_can_make_relative
1084
+#define elf_backend_encode_eh_address          _bfd_elf_encode_eh_address
1085
+#define elf_backend_write_section              NULL
1086
+#define elf_backend_mips_irix_compat           NULL
1087
+#define elf_backend_mips_rtype_to_howto                NULL
1088
+
1089
+/* Previously, backends could only use SHT_REL or SHT_RELA relocation
1090
+   sections, but not both.  They defined USE_REL to indicate SHT_REL
1091
+   sections, and left it undefined to indicated SHT_RELA sections.
1092
+   For backwards compatibility, we still support this usage.  */
1093
+#ifndef USE_REL
1094
+#define USE_REL 0
1095
+#endif
1096
+
1097
+/* Use these in new code.  */
1098
+#define elf_backend_may_use_rel_p USE_REL
1099
+#define elf_backend_may_use_rela_p !USE_REL
1100
+#define elf_backend_default_use_rela_p !USE_REL
1101
+#define elf_backend_rela_plts_and_copies_p elf_backend_default_use_rela_p
1102
+
1103
+#ifndef elf_backend_rela_normal
1104
+#define elf_backend_rela_normal 0
1105
+#endif
1106
+
1107
+#define elf_backend_plt_sym_val NULL
1108
+#define elf_backend_relplt_name NULL
1109
+
1110
+#define ELF_MACHINE_ALT1 0
1111
+#define ELF_MACHINE_ALT2 0
1112
+
1113
+#ifndef elf_backend_size_info
1114
+#define elf_backend_size_info _bfd_elf32_size_info
1115
+#endif
1116
+
1117
+#define elf_backend_special_sections NULL
1118
+#define elf_backend_sign_extend_vma 0
1119
+#define elf_backend_link_order_error_handler _bfd_default_error_handler
1120
+#define elf_backend_common_definition _bfd_elf_common_definition
1121
+#define elf_backend_common_section_index _bfd_elf_common_section_index
1122
+#define elf_backend_common_section _bfd_elf_common_section
1123
+
1124
+#define elf_backend_merge_symbol NULL
1125
+#define elf_backend_hash_symbol _bfd_elf_hash_symbol
1126
+#define elf_backend_is_function_type _bfd_elf_is_function_type
1127
+#define elf_backend_maybe_function_sym _bfd_elf_maybe_function_sym
1128
+#define elf_backend_get_reloc_section _bfd_elf_get_reloc_section
1129
+#define elf_backend_copy_special_section_fields NULL
1130
+#define elf_backend_compact_eh_encoding NULL
1131
+#define elf_backend_cant_unwind_opcode 0
1132
+
1133
+#define elf_match_priority \
1134
+  (ELF_ARCH == bfd_arch_unknown ? 2 : ELF_OSABI == ELFOSABI_NONE ? 1 : 0)
1135
+
1136
+extern const struct elf_size_info _bfd_elf32_size_info;
1137
+
1138
+static struct elf_backend_data elf32_bed =
1139
+{
1140
+  ELF_ARCH,                    /* arch */
1141
+  ELF_TARGET_ID,               /* target_id */
1142
+  ELF_MACHINE_CODE,            /* elf_machine_code */
1143
+  ELF_OSABI,                   /* elf_osabi  */
1144
+  ELF_MAXPAGESIZE,             /* maxpagesize */
1145
+  ELF_MINPAGESIZE,             /* minpagesize */
1146
+  ELF_COMMONPAGESIZE,          /* commonpagesize */
1147
+  ELF_DYNAMIC_SEC_FLAGS,       /* dynamic_sec_flags */
1148
+  elf_backend_arch_data,
1149
+  elf_info_to_howto,
1150
+  elf_info_to_howto_rel,
1151
+  elf_backend_sym_is_global,
1152
+  elf_backend_object_p,
1153
+  elf_backend_symbol_processing,
1154
+  elf_backend_symbol_table_processing,
1155
+  elf_backend_get_symbol_type,
1156
+  elf_backend_archive_symbol_lookup,
1157
+  elf_backend_name_local_section_symbols,
1158
+  elf_backend_section_processing,
1159
+  elf_backend_section_from_shdr,
1160
+  elf_backend_section_flags,
1161
+  elf_backend_get_sec_type_attr,
1162
+  elf_backend_section_from_phdr,
1163
+  elf_backend_fake_sections,
1164
+  elf_backend_section_from_bfd_section,
1165
+  elf_backend_add_symbol_hook,
1166
+  elf_backend_link_output_symbol_hook,
1167
+  elf_backend_create_dynamic_sections,
1168
+  elf_backend_omit_section_dynsym,
1169
+  elf_backend_relocs_compatible,
1170
+  elf_backend_check_relocs,
1171
+  elf_backend_check_directives,
1172
+  elf_backend_notice_as_needed,
1173
+  elf_backend_adjust_dynamic_symbol,
1174
+  elf_backend_always_size_sections,
1175
+  elf_backend_size_dynamic_sections,
1176
+  elf_backend_init_index_section,
1177
+  elf_backend_relocate_section,
1178
+  elf_backend_finish_dynamic_symbol,
1179
+  elf_backend_finish_dynamic_sections,
1180
+  elf_backend_begin_write_processing,
1181
+  elf_backend_final_write_processing,
1182
+  elf_backend_additional_program_headers,
1183
+  elf_backend_modify_segment_map,
1184
+  elf_backend_modify_program_headers,
1185
+  elf_backend_gc_keep,
1186
+  elf_backend_gc_mark_dynamic_ref,
1187
+  elf_backend_gc_mark_hook,
1188
+  elf_backend_gc_mark_extra_sections,
1189
+  elf_backend_gc_sweep_hook,
1190
+  elf_backend_post_process_headers,
1191
+  elf_backend_print_symbol_all,
1192
+  elf_backend_output_arch_local_syms,
1193
+  elf_backend_output_arch_syms,
1194
+  elf_backend_copy_indirect_symbol,
1195
+  elf_backend_hide_symbol,
1196
+  elf_backend_fixup_symbol,
1197
+  elf_backend_merge_symbol_attribute,
1198
+  elf_backend_get_target_dtag,
1199
+  elf_backend_ignore_undef_symbol,
1200
+  elf_backend_emit_relocs,
1201
+  elf_backend_count_relocs,
1202
+  elf_backend_count_additional_relocs,
1203
+  elf_backend_sort_relocs_p,
1204
+  elf_backend_grok_prstatus,
1205
+  elf_backend_grok_psinfo,
1206
+  elf_backend_write_core_note,
1207
+  elf_backend_lookup_section_flags_hook,
1208
+  elf_backend_reloc_type_class,
1209
+  elf_backend_discard_info,
1210
+  elf_backend_ignore_discarded_relocs,
1211
+  elf_backend_action_discarded,
1212
+  elf_backend_eh_frame_address_size,
1213
+  elf_backend_can_make_relative_eh_frame,
1214
+  elf_backend_can_make_lsda_relative_eh_frame,
1215
+  elf_backend_encode_eh_address,
1216
+  elf_backend_write_section,
1217
+  elf_backend_mips_irix_compat,
1218
+  elf_backend_mips_rtype_to_howto,
1219
+  elf_backend_ecoff_debug_swap,
1220
+  elf_backend_bfd_from_remote_memory,
1221
+  elf_backend_plt_sym_val,
1222
+  elf_backend_common_definition,
1223
+  elf_backend_common_section_index,
1224
+  elf_backend_common_section,
1225
+  elf_backend_merge_symbol,
1226
+  elf_backend_hash_symbol,
1227
+  elf_backend_is_function_type,
1228
+  elf_backend_maybe_function_sym,
1229
+  elf_backend_get_reloc_section,
1230
+  elf_backend_copy_special_section_fields,
1231
+  elf_backend_link_order_error_handler,
1232
+  elf_backend_relplt_name,
1233
+  ELF_MACHINE_ALT1,
1234
+  ELF_MACHINE_ALT2,
1235
+  &elf_backend_size_info,
1236
+  elf_backend_special_sections,
1237
+  elf_backend_got_header_size,
1238
+  elf_backend_got_elt_size,
1239
+  elf_backend_obj_attrs_vendor,
1240
+  elf_backend_obj_attrs_section,
1241
+  elf_backend_obj_attrs_arg_type,
1242
+  elf_backend_obj_attrs_section_type,
1243
+  elf_backend_obj_attrs_order,
1244
+  elf_backend_obj_attrs_handle_unknown,
1245
+  elf_backend_compact_eh_encoding,
1246
+  elf_backend_cant_unwind_opcode,
1247
+  elf_backend_static_tls_alignment,
1248
+  elf_backend_stack_align,
1249
+  elf_backend_strtab_flags,
1250
+  elf_backend_collect,
1251
+  elf_backend_type_change_ok,
1252
+  elf_backend_may_use_rel_p,
1253
+  elf_backend_may_use_rela_p,
1254
+  elf_backend_default_use_rela_p,
1255
+  elf_backend_rela_plts_and_copies_p,
1256
+  elf_backend_rela_normal,
1257
+  elf_backend_sign_extend_vma,
1258
+  elf_backend_want_got_plt,
1259
+  elf_backend_plt_readonly,
1260
+  elf_backend_want_plt_sym,
1261
+  elf_backend_plt_not_loaded,
1262
+  elf_backend_plt_alignment,
1263
+  elf_backend_can_gc_sections,
1264
+  elf_backend_can_refcount,
1265
+  elf_backend_want_got_sym,
1266
+  elf_backend_want_dynbss,
1267
+  elf_backend_want_p_paddr_set_to_zero,
1268
+  elf_backend_default_execstack,
1269
+  elf_backend_caches_rawsize,
1270
+  elf_backend_extern_protected_data
1271
+};
1272
+
1273
+/* Forward declaration for use when initialising alternative_target field.  */
1274
+
1275
+#ifdef TARGET_BIG_SYM
1276
+const bfd_target TARGET_BIG_SYM =
1277
+{
1278
+  /* name: identify kind of target */
1279
+  TARGET_BIG_NAME,
1280
+
1281
+  /* flavour: general indication about file */
1282
+  bfd_target_elf_flavour,
1283
+
1284
+  /* byteorder: data is big endian */
1285
+  BFD_ENDIAN_BIG,
1286
+
1287
+  /* header_byteorder: header is also big endian */
1288
+  BFD_ENDIAN_BIG,
1289
+
1290
+  /* object_flags: mask of all file flags */
1291
+  (HAS_RELOC | EXEC_P | HAS_LINENO | HAS_DEBUG | HAS_SYMS | HAS_LOCALS
1292
+   | DYNAMIC | WP_TEXT | D_PAGED | BFD_COMPRESS | BFD_DECOMPRESS
1293
+   | BFD_COMPRESS_GABI | BFD_CONVERT_ELF_COMMON | BFD_USE_ELF_STT_COMMON),
1294
+
1295
+  /* section_flags: mask of all section flags */
1296
+  (SEC_HAS_CONTENTS | SEC_ALLOC | SEC_LOAD | SEC_RELOC | SEC_READONLY
1297
+   | SEC_CODE | SEC_DATA | SEC_DEBUGGING | SEC_EXCLUDE | SEC_SORT_ENTRIES
1298
+   | SEC_SMALL_DATA | SEC_MERGE | SEC_STRINGS | SEC_GROUP),
1299
+
1300
+   /* leading_symbol_char: is the first char of a user symbol
1301
+      predictable, and if so what is it */
1302
+  elf_symbol_leading_char,
1303
+
1304
+  /* ar_pad_char: pad character for filenames within an archive header
1305
+     FIXME:  this really has nothing to do with ELF, this is a characteristic
1306
+     of the archiver and/or os and should be independently tunable */
1307
+  '/',
1308
+
1309
+  /* ar_max_namelen: maximum number of characters in an archive header
1310
+     FIXME:  this really has nothing to do with ELF, this is a characteristic
1311
+     of the archiver and should be independently tunable.  The System V ABI,
1312
+     Chapter 7 (Formats & Protocols), Archive section sets this as 15.  */
1313
+  15,
1314
+
1315
+  elf_match_priority,
1316
+
1317
+  /* Routines to byte-swap various sized integers from the data sections */
1318
+  bfd_getb64, bfd_getb_signed_64, bfd_putb64,
1319
+    bfd_getb32, bfd_getb_signed_32, bfd_putb32,
1320
+    bfd_getb16, bfd_getb_signed_16, bfd_putb16,
1321
+
1322
+  /* Routines to byte-swap various sized integers from the file headers */
1323
+  bfd_getb64, bfd_getb_signed_64, bfd_putb64,
1324
+    bfd_getb32, bfd_getb_signed_32, bfd_putb32,
1325
+    bfd_getb16, bfd_getb_signed_16, bfd_putb16,
1326
+
1327
+  /* bfd_check_format: check the format of a file being read */
1328
+  { _bfd_dummy_target,         /* unknown format */
1329
+    bfd_elf32_object_p,                /* assembler/linker output (object file) */
1330
+    bfd_elf32_archive_p,       /* an archive */
1331
+    bfd_elf32_core_file_p      /* a core file */
1332
+  },
1333
+
1334
+  /* bfd_set_format: set the format of a file being written */
1335
+  { bfd_false,
1336
+    bfd_elf32_mkobject,
1337
+    bfd_elf32_mkarchive,
1338
+    bfd_elf32_mkcorefile
1339
+  },
1340
+
1341
+  /* bfd_write_contents: write cached information into a file being written */
1342
+  { bfd_false,
1343
+    bfd_elf32_write_object_contents,
1344
+    bfd_elf32_write_archive_contents,
1345
+    bfd_elf32_write_corefile_contents,
1346
+  },
1347
+
1348
+  BFD_JUMP_TABLE_GENERIC (bfd_elf32),
1349
+  BFD_JUMP_TABLE_COPY (bfd_elf32),
1350
+  BFD_JUMP_TABLE_CORE (bfd_elf32),
1351
+#ifdef bfd_elf32_archive_functions
1352
+  BFD_JUMP_TABLE_ARCHIVE (bfd_elf32_archive),
1353
+#else
1354
+  BFD_JUMP_TABLE_ARCHIVE (_bfd_archive_coff),
1355
+#endif
1356
+  BFD_JUMP_TABLE_SYMBOLS (bfd_elf32),
1357
+  BFD_JUMP_TABLE_RELOCS (bfd_elf32),
1358
+  BFD_JUMP_TABLE_WRITE (bfd_elf32),
1359
+  BFD_JUMP_TABLE_LINK (bfd_elf32),
1360
+  BFD_JUMP_TABLE_DYNAMIC (bfd_elf32),
1361
+
1362
+  /* Alternative endian target.  */
1363
+#ifdef TARGET_LITTLE_SYM
1364
+  & TARGET_LITTLE_SYM,
1365
+#else
1366
+  NULL,
1367
+#endif
1368
+
1369
+  /* backend_data: */
1370
+  &elf32_bed
1371
+};
1372
+#endif
1373
+
1374 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/bfd/libbfd.h binutils-2.27-zip/bfd/libbfd.h
1375
--- binutils-2.27-original/bfd/libbfd.h 2016-08-03 03:36:51.000000000 -0400
1376 202 dgisselq
+++ binutils-2.27-zip/bfd/libbfd.h      2017-01-04 22:04:11.000000000 -0500
1377
@@ -3125,6 +3125,16 @@
1378
   "BFD_RELOC_VISIUM_HI16_PCREL",
1379
   "BFD_RELOC_VISIUM_LO16_PCREL",
1380
   "BFD_RELOC_VISIUM_IM16_PCREL",
1381
+  "BFD_RELOC_ZIP_VALUE",
1382
+  "BFD_RELOC_ZIP_BRANCH",
1383
+  "BFD_RELOC_ZIP_OPB_IMM",
1384
+  "BFD_RELOC_ZIP_OPB_OFFSET",
1385
+  "BFD_RELOC_ZIP_OPB_PCREL",
1386
+  "BFD_RELOC_ZIP_MOV_OFFSET",
1387
+  "BFD_RELOC_ZIP_MOV_PCREL",
1388
+  "BFD_RELOC_ZIP_LDI",
1389
+  "BFD_RELOC_ZIP_LLO",
1390
+  "BFD_RELOC_ZIP_BREV",
1391
  "@@overflow: BFD_RELOC_UNUSED@@",
1392
 };
1393
 #endif
1394 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/bfd/Makefile.am binutils-2.27-zip/bfd/Makefile.am
1395
--- binutils-2.27-original/bfd/Makefile.am      2016-08-03 03:36:50.000000000 -0400
1396 202 dgisselq
+++ binutils-2.27-zip/bfd/Makefile.am   2016-12-31 17:26:07.151146300 -0500
1397
@@ -173,7 +173,8 @@
1398
        cpu-xstormy16.lo \
1399
        cpu-xtensa.lo \
1400
        cpu-z80.lo \
1401
-       cpu-z8k.lo
1402
+       cpu-z8k.lo \
1403
+       cpu-zip.lo
1404
 
1405
 ALL_MACHINES_CFILES = \
1406
        cpu-aarch64.c \
1407
@@ -260,7 +261,8 @@
1408
        cpu-xstormy16.c \
1409
        cpu-xtensa.c \
1410
        cpu-z80.c \
1411
-       cpu-z8k.c
1412
+       cpu-z8k.c \
1413
+       cpu-zip.c
1414
 
1415
 # The .o files needed by all of the 32 bit vectors that are configured into
1416
 # target_vector in targets.c if configured with --enable-targets=all.
1417
@@ -382,6 +384,7 @@
1418
        elf32-xgate.lo \
1419
        elf32-xstormy16.lo \
1420
        elf32-xtensa.lo \
1421
+       elf32-zip.lo \
1422
        elf32.lo \
1423
        elflink.lo \
1424
        elfxx-sparc.lo \
1425
@@ -574,6 +577,7 @@
1426
        elf32-xgate.c \
1427
        elf32-xstormy16.c \
1428
        elf32-xtensa.c \
1429
+       elf32-zip.c \
1430
        elf32.c \
1431
        elflink.c \
1432
        elfxx-sparc.c \
1433 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/bfd/Makefile.in binutils-2.27-zip/bfd/Makefile.in
1434
--- binutils-2.27-original/bfd/Makefile.in      2016-08-03 04:06:27.000000000 -0400
1435 202 dgisselq
+++ binutils-2.27-zip/bfd/Makefile.in   2017-01-04 14:29:55.000000000 -0500
1436
@@ -505,7 +505,8 @@
1437
        cpu-xstormy16.lo \
1438
        cpu-xtensa.lo \
1439
        cpu-z80.lo \
1440
-       cpu-z8k.lo
1441
+       cpu-z8k.lo \
1442
+       cpu-zip.lo
1443
 
1444
 ALL_MACHINES_CFILES = \
1445
        cpu-aarch64.c \
1446
@@ -592,7 +593,8 @@
1447
        cpu-xstormy16.c \
1448
        cpu-xtensa.c \
1449
        cpu-z80.c \
1450
-       cpu-z8k.c
1451
+       cpu-z8k.c \
1452
+       cpu-zip.c
1453
 
1454
 
1455
 # The .o files needed by all of the 32 bit vectors that are configured into
1456
@@ -715,6 +717,7 @@
1457
        elf32-xgate.lo \
1458
        elf32-xstormy16.lo \
1459
        elf32-xtensa.lo \
1460
+       elf32-zip.lo \
1461
        elf32.lo \
1462
        elflink.lo \
1463
        elfxx-sparc.lo \
1464
@@ -907,6 +910,7 @@
1465
        elf32-xgate.c \
1466
        elf32-xstormy16.c \
1467
        elf32-xtensa.c \
1468
+       elf32-zip.c \
1469
        elf32.c \
1470
        elflink.c \
1471
        elfxx-sparc.c \
1472
@@ -1437,6 +1441,7 @@
1473
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-xtensa.Plo@am__quote@
1474
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-z80.Plo@am__quote@
1475
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-z8k.Plo@am__quote@
1476
+@AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/cpu-zip.Plo@am__quote@
1477
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/demo64.Plo@am__quote@
1478
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/dwarf1.Plo@am__quote@
1479
 @AMDEP_TRUE@@am__include@ @am__quote@./$(DEPDIR)/dwarf2.Plo@am__quote@
1480 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/bfd/merge.c binutils-2.27-zip/bfd/merge.c
1481
--- binutils-2.27-original/bfd/merge.c  2016-08-03 03:36:51.000000000 -0400
1482 202 dgisselq
+++ binutils-2.27-zip/bfd/merge.c       2017-01-02 14:48:54.000000000 -0500
1483
@@ -826,7 +826,7 @@
1484
   else
1485
     {
1486
       contents = NULL;
1487
-      pos = sec->output_section->filepos + sec->output_offset;
1488
+      pos = sec->output_section->filepos + sec->output_offset * bfd_octets_per_byte(output_bfd);
1489
       if (bfd_seek (output_bfd, pos, SEEK_SET) != 0)
1490
        return FALSE;
1491
     }
1492 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/bfd/reloc.c binutils-2.27-zip/bfd/reloc.c
1493
--- binutils-2.27-original/bfd/reloc.c  2016-08-03 03:36:51.000000000 -0400
1494 202 dgisselq
+++ binutils-2.27-zip/bfd/reloc.c       2017-01-04 22:03:52.000000000 -0500
1495
@@ -7697,7 +7697,32 @@
1496
   BFD_RELOC_VISIUM_IM16_PCREL
1497
 ENUMDOC
1498
   Visium Relocations.
1499
-
1500
+ENUM
1501
+  BFD_RELOC_ZIP_VALUE
1502
+ENUMDOC
1503
+  ZipCPU - 32 bit absolute value for LJMP instruction
1504
+ENUM
1505
+  BFD_RELOC_ZIP_BRANCH
1506
+ENUMDOC
1507
+  ZipCPU - 18-bit PC-relative offset for BRA (ADD #x,PC) instructions
1508
+ENUM
1509
+  BFD_RELOC_ZIP_OPB_IMM
1510
+ENUMX
1511
+  BFD_RELOC_ZIP_OPB_OFFSET
1512
+ENUMX
1513
+  BFD_RELOC_ZIP_OPB_PCREL
1514
+ENUMX
1515
+  BFD_RELOC_ZIP_MOV_OFFSET
1516
+ENUMX
1517
+  BFD_RELOC_ZIP_MOV_PCREL
1518
+ENUMX
1519
+  BFD_RELOC_ZIP_LDI
1520
+ENUMX
1521
+  BFD_RELOC_ZIP_LLO
1522
+ENUMX
1523
+  BFD_RELOC_ZIP_BREV
1524
+ENUMDOC
1525
+  ZipCPU value relocations
1526
 ENDSENUM
1527
   BFD_RELOC_UNUSED
1528
 CODE_FRAGMENT
1529 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/bfd/targets.c binutils-2.27-zip/bfd/targets.c
1530
--- binutils-2.27-original/bfd/targets.c        2016-08-03 03:36:51.000000000 -0400
1531 202 dgisselq
+++ binutils-2.27-zip/bfd/targets.c     2016-12-31 17:37:14.021847080 -0500
1532
@@ -910,6 +910,7 @@
1533
 extern const bfd_target xtensa_elf32_le_vec;
1534
 extern const bfd_target z80_coff_vec;
1535
 extern const bfd_target z8k_coff_vec;
1536
+extern const bfd_target zip_elf32_vec;
1537
 
1538
 /* These are always included.  */
1539
 extern const bfd_target srec_vec;
1540
@@ -1441,6 +1442,8 @@
1541
        &z80_coff_vec,
1542
 
1543
        &z8k_coff_vec,
1544
+
1545
+       &zip_elf32_vec,
1546
 #endif /* not SELECT_VECS */
1547
 
1548
 /* Always support S-records, for convenience.  */
1549 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/binutils/readelf.c binutils-2.27-zip/binutils/readelf.c
1550
--- binutils-2.27-original/binutils/readelf.c   2016-08-03 03:36:51.000000000 -0400
1551 202 dgisselq
+++ binutils-2.27-zip/binutils/readelf.c        2016-12-31 17:40:19.908241961 -0500
1552
@@ -154,6 +154,7 @@
1553
 #include "elf/xgate.h"
1554
 #include "elf/xstormy16.h"
1555
 #include "elf/xtensa.h"
1556
+#include "elf/zip.h"
1557
 
1558
 #include "getopt.h"
1559
 #include "libiberty.h"
1560
@@ -800,6 +801,7 @@
1561
     case EM_XTENSA_OLD:
1562
     case EM_MICROBLAZE:
1563
     case EM_MICROBLAZE_OLD:
1564
+    case EM_ZIP:
1565
       return TRUE;
1566
 
1567
     case EM_68HC05:
1568
@@ -1476,6 +1478,10 @@
1569
        case EM_ALTERA_NIOS2:
1570
          rtype = elf_nios2_reloc_type (type);
1571
          break;
1572
+
1573
+       case EM_ZIP:
1574
+         rtype = elf_zip_reloc_type (type);
1575
+         break;
1576
        }
1577
 
1578
       if (rtype == NULL)
1579
@@ -2339,6 +2345,7 @@
1580
     case EM_TILEGX:            return "Tilera TILE-Gx multicore architecture family";
1581
     case EM_CUDA:              return "NVIDIA CUDA architecture";
1582
     case EM_XGATE:             return "Motorola XGATE embedded processor";
1583
+    case EM_ZIP:               return "Gisselquist Technology ZipCPU";
1584
     default:
1585
       snprintf (buff, sizeof (buff), _("<unknown>: 0x%x"), e_machine);
1586
       return buff;
1587
@@ -11659,6 +11666,8 @@
1588
     case EM_XTENSA_OLD:
1589
     case EM_XTENSA:
1590
       return reloc_type == 1; /* R_XTENSA_32.  */
1591
+    case EM_ZIP:
1592
+      return reloc_type == 1; /* R_ZIP_32.  */
1593
     default:
1594
       {
1595
        static unsigned int prev_warn = 0;
1596
@@ -11735,6 +11744,8 @@
1597
     case EM_XTENSA_OLD:
1598
     case EM_XTENSA:
1599
       return reloc_type == 14; /* R_XTENSA_32_PCREL.  */
1600
+    case EM_ZIP:
1601
+      return FALSE; /*  */
1602
     default:
1603
       /* Do not abort or issue an error message here.  Not all targets use
1604
         pc-relative 32-bit relocs in their DWARF debug information and we
1605
@@ -11944,6 +11955,7 @@
1606
     case EM_TI_C6000:/* R_C6000_NONE.  */
1607
     case EM_X86_64:  /* R_X86_64_NONE.  */
1608
     case EM_XC16X:
1609
+    case EM_ZIP:
1610
       return reloc_type == 0;
1611
 
1612
     case EM_AARCH64:
1613 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/config.sub binutils-2.27-zip/config.sub
1614
--- binutils-2.27-original/config.sub   2016-08-03 03:36:51.000000000 -0400
1615 202 dgisselq
+++ binutils-2.27-zip/config.sub        2017-01-11 14:20:34.804049801 -0500
1616
@@ -316,7 +316,7 @@
1617
        | visium \
1618
        | we32k \
1619
        | x86 | xc16x | xstormy16 | xtensa \
1620
-       | z8k | z80)
1621
+       | z8k | z80 )
1622
                basic_machine=$basic_machine-unknown
1623
                ;;
1624
        c54x)
1625
@@ -355,6 +355,14 @@
1626
        xscaleel)
1627
                basic_machine=armel-unknown
1628
                ;;
1629
+       zip-*-linux*)
1630
+               basic_machine=zip
1631
+               os=-linux
1632
+               ;;
1633
+       zip*)
1634
+               basic_machine=zip-unknown
1635
+               os=-elf
1636
+               ;;
1637
 
1638
        # We use `pc' rather than `unknown'
1639
        # because (1) that's what they normally are, and
1640 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/configure binutils-2.27-zip/configure
1641
--- binutils-2.27-original/configure    2016-08-03 03:54:55.000000000 -0400
1642 202 dgisselq
+++ binutils-2.27-zip/configure 2017-01-08 20:37:33.566336786 -0500
1643
@@ -3548,6 +3548,9 @@
1644
   ft32-*-*)
1645
     noconfigdirs="$noconfigdirs ${libgcj}"
1646
     ;;
1647
+  zip*)
1648
+    noconfigdirs="$noconfigdirs ${libgcj}"
1649
+    ;;
1650
   *-*-lynxos*)
1651
     noconfigdirs="$noconfigdirs ${libgcj}"
1652
     ;;
1653
@@ -3575,6 +3578,9 @@
1654
     *-*-aix*)
1655
        noconfigdirs="$noconfigdirs target-libgo"
1656
        ;;
1657
+    zip*)
1658
+       noconfigdirs="$noconfigdirs target-libgo"
1659
+       ;;
1660
     esac
1661
 fi
1662
 
1663
@@ -3974,6 +3980,9 @@
1664
   vax-*-*)
1665
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
1666
     ;;
1667
+  zip*)
1668
+    noconfigdirs="$noconfigdirs gdb gprof"
1669
+    ;;
1670
 esac
1671
 
1672
 # If we aren't building newlib, then don't build libgloss, since libgloss
1673 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/configure.ac binutils-2.27-zip/configure.ac
1674
--- binutils-2.27-original/configure.ac 2016-08-03 04:37:38.000000000 -0400
1675 202 dgisselq
+++ binutils-2.27-zip/configure.ac      2017-01-08 20:41:54.836485336 -0500
1676
@@ -884,6 +884,9 @@
1677
   ft32-*-*)
1678
     noconfigdirs="$noconfigdirs ${libgcj}"
1679
     ;;
1680
+  zip*)
1681
+    noconfigdirs="$noconfigdirs ${libgcj}"
1682
+    ;;
1683
   *-*-lynxos*)
1684
     noconfigdirs="$noconfigdirs ${libgcj}"
1685
     ;;
1686
@@ -911,6 +914,9 @@
1687
     *-*-aix*)
1688
        noconfigdirs="$noconfigdirs target-libgo"
1689
        ;;
1690
+    zip*)
1691
+       noconfigdirs="$noconfigdirs target-libgo"
1692
+       ;;
1693
     esac
1694
 fi
1695
 
1696
@@ -1310,6 +1316,9 @@
1697
   vax-*-*)
1698
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
1699
     ;;
1700
+  zip*)
1701
+    noconfigdirs="$noconfigdirs ${libgcj} gdb sim gprof"
1702
+    ;;
1703
 esac
1704
 
1705
 # If we aren't building newlib, then don't build libgloss, since libgloss
1706 209 dgisselq
diff -Naur '--exclude=*.swp' binutils-2.27-original/gas/config/tc-zip.c binutils-2.27-zip/gas/config/tc-zip.c
1707
--- binutils-2.27-original/gas/config/tc-zip.c  1969-12-31 19:00:00.000000000 -0500
1708
+++ binutils-2.27-zip/gas/config/tc-zip.c       2019-02-14 20:54:05.341671631 -0500
1709
@@ -0,0 +1,3403 @@
1710 202 dgisselq
+////////////////////////////////////////////////////////////////////////////////
1711
+//
1712
+// Filename:   tc-zip.c
1713
+//
1714
+// Project:    Zip CPU backend for GNU Binutils
1715
+//
1716
+// Purpose:    This is the main file associated with the Zip Assembler.  By
1717
+//             that I mean that it handles all of the ZipCPU specifics.  The
1718
+//     rest of the files you find in this directory, mostly tc-cpuname.c and
1719
+//     such, handle other CPUs.  This one handles the ZipCPU.  The goal in
1720
+//     doing this is so that nothing else changes when changes need to be made
1721
+//     to a CPU, and that changes to the assembler in general shouldn't impact
1722
+//     the CPU specific processing.
1723
+//
1724
+//     I'll let you be the judge as to how well this file meets that goal.
1725
+//
1726
+// Creator:    Dan Gisselquist, Ph.D.
1727
+//             Gisselquist Technology, LLC
1728
+//
1729
+////////////////////////////////////////////////////////////////////////////////
1730
+//
1731 209 dgisselq
+// Copyright (C) 2016-2018, Gisselquist Technology, LLC
1732 202 dgisselq
+//
1733
+// This program is free software (firmware): you can redistribute it and/or
1734
+// modify it under the terms of  the GNU General Public License as published
1735
+// by the Free Software Foundation, either version 3 of the License, or (at
1736
+// your option) any later version.
1737
+//
1738
+// This program is distributed in the hope that it will be useful, but WITHOUT
1739
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
1740
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
1741
+// for more details.
1742
+//
1743
+// You should have received a copy of the GNU General Public License along
1744
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
1745
+// target there if the PDF file isn't present.)  If not, see
1746
+// <http://www.gnu.org/licenses/> for a copy.
1747
+//
1748
+// License:    GPL, v3, as defined and found on www.gnu.org,
1749
+//             http://www.gnu.org/licenses/gpl.html
1750
+//
1751
+//
1752
+////////////////////////////////////////////////////////////////////////////////
1753
+#include "as.h"
1754
+
1755
+#include <stdlib.h>
1756
+#include <string.h>
1757
+#include <stdint.h>
1758
+#include <ctype.h>
1759
+
1760
+#include "frags.h"
1761
+#include "struc-symbol.h"
1762
+#include "symbols.h"
1763
+#include "config/tc-zip.h"
1764
+#include "elf/zip.h"
1765
+
1766
+// #define     ZIP_DEBUG
1767
+
1768
+const  char    comment_chars[] = ";#";
1769
+const  char    line_comment_chars[] = ";#";
1770
+// Characters which separate lines (newline need to be listed)
1771
+const  char    line_separator_chars[] = "";
1772
+
1773
+// Characters defining floating point numbers, such as 0f<floatingpt#>
1774
+const  char    FLT_CHARS[] = "fFrR";
1775
+
1776
+// Characters that may be used for an exponent in floating point numbers
1777
+const  char    EXP_CHARS[] = "eE";
1778
+
1779
+static int     cis_mergable = 0; // tc_check_label, tc_frob_label
1780
+
1781
+// zip_param_got is a flag that we'll set to know if we need to reference a
1782
+// global offset table.  Since nothing we've done has yet needed that table,
1783
+// we'll keep this undefined for now.
1784
+//
1785
+// static int  zip_param_got = 0;
1786
+static int     zip_param_cis = 1;
1787
+static int     zip_param_small = 0;
1788
+static int     zip_param_use_machine  = 1;
1789
+
1790
+typedef        struct  {
1791
+       int     m_known;
1792
+       int32_t m_value;
1793
+       symbolS *m_addsy, *m_subsy;
1794
+} MACHINEVALUE;
1795
+
1796
+typedef        struct  {
1797
+       MACHINEVALUE    r[ZIP_USER_REGS];
1798
+} MACHINEREGS;
1799
+
1800
+MACHINEREGS    zipm;
1801
+
1802
+static void zip_clear_machine(MACHINEREGS *pzipm);
1803
+
1804
+void   md_begin(void) {
1805
+       cis_mergable = FALSE;
1806
+       //
1807
+       record_alignment(text_section, 2);
1808
+       record_alignment(data_section, 2);
1809
+       //
1810
+       lex_type['['] = lex_type['A'];
1811
+       //
1812
+       zip_clear_machine(&zipm);
1813
+}
1814
+
1815
+void   md_end(void) { }
1816
+
1817
+void   zip_cons_align(int n) {
1818
+       int     lg;
1819
+       for(lg=0; ((1<<lg)<n)&&(lg<2); lg++)
1820
+               ;
1821
+       do_align(lg, NULL, 0, (1<<lg)-1);
1822
+}
1823
+
1824
+void   zip_flush_pending_output(void) {
1825
+       // If the Assembler is going to stuff things into our output stream,
1826
+       // then we need to make certain that any instructions that follow
1827
+       // dont try to merge with anything previous.  i.e., CIS = false.
1828
+       cis_mergable = FALSE;
1829
+}
1830
+
1831
+int    zip_address_bytes(void) { return 4; }
1832
+
1833
+const  pseudo_typeS    md_pseudo_table[] =
1834
+{
1835
+       { "word", cons, 4 },    // ZipCPU word size is 4, not 2
1836
+       { "long", cons, 8 },    // ZipCPU longs are 64-bits, not 32
1837
+       { "quad", cons,16 },    // ZipCPU QUAD-words are 128-bits, not 64
1838
+       { NULL, NULL, 0 }
1839
+};
1840
+
1841
+#define        ZIP_CC_SLEEP    0x010
1842
+#define        ZIP_CC_GIE      0x020
1843
+#define        ZIP_CC_STEP     0x040
1844
+
1845
+#define        SIM_OPCODE      0x77800000      // 0111.x111.1000. .... 0_111.x_111.10....
1846
+#define        NOOP_OPCODE     0x77c00000      // 0111.x111.1100. .... 0_111.x_111.11....
1847
+
1848
+typedef  struct {
1849
+       bfd_reloc_code_real_type        r_type;
1850
+       symbolS                         *r_sym;
1851
+       int                             r_pcrel;
1852
+       long                            r_fr_offset;
1853
+       fixS                            *r_fix;
1854
+       // Could also be char *name and bfd_reloc_code_real_type
1855
+} ZIPRELOC;
1856
+
1857
+// In case the instruction ...
1858
+#define        ZIP_MAX_NAUX    3 // Number of auxilliary instruction codes used
1859
+typedef        struct {
1860
+       int             i_naux;
1861
+       unsigned        i_code, // The actual machine language instruction
1862
+                       i_aux[ZIP_MAX_NAUX];
1863
+       ZIP_OPCODE      i_op;
1864
+       ZIP_CONDITION   i_cnd;
1865
+       ZIP_REG         i_areg; // = ZIP_RNONE for no register
1866
+       ZIP_REG         i_breg;
1867
+       int             i_imm;
1868
+       ZIPRELOC        *i_rp;
1869
+} ZIPIS;
1870
+
1871
+static ZIPIS *
1872
+zip_copy_insn(const ZIPIS *old) {
1873
+       ZIPIS *nw = (ZIPIS *)xmalloc(sizeof(ZIPIS));
1874
+
1875
+       memcpy((char *)nw, (char *)old, sizeof(ZIPIS));
1876
+
1877
+       return nw;
1878
+}
1879
+
1880 209 dgisselq
+static int     fits_within(int nbits, int value) {
1881
+       // -2 fits_within two bits
1882
+       // -1 fits_within two bits
1883
+       //  1 fits_within two bits
1884
+       //  2 does not
1885
+       //
1886
+       if (value > 0)
1887
+               return (value <   (1l<<(nbits-1))) ? 1:0;
1888
+       else
1889
+               return (value >= -(1l<<(nbits-1))) ? 1:0;
1890
+}
1891
+
1892 202 dgisselq
+static uint32_t
1893
+zip_brev(uint32_t v) {
1894
+       unsigned r=0, b;
1895
+
1896
+       for(b=0; b<32; b++, v>>=1)
1897
+               r = (r<<1)|(v&1);
1898
+
1899
+       return r;
1900
+}
1901
+
1902
+static const   int MACH_VUNKNOWN = 0, MACH_VKNOWN = 1, MACH_VUPPERKNOWN = 2,
1903
+                       MACH_VSYMKNOWN = 3;
1904
+
1905
+static void
1906
+zip_clear_machine(MACHINEREGS *pzipm) {
1907
+       int     i;
1908
+
1909
+#ifdef ZIP_DEBUG
1910
+       fprintf(stderr, "MACHINE, CLEAR\n");
1911
+#endif
1912
+       for(i=0; i<ZIP_USER_REGS; i++)
1913
+               pzipm->r[i].m_known = MACH_VUNKNOWN;
1914
+       for(i=0; i<ZIP_USER_REGS; i++)
1915
+               pzipm->r[i].m_addsy = NULL;
1916
+       for(i=0; i<ZIP_USER_REGS; i++)
1917
+               pzipm->r[i].m_subsy = NULL;
1918
+}
1919
+
1920
+static void
1921
+zip_advance_machine(MACHINEREGS *pzipm, ZIPIS *insn) {
1922
+       int             bval = insn->i_imm;
1923
+       int             bknown;
1924
+       MACHINEVALUE    *av, *bv;
1925
+
1926
+       if (!zip_param_use_machine) {
1927
+               // zip_clear_machine(pzipm);
1928
+               return;
1929
+       }
1930
+
1931
+       // The next three instructions don't change any machine values
1932
+       if((insn->i_op == ZIPO_SW)||(insn->i_op == ZIPO_SH)
1933
+               ||(insn->i_op==ZIPO_SB)
1934
+               ||(insn->i_op == ZIPO_CMP)||(insn->i_op == ZIPO_TST))
1935
+               return;
1936
+
1937
+       //
1938
+       // What remains to be done is to include symbols into the machine
1939
+       // state.  For now, we state that anything with a symbol becomes
1940
+       // unknown.
1941
+       //
1942
+       if ((insn->i_op == ZIPO_LJSR)||(insn->i_op == ZIPO_JSR)) {
1943
+               zip_clear_machine(pzipm);
1944
+               return;
1945
+       }
1946
+       if ((insn->i_rp)&&(insn->i_areg<ZIP_CC)) {
1947
+               bknown = MACH_VUNKNOWN;
1948
+               if((insn->i_op==ZIPO_LDI)&&(insn->i_cnd == ZIPC_ALWAYS)) {
1949
+                       pzipm->r[insn->i_areg].m_known = MACH_VSYMKNOWN;
1950
+                       pzipm->r[insn->i_areg].m_value = insn->i_imm;
1951
+                       pzipm->r[insn->i_areg].m_addsy = insn->i_rp->r_sym;
1952
+                       pzipm->r[insn->i_areg].m_subsy = NULL;
1953
+                       return;
1954
+               } else if ((insn->i_breg == ZIP_PC)&&(insn->i_op == ZIPO_MOV)
1955
+                               &&(insn->i_cnd == ZIPC_ALWAYS)) {
1956
+                       pzipm->r[insn->i_areg].m_known = MACH_VSYMKNOWN;
1957
+                       pzipm->r[insn->i_areg].m_value = insn->i_imm;
1958
+                       pzipm->r[insn->i_areg].m_addsy = insn->i_rp->r_sym;
1959
+                       pzipm->r[insn->i_areg].m_subsy = NULL;
1960
+                       return;
1961
+               }
1962 209 dgisselq
+       } else if (insn->i_rp)
1963 202 dgisselq
+               bknown = MACH_VUNKNOWN;
1964 209 dgisselq
+       else if (ZIP_RNONE == insn->i_breg)
1965 202 dgisselq
+               // B-Op is an immediate only
1966
+               bknown = MACH_VKNOWN;
1967
+       else if (insn->i_breg >= ZIP_CC)
1968
+               bknown = MACH_VUNKNOWN;
1969
+       else if (insn->i_imm == 0)
1970
+               bknown = (pzipm->r[insn->i_breg].m_known);
1971
+       else // If we have an immediate plus a value, can't know UPPER anymore
1972
+               bknown = (pzipm->r[insn->i_breg].m_known == MACH_VKNOWN)
1973
+                                       ? MACH_VKNOWN : MACH_VUNKNOWN;
1974
+
1975
+       if (insn->i_breg < ZIP_USER_REGS)
1976
+               bval += pzipm->r[insn->i_breg].m_value;
1977
+
1978
+       if (insn->i_areg >= ZIP_USER_REGS) {
1979
+#ifdef ZIP_DEBUG
1980
+               fprintf(stderr, "MACHINE, A-REG[%02x] out of bounds\n", insn->i_areg);
1981
+#endif
1982
+               return; // Nothing to do -- no change to machine
1983
+       } else if (insn->i_areg == ZIP_PC) {
1984
+#ifdef ZIP_DEBUG
1985
+               fprintf(stderr, "MACHINE, CLEAR ON JUMP\n");
1986
+#endif
1987
+               zip_clear_machine(pzipm);
1988
+               return;
1989
+       } else if ((insn->i_areg == ZIP_CC)&&(insn->i_op == ZIPO_AND)) {
1990
+#ifdef ZIP_DEBUG
1991
+               fprintf(stderr, "MACHINE, CLEAR ON ANDing to CC\n");
1992
+#endif
1993
+               zip_clear_machine(pzipm);
1994
+       } else if ((insn->i_areg == ZIP_CC)&&(
1995
+                       (insn->i_op == ZIPO_LDI)
1996
+                       ||(insn->i_op == ZIPO_LW)
1997
+                       ||(insn->i_op == ZIPO_CLR)
1998
+                       ||(insn->i_op == ZIPO_LDILO))) {
1999
+#ifdef ZIP_DEBUG
2000
+               fprintf(stderr, "MACHINE, CLEAR ON setting CC\n");
2001
+#endif
2002
+               zip_clear_machine(pzipm);
2003
+               return;
2004
+       } else if (insn->i_areg >= ZIP_CC) {
2005
+#ifdef ZIP_DEBUG
2006
+               fprintf(stderr, "MACHINE, Not tracking CC or PC changes\n");
2007
+#endif
2008
+               pzipm->r[insn->i_areg].m_known = MACH_VUNKNOWN;
2009
+               return;
2010
+       }
2011
+
2012
+       av = &pzipm->r[insn->i_areg];
2013
+       if (insn->i_breg < ZIP_CC)
2014
+               bv = &pzipm->r[insn->i_breg];
2015
+       else
2016
+               bv = NULL;
2017
+
2018
+       if (ZIPC_ALWAYS != insn->i_cnd) {
2019
+#ifdef ZIP_DEBUG
2020 209 dgisselq
+               fprintf(stderr, "\tMACHINE, CONDITIONAL operation\n");
2021 202 dgisselq
+#endif
2022
+               if ((ZIPO_LDILO == insn->i_op)
2023
+                               &&((av->m_known == MACH_VKNOWN)
2024 209 dgisselq
+                                       ||(av->m_known == MACH_VUPPERKNOWN))) {
2025 202 dgisselq
+                       av->m_known = MACH_VUPPERKNOWN;
2026 209 dgisselq
+               } else if ((ZIPO_LDI == insn->i_op)||(ZIPO_LDIn == insn->i_op)){
2027
+                       if (((av->m_known == MACH_VKNOWN)
2028
+                               ||(av->m_known == MACH_VUPPERKNOWN))
2029
+                           &&(((insn->i_imm ^ av->m_value)&& ~0x0ffff)==0)) {
2030
+                               av->m_known = MACH_VUPPERKNOWN;
2031
+                       } else
2032
+                               av->m_known = MACH_VUNKNOWN;
2033
+               } else {
2034 202 dgisselq
+                       av->m_known = MACH_VUNKNOWN;
2035 209 dgisselq
+}
2036 202 dgisselq
+       } switch(insn->i_op) {
2037
+               case    ZIPO_SUB:
2038
+                       av->m_known = (av->m_known==MACH_VKNOWN)
2039
+                                       ? MACH_VKNOWN:MACH_VUNKNOWN;
2040
+                       av->m_value -= bval;
2041
+                       if (bknown != MACH_VKNOWN)
2042
+                               av->m_known = MACH_VUNKNOWN;
2043
+                       break;
2044
+               case    ZIPO_AND:
2045
+                       av->m_value &= bval;
2046
+                       if ((bknown == MACH_VUPPERKNOWN)&&(bval == 0)) {
2047
+                               if (av->m_known == MACH_VKNOWN)
2048
+                                       av->m_known = MACH_VUPPERKNOWN;
2049
+                               else if (av->m_known != MACH_VUPPERKNOWN)
2050
+                                       av->m_known = MACH_VUNKNOWN;
2051
+                       } else if (bknown != MACH_VKNOWN)
2052
+                               av->m_known = MACH_VUNKNOWN;
2053
+                       break;
2054
+               case    ZIPO_ADD:
2055
+                       av->m_value += bval;
2056
+                       if (bknown != MACH_VKNOWN)
2057
+                               av->m_known = MACH_VUNKNOWN;
2058
+                       break;
2059
+               case    ZIPO_OR:
2060
+                       av->m_value |= bval;
2061
+                       if (bknown == MACH_VUPPERKNOWN) {
2062
+                               if (av->m_known == MACH_VKNOWN)
2063
+                                       av->m_known = MACH_VUPPERKNOWN;
2064
+                               else if (av->m_known != MACH_VUPPERKNOWN)
2065
+                                       av->m_known = MACH_VUNKNOWN;
2066
+                       } else if (bknown != MACH_VKNOWN)
2067
+                               av->m_known = MACH_VUNKNOWN;
2068
+                       break;
2069
+               case    ZIPO_XOR:
2070
+                       av->m_value ^= bval;
2071
+                       if (bknown == MACH_VUPPERKNOWN) {
2072
+                               if (av->m_known == MACH_VKNOWN)
2073
+                                       av->m_known = MACH_VUPPERKNOWN;
2074
+                               else if (av->m_known != MACH_VUPPERKNOWN)
2075
+                                       av->m_known = MACH_VUNKNOWN;
2076
+                       } else if (bknown != MACH_VKNOWN)
2077
+                               av->m_known = MACH_VUNKNOWN;
2078
+                       break;
2079
+               case    ZIPO_LDI: case ZIPO_LDIn:
2080
+                       // Although the h/w instruction has no conditions, our
2081
+                       // decoding may have conditions until we finish
2082
+                       // working out what the actual result is.  Hence, we
2083
+                       // need to be aware of any conditions from above.
2084
+#ifdef ZIP_DEBUG
2085
+                       fprintf(stderr, "MACHINE, LDI -> %02x\n", insn->i_areg);
2086
+#endif
2087
+                       av->m_value = bval;
2088
+                       if (insn->i_cnd != ZIPC_ALWAYS) {
2089
+                               // if ((bknown)&&(bvalue == insn->i_imm))
2090
+                                       // pzipm->r[insn->i_areg].m_known = MACH_VKNOWN;
2091
+                       } else {
2092
+                               av->m_known = MACH_VKNOWN;
2093
+                       } break;
2094
+               case    ZIPO_LDILO:
2095
+#ifdef ZIP_DEBUG
2096
+                       fprintf(stderr, "MACHINE, LDILO -> %02x\n", insn->i_areg);
2097
+#endif
2098
+                       av->m_value &= ~0x0ffff;
2099
+                       av->m_value |= bval &0x0ffff;
2100
+                       if ((av->m_known == MACH_VUPPERKNOWN)
2101
+                                       &&(bknown == MACH_VKNOWN)
2102
+                                       &&(ZIPC_ALWAYS == insn->i_cnd))
2103
+                               av->m_known = MACH_VKNOWN;
2104
+                       break;
2105
+               case    ZIPO_BREV:
2106
+                       av->m_value = zip_brev(bval);
2107
+                       if (ZIPC_ALWAYS == insn->i_cnd)
2108
+                               av->m_known = (bknown == MACH_VKNOWN)?MACH_VKNOWN:MACH_VUNKNOWN;
2109
+                       else if ((bknown == MACH_VKNOWN)
2110
+                               &&(  (av->m_known == MACH_VKNOWN)
2111
+                                  ||(av->m_known == MACH_VUPPERKNOWN))
2112
+                               &&((((zip_brev(bval)^av->m_value)&0x0ffff)==0)))
2113
+                               av->m_known = MACH_VUPPERKNOWN;
2114
+                       break;
2115
+               case    ZIPO_MOV:
2116
+#ifdef ZIP_DEBUG
2117
+                       fprintf(stderr, "MACHINE, MOV -> %02x\n", insn->i_areg);
2118
+#endif
2119
+                       av->m_value = bval;
2120
+                       if (ZIPC_ALWAYS == insn->i_cnd) {
2121
+                               av->m_known = bknown;
2122
+                               if (bknown == MACH_VSYMKNOWN) {
2123
+                                       if (!bv) { av->m_known = MACH_VUNKNOWN;}
2124
+                                       else {
2125
+                                       av->m_value = bv->m_value + insn->i_imm;
2126
+                                       av->m_addsy = bv->m_addsy;
2127
+                                       av->m_subsy = bv->m_subsy;
2128
+                                       }
2129
+                               }
2130
+                       } else if (
2131
+                               ((av->m_known == MACH_VKNOWN)
2132
+                                 ||(av->m_known == MACH_VUPPERKNOWN))
2133
+                               &&((bknown == MACH_VKNOWN)
2134
+                                 ||(bknown == MACH_VUPPERKNOWN))
2135
+                               &&(((bval^av->m_value)&0xffff0000)==0))
2136
+                               av->m_known = MACH_VUPPERKNOWN;
2137
+                       else
2138
+                               av->m_known = MACH_VUNKNOWN;
2139
+                       av->m_value = bval;
2140
+                       break;
2141
+               case    ZIPO_CLR:
2142
+                       if (insn->i_cnd == ZIPC_ALWAYS)
2143
+                               av->m_known = MACH_VKNOWN;
2144
+                       else if ((av->m_value & 0xffff0000)==0) {
2145
+                               if (((av->m_known == MACH_VKNOWN)
2146
+                                       ||(av->m_known == MACH_VUPPERKNOWN))
2147
+                                       &&(((av->m_value ^ bval)&0xffff0000)==0))
2148
+                                       av->m_known = MACH_VUPPERKNOWN;
2149
+                               else
2150
+                                       av->m_known = MACH_VUNKNOWN;
2151
+                       } av->m_value = 0;
2152
+                       break;
2153
+               // Store's don't change any regs
2154
+               case    ZIPO_SW: case ZIPO_SH: case ZIPO_SB:
2155
+               case    ZIPO_SIM: case ZIPO_NOOP:
2156
+               case    ZIPO_SDUMP: case ZIPO_NDUMP:
2157
+               case    ZIPO_BREAK: case ZIPO_LOCK:
2158
+               case    ZIPO_CMP:  case ZIPO_TST:
2159
+                       // These don't change any registers
2160
+                       break;
2161
+               // Result of loading a byte or halfword always clears the upper
2162
+               // half word
2163
+               case    ZIPO_LB: case   ZIPO_LH:
2164
+                       if (insn->i_cnd == ZIPC_ALWAYS) {
2165
+                               av->m_known = MACH_VUPPERKNOWN;
2166
+                               av->m_value = 0;
2167
+                       } else
2168
+                               av->m_known = MACH_VUNKNOWN;
2169
+                       break;
2170
+               case    ZIPO_LW:
2171
+               default:
2172
+#ifdef ZIP_DEBUG
2173
+                       fprintf(stderr, "MACHINE, DEFAULT, %02x -> unknown\n", insn->i_areg);
2174
+#endif
2175
+                       av->m_known = MACH_VUNKNOWN;
2176
+                       break;
2177
+       }
2178
+
2179
+       pzipm->r[ZIP_CC].m_known = MACH_VUNKNOWN;
2180
+       pzipm->r[ZIP_PC].m_known = MACH_VUNKNOWN;
2181
+}
2182
+
2183 209 dgisselq
+static int     zip_findnearreg_machine(MACHINEREGS *pzipm, unsigned  value) {
2184
+       int     bestrg = ZIP_RNONE, bestd, d;
2185
+       int     rg;
2186
+
2187
+       bestd = 0x7fffffff;
2188
+       bestrg= ZIP_RNONE;
2189
+
2190
+       for(rg=0; rg<ZIP_CC; rg++) {
2191
+               if (pzipm->r[rg].m_known == MACH_VUNKNOWN)
2192
+                       continue;
2193
+               if (pzipm->r[rg].m_known == MACH_VSYMKNOWN)
2194
+                       continue;
2195
+               if (pzipm->r[rg].m_known == MACH_VUPPERKNOWN)
2196
+                       continue;
2197
+               gas_assert(pzipm->r[rg].m_known == MACH_VKNOWN);
2198
+
2199
+               if (pzipm->r[rg].m_addsy)
2200
+                       continue;
2201
+               if (pzipm->r[rg].m_subsy)
2202
+                       continue;
2203
+
2204
+               d = abs(pzipm->r[rg].m_value - value);
2205
+               if (d < bestd) {
2206
+                       bestd = d;
2207
+                       bestrg = rg;
2208
+               }
2209
+       }
2210
+
2211
+       if (fits_within(18,bestd))
2212
+               return bestrg;
2213
+       return ZIP_RNONE;
2214
+}
2215
+
2216 202 dgisselq
+#ifdef ZIP_DEBUG
2217
+static void
2218
+zip_debug_machine(MACHINEREGS *pzipm) {
2219
+       int     i;
2220
+       for(i=0; i<ZIP_USER_REGS; i++) {
2221
+               if (pzipm->r[i].m_known == MACH_VKNOWN)
2222
+                       fprintf(stderr, "MACH-KNOW[Y][%2x] = %08x\n",
2223
+                               i, pzipm->r[i].m_value);
2224
+               else if (pzipm->r[i].m_known == MACH_VUPPERKNOWN)
2225
+                       fprintf(stderr, "MACH-KNOW[U][%2x] = %04x\n",
2226
+                               i, (pzipm->r[i].m_value>>16)&0x0ffff);
2227
+       }
2228
+}
2229
+#endif
2230
+
2231
+
2232
+/*
2233
+ * Option processing
2234
+ *
2235
+ * While not yet implemented, we do have a need for multiple options.  These
2236
+ * include:
2237
+ *
2238
+ *     (not yet supported)
2239
+ *     -got    Use a global offset table to place unknown jump locations into.
2240
+ *
2241
+ *     (not yet supported)
2242
+ *     -relax  Implement only relaxed instructions.  This implies that all
2243
+ *             branches fit within 18-bits of the current PC, or equivalently
2244
+ *             that all of the code fits within 1MB.
2245
+ *
2246
+ *     (not yet supported)
2247
+ *     -no-relax       Don't relax any instructions.  That means that all
2248
+ *             branches will be implemented as LOD (PC),PC ; .int #Address
2249
+ *             and all conditional branches as LOD 1(PC),PC; BRA 1; .int #addr.
2250
+ *             This also implies LDI's of unknown values will always be
2251
+ *             converted to LDILO/LDIHI pairs and never converted back to
2252
+ *             LDI's--even when the final value is known.
2253
+ *
2254
+ *     -cis    Attempt to compress instructions into the CIS instruction
2255
+ *             set.
2256
+ *
2257
+ *     (Something for stating the starting address of the routine in memory...)
2258
+ *
2259
+ *     Other (not yet supported) long options
2260
+ *
2261
+ *     -nopipe Attempts to use a lock instruction will result in an error.
2262
+ *     -nomul  Attempts to use multiply instructions will result in an error.
2263
+ *     -nodiv  Attempts to use divide instructions will result in an error.
2264
+ *     -nofpu  Attempts to use floating point unit insn will cause an error.
2265
+ *
2266
+ *
2267
+ */
2268
+#define        OPTION_CIS      (OPTION_MD_BASE+1)
2269
+#define        OPTION_NOCIS    (OPTION_MD_BASE+2)
2270
+#define        OPTION_ZIPM     (OPTION_MD_BASE+3)
2271
+#define        OPTION_NOZIPM   (OPTION_MD_BASE+4)
2272
+#define        OPTION_GOT      (OPTION_MD_BASE+5)
2273
+#define        OPTION_SMALL    (OPTION_MD_BASE+6)      // No LW(PC),PC insns
2274
+
2275
+const char     *md_shortopts = "";
2276
+struct option  md_longopts[] =
2277
+{
2278
+       { "cis",   no_argument, NULL, OPTION_CIS },
2279
+       { "nocis", no_argument, NULL, OPTION_NOCIS },
2280
+       { "zipm",   no_argument, NULL, OPTION_ZIPM },
2281
+       { "nozipm", no_argument, NULL, OPTION_NOZIPM },
2282
+       { "small",  no_argument, NULL, OPTION_SMALL },
2283
+       // { "got",  no_argument, NULL, OPTION_GOT },
2284
+       { NULL, no_argument, NULL, 0}
2285
+};
2286
+size_t md_longopts_size = sizeof(md_longopts);
2287
+
2288
+/* We have no target specific options yet, so these next two fucntions are
2289
+ * are empty.
2290
+ */
2291
+int
2292
+md_parse_option(int c, const char *arg ATTRIBUTE_UNUSED)
2293
+{
2294
+       // printf("Option %d, %s\n", c, (arg)?arg : "(Null)");
2295
+       if (c==0)
2296
+               return 1;
2297
+       switch(c) {
2298
+               case 0: return 1;
2299 209 dgisselq
+               case OPTION_CIS:    zip_param_cis = 1; return 1; break;
2300
+               case OPTION_NOCIS:  zip_param_cis = 0; return 1; break;
2301 202 dgisselq
+               case OPTION_ZIPM:   zip_param_use_machine = 1; return 1; break;
2302
+               case OPTION_NOZIPM: zip_param_use_machine = 0; return 1; break;
2303
+               // case OPTION_GOT : zip_param_got  = 1; return 1; break;
2304
+               default: break;
2305
+       }
2306
+       return 0; // We didn't handle this option
2307
+}
2308
+
2309
+void
2310
+md_show_usage(FILE *stream ATTRIBUTE_UNUSED)
2311
+{
2312
+       fprintf(stream, _("Zip CPU options:\n"));
2313
+       fprintf(stream, _("\n"
2314
+"-cis\t\tAttempt to compress instructions into two instructions per word.\n"));
2315
+       //fprintf(stream, _(
2316
+// "-got\t\tGenerate position independent code by referencing all symbols\n"
2317
+// "\t\tthrough a Global Offset Table.\n"));
2318
+}
2319
+
2320
+
2321
+symbolS *
2322
+md_undefined_symbol(char *name ATTRIBUTE_UNUSED)
2323
+{
2324
+//#warning "This is where other architectures check for any GOT references"
2325
+       return NULL;
2326
+}
2327
+
2328
+void
2329
+md_operand(expressionS *op ATTRIBUTE_UNUSED)
2330
+{
2331
+       /* Empty for now -- what is this for? */
2332
+}
2333
+
2334
+#ifdef ZIP_DEBUG
2335
+static void
2336
+zip_dump_sym(symbolS *sym)
2337
+{
2338
+       if (!sym) {
2339
+               fprintf(stderr, "SYM(NULL)");
2340
+       } else {
2341
+               fprintf(stderr, "Dumping symbol fields\n");
2342
+               fprintf(stderr, "SYM(%s) %s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s - 0x%08x\n",
2343
+                       S_GET_NAME(sym),
2344
+                       (S_IS_LOCAL(sym))?"Local ":"",
2345
+                       (S_IS_DEFINED(sym))?"Defined ":"",
2346
+                       (S_IS_EXTERNAL(sym))?"extern ":"",
2347
+                       (S_IS_FUNCTION(sym))?"(func) ":"",
2348
+                       (S_IS_WEAK(sym))?"Weak ":"",
2349
+                       (S_IS_WEAKREFD(sym))?"(Weak Ref-D) ":"",
2350
+                       (S_IS_WEAKREFR(sym))?"(Weak Refr) ":"",
2351
+                       (S_IS_DEBUG(sym))?"DEBUG ":"",
2352
+                       (S_IS_VOLATILE(sym))?"Volatile ":"",
2353
+                       (S_IS_FORWARD_REF(sym))?"Fwd Ref ":"",
2354
+                       (S_IS_COMMON(sym))?"Common ":"",
2355
+                       (S_GET_SEGMENT(sym)==absolute_section)?"AbsoluteS ":"",
2356
+                       (S_GET_SEGMENT(sym)==expr_section)?"ExpressionS ":"",
2357
+                       (S_GET_SEGMENT(sym)==reg_section)?"RegisterS ":"",
2358
+                       (S_GET_SEGMENT(sym)==undefined_section)?"UndefinedS ":"",
2359
+                       (symbol_resolved_p(sym))?"Resolved ":"",
2360
+                       (unsigned)S_GET_VALUE(sym));
2361
+       }
2362
+}
2363
+
2364
+static void
2365
+zip_dump_insn(ZIPIS *insn) {
2366
+       fprintf(stderr, "INSN:DUMP ");
2367
+       switch(insn->i_op) {
2368
+               case ZIPO_SUB:   fprintf(stderr, "%7s", "SUB"); break;
2369
+               case ZIPO_AND:   fprintf(stderr, "%7s", "AND"); break;
2370
+               case ZIPO_ADD:   fprintf(stderr, "%7s", "ADD"); break;
2371
+               case ZIPO_OR:    fprintf(stderr, "%7s", "OR"); break;
2372
+               case ZIPO_XOR:   fprintf(stderr, "%7s", "XOR"); break;
2373
+               case ZIPO_LSR:   fprintf(stderr, "%7s", "LSR"); break;
2374
+               case ZIPO_LSL:   fprintf(stderr, "%7s", "LSL"); break;
2375
+               case ZIPO_ASR:   fprintf(stderr, "%7s", "ASR"); break;
2376
+               case ZIPO_LDI:   fprintf(stderr, "%7s", "LDI"); break;
2377
+               case ZIPO_MPYUHI:fprintf(stderr, "%7s", "MPYUHI");break;
2378
+               case ZIPO_MPYSHI:fprintf(stderr, "%7s", "MPYSHI");break;
2379
+               case ZIPO_LDILO: fprintf(stderr, "%7s", "LDILO"); break;
2380
+               case ZIPO_BREV:  fprintf(stderr, "%7s", "BREV");  break;
2381
+               case ZIPO_MOV:   fprintf(stderr, "%7s", "MOV");   break;
2382
+               case ZIPO_CMP:   fprintf(stderr, "%7s", "CMP");   break;
2383
+               case ZIPO_TST:   fprintf(stderr, "%7s", "TST");   break;
2384
+               case ZIPO_LW:    fprintf(stderr, "%7s", "LW");    break;
2385
+               case ZIPO_SW:    fprintf(stderr, "%7s", "SW");    break;
2386
+               case ZIPO_LH:    fprintf(stderr, "%7s", "LH");    break;
2387
+               case ZIPO_SH:    fprintf(stderr, "%7s", "SH");    break;
2388
+               case ZIPO_LB:    fprintf(stderr, "%7s", "LB");    break;
2389
+               case ZIPO_SB:    fprintf(stderr, "%7s", "SB");    break;
2390
+               case ZIPO_DIVU:  fprintf(stderr, "%7s", "DIVU");  break;
2391
+               case ZIPO_DIVS:  fprintf(stderr, "%7s", "DIVS");  break;
2392
+               case ZIPO_FPADD: fprintf(stderr, "%7s", "FPADD"); break;
2393
+               case ZIPO_FPSUB: fprintf(stderr, "%7s", "FPSUB"); break;
2394
+               //
2395
+               case ZIPO_NOOP:  fprintf(stderr, "%7s", "NOOP");  break;
2396
+               case ZIPO_BREAK: fprintf(stderr, "%7s", "BREAK"); break;
2397
+               case ZIPO_LOCK:  fprintf(stderr, "%7s", "LOCK");  break;
2398
+               case ZIPO_TRAP:  fprintf(stderr, "%7s", "TRAP");  break;
2399
+               case ZIPO_CLR:   fprintf(stderr, "%7s", "CLR");   break;
2400
+               case ZIPO_HALT:  fprintf(stderr, "%7s", "HALT");  break;
2401
+               case ZIPO_WAIT:  fprintf(stderr, "%7s", "WAIT");  break;
2402
+               case ZIPO_STEP:  fprintf(stderr, "%7s", "STEP");  break;
2403
+               case ZIPO_RTU:   fprintf(stderr, "%7s", "RTU");   break;
2404
+               case ZIPO_BRA:   fprintf(stderr, "%7s", "BRA");   break;
2405
+               case ZIPO_BUSY:  fprintf(stderr, "%7s", "BUSY");  break;
2406
+               case ZIPO_JMP:   fprintf(stderr, "%7s", "JMP");   break;
2407
+               case ZIPO_NOT:   fprintf(stderr, "%7s", "NOT");   break;
2408
+               case ZIPO_NEG:   fprintf(stderr, "%7s", "NEG");   break;
2409
+               //
2410
+               case ZIPO_SIM:   fprintf(stderr, "%7s", "SIM");   break;
2411
+               case ZIPO_SDUMP: fprintf(stderr, "%7s", "SDUMP"); break;
2412
+               case ZIPO_SEXIT: fprintf(stderr, "%7s", "SEXIT"); break;
2413
+               case ZIPO_SOUT:  fprintf(stderr, "%7s", "SOUT");  break;
2414
+               case ZIPO_NDUMP: fprintf(stderr, "%7s", "NDUMP"); break;
2415
+               case ZIPO_NEXIT: fprintf(stderr, "%7s", "NEXIT"); break;
2416 209 dgisselq
+               case ZIPO_NOUT:  fprintf(stderr, "%7s", "NOUT");  break;
2417 202 dgisselq
+               //
2418
+               case ZIPO_LJMP: fprintf(stderr, "%7s", "LJMP"); break;
2419
+               case ZIPO_LJSR: fprintf(stderr, "%7s", "LJSR");   break;
2420
+               //
2421
+               case ZIPO_SEXTH:fprintf(stderr, "%7s", "SEXTH");   break;
2422
+               case ZIPO_SEXTB:fprintf(stderr, "%7s", "SEXTB");   break;
2423
+               default:
2424
+                       fprintf(stderr, "%d", insn->i_op); break;
2425
+       }
2426
+       switch(insn->i_cnd) {
2427
+               case ZIPC_Z: fprintf(stderr, "%-3s", ".Z"); break;
2428
+               case ZIPC_LT: fprintf(stderr, "%-3s", ".LT"); break;
2429
+               case ZIPC_C: fprintf(stderr, "%-3s", ".C"); break;
2430
+               case ZIPC_V: fprintf(stderr, "%-3s", ".V"); break;
2431
+               case ZIPC_NZ: fprintf(stderr, "%-3s", ".NE"); break;
2432
+               case ZIPC_GE: fprintf(stderr, "%-3s", ".GE"); break;
2433
+               case ZIPC_NC: fprintf(stderr, "%-3s", ".NC"); break;
2434
+               case ZIPC_ALWAYS:
2435
+               default:
2436
+                       break;
2437
+       } fprintf(stderr, " %d", (int)insn->i_cnd);
2438
+
2439
+       fprintf(stderr, "\n\tAREG = %d\n\tB = ", insn->i_areg);
2440
+       if (insn->i_rp) {
2441
+               if (insn->i_imm != 0)
2442
+                       fprintf(stderr, "$%d + ", insn->i_imm);
2443
+               fprintf(stderr, "%s ", (insn->i_rp->r_sym) ?
2444
+                       S_GET_NAME(insn->i_rp->r_sym) : "(null)");
2445
+       } else
2446
+               fprintf(stderr, "%d[%08x] (no sym)", insn->i_imm, insn->i_imm);
2447
+       if (insn->i_breg != ZIP_RNONE)
2448
+               fprintf(stderr, "+ R%d", insn->i_breg);
2449
+       fprintf(stderr, "\n");
2450
+       if (insn->i_rp)
2451
+               fprintf(stderr, "\t@%ld (offset w/in instruction frag)\n", insn->i_rp->r_fr_offset);
2452
+       fprintf(stderr, "\tINSN:CODE %08x", insn->i_code);
2453
+       {
2454
+               int     i;
2455
+               for(i=0; (i<insn->i_naux)&&(i<ZIP_MAX_NAUX); i++)
2456
+                       fprintf(stderr, ":%08x", insn->i_aux[i]);
2457
+       }
2458
+       fprintf(stderr, "\n\tDUMPED\n");
2459
+}
2460
+#endif
2461
+
2462
+static ZIP_CONDITION
2463
+zip_negate_condition(ZIP_CONDITION c) {
2464
+       switch(c) {
2465
+               case ZIPC_Z:    return ZIPC_NZ; break;
2466
+               case ZIPC_LT:   return ZIPC_GE; break;
2467
+               case ZIPC_C:    return ZIPC_NC; break;
2468
+               case ZIPC_NZ:   return ZIPC_Z; break;
2469
+               case ZIPC_GE:   return ZIPC_LT; break;
2470
+               case ZIPC_NC:   return ZIPC_C; break;
2471
+               case ZIPC_ALWAYS:       return ZIPC_ALWAYS; break;
2472
+               default:
2473
+                       break;
2474
+       } gas_assert((0)&&("Cannot negate condition\n"));
2475
+       return ZIPC_ALWAYS;
2476
+}
2477
+
2478
+static const char *zip_skip_white_spaces(const char *str) {
2479
+       if (!str)
2480
+               return NULL;
2481
+       while((*str)&&(isspace(*str)))
2482
+               str++;
2483
+       return str;
2484
+}
2485
+
2486
+static const char *
2487
+zip_parse_condition(const char *str, ZIP_CONDITION *condn) {
2488
+       if ((strcasecmp(str, "Z")==0)
2489
+                       ||(strcasecmp(str, "EQ")==0)) {
2490
+               *condn = ZIPC_Z;
2491
+       } else if ((strcasecmp(str, "LT")==0)
2492
+                       ||(strcasecmp(str, "N")==0)) {
2493
+               *condn = ZIPC_LT;
2494
+       } else if ((strcasecmp(str, "C")==0)
2495
+                       ||(strcasecmp(str, "LTU")==0)) {
2496
+               *condn = ZIPC_C;
2497
+       } else if (strcasecmp(str, "V")==0) {
2498
+               *condn = ZIPC_V;
2499
+       } else if((strcasecmp(str, "NZ")==0)
2500
+                       ||(strcasecmp(str, "NE")==0)) {
2501
+               *condn = ZIPC_NZ;
2502
+       } else if ((strcasecmp(str, "GE")==0)
2503
+                       ||(strcasecmp(str, "GTE")==0)) {
2504
+               *condn = ZIPC_GE;
2505
+       } else if ((strcasecmp(str, "NC")==0)
2506
+                       ||(strcasecmp(str, "GEU")==0)) {
2507
+               *condn = ZIPC_NC;
2508
+       } else {
2509
+               return "Unrecognized condition";
2510
+       }
2511
+
2512
+       return NULL;
2513
+}
2514
+
2515
+static const char *zip_parse_reg(const char *str, ZIP_REG *regid) {
2516
+       const char *ustr = str;
2517
+       int     userreg = 0;
2518
+
2519 206 dgisselq
+       if ((!str)||(str[0]=='\0'))
2520
+               return "No register given";
2521 202 dgisselq
+       ustr = zip_skip_white_spaces(str);
2522
+
2523
+       if (toupper(ustr[0]) == 'U') {
2524
+               ustr = str+1;
2525
+               userreg = 0x10;
2526
+       } else if ((toupper(ustr[0]) == 'S')&&(strcasecmp(ustr, "SP")!=0)) {
2527
+               ustr = str+1;
2528
+       }
2529
+
2530
+       /*
2531
+       if (strcasecmp(ustr, "GBL")==0) {
2532
+               *regid = userreg + 11;
2533
+               ustr += 3;
2534
+       } else
2535
+       */
2536
+       if (strcasecmp(ustr, "LR")==0) {
2537
+               *regid = userreg + 0;
2538
+               ustr += 2;
2539
+       } else if (strcasecmp(ustr, "FP")==0) {
2540
+               *regid = userreg + 12;
2541
+               ustr += 2;
2542
+       } else if (strcasecmp(ustr, "SP")==0) {
2543
+               *regid = userreg + 13;
2544
+               ustr += 2;
2545
+       } else if (strcasecmp(ustr, "CC")==0) {
2546
+               *regid = userreg + 14;
2547
+               ustr += 2;
2548
+       } else if (strcasecmp(ustr, "PC")==0) {
2549
+               *regid = userreg + 15;
2550
+               ustr += 2;
2551
+       } else if (('r' == tolower(ustr[0]))
2552
+                       &&(isdigit(ustr[1]))
2553
+                       &&((!isdigit(ustr[2]))
2554
+                               ||(!isdigit(ustr[3])))) {
2555
+               *regid = atoi(ustr+1);
2556
+               if ((*regid > 15)||(*regid < 0))
2557
+                       return "Register does not exist";
2558
+               *regid += userreg;
2559
+
2560
+               if (!isdigit(ustr[2]))
2561
+                       ustr+=2;
2562
+               else
2563
+                       ustr+=3;
2564
+       } else {
2565
+               *regid = ZIP_RNONE;
2566
+               return "Unknown register";
2567
+       }
2568
+
2569
+       // Registers names are terminated by something other than letters
2570
+       // and numbers.  Things like ')', ',', or '\0' should terminate a
2571
+       // register.  Here, we only double check that the register is not
2572
+       // terminated by another letter or a number.
2573
+       if ((*ustr)&&((isalpha(*ustr))||(isdigit(*ustr))))
2574
+               return "Unrecognized register";
2575
+
2576
+       return NULL;
2577
+}
2578
+
2579
+// Parse a 'B' operand
2580
+static const char *
2581
+zip_parse_bop(const char *bop, ZIPIS *insn) {
2582
+       // There are a couple forms for what we can expect in a B operand:
2583
+       //      The first three require no relocations ...
2584
+       //              1. A simple number
2585
+       //              2. Number + Register
2586
+       //              3. Number(Register)
2587
+       //              4. Register by itself
2588
+       //              Good form is to replace this number with the possibility
2589
+       //              of a constant expression ...  The number may be any of
2590
+       //              [+-](0[xX][0-9a-fA-F]+|(0[0-7]+)|(0-9)+)
2591
+       //      The next four may require a relocation
2592
+       //              4. Label + Register
2593
+       //              5. Label(Register)
2594
+       //              6. Label (Register is implied: PC, if moving or jumping
2595
+       //                      to the PC, or GBL if loading a value or if
2596
+       //                      the offset ends up being unknown)
2597
+       //              Good form allows an expression instead of a label,
2598
+       //              that can be evaluated at ... sometime.
2599
+       //              7. Number(Label)
2600
+       //
2601
+       // We will support:
2602
+       //      (Number|Label)?( "("Register")" | "+"Register )
2603
+       //
2604
+       char    lbl[512], *lblp = lbl;
2605
+       const char      *ptr;
2606
+       insn->i_imm = 0;
2607
+       *lblp = '\0';
2608
+
2609
+       if (strlen(bop)>sizeof(lbl)-1)
2610
+               as_fatal( _("Label length too long"));
2611
+       // printf("RAW-OP-B: %s %s\n", bop, (insn->i_rp)?"(i_rp != NULL)":"");
2612
+
2613
+       // Do we start with a number?
2614
+       {
2615
+               int     sgn = 0;
2616
+
2617
+               ptr = zip_skip_white_spaces(bop);
2618
+               if ('$' == *ptr)
2619
+                       ptr = zip_skip_white_spaces(ptr+1);
2620
+
2621
+               if ('+' == *ptr)
2622
+                       ptr++;
2623
+               else if ('-' == *ptr) {
2624
+                       sgn = 1;
2625
+                       ptr++;
2626
+               }
2627
+
2628
+               if ('$' == *ptr)
2629
+                       ptr = zip_skip_white_spaces(ptr+1);
2630
+               ptr = zip_skip_white_spaces(ptr);
2631
+               if ('$' == *ptr)
2632
+                       ptr = zip_skip_white_spaces(ptr+1);
2633
+
2634
+               if ((*ptr)&&(isdigit(*ptr))) {
2635
+                       char *end = (char *)ptr;
2636
+                       unsigned long v = strtoul(ptr, &end, 0);
2637
+                       // We start with a number
2638
+                       if (sgn)
2639
+                               insn->i_imm = (int)(-v);
2640
+                       else
2641
+                               insn->i_imm = (int)(v);
2642
+                       ptr = (const char *)end;
2643
+
2644
+                       // Permit a string of Num [[+-] Num]*
2645
+                       // This is necessary for the DI instructions within the
2646
+                       // compiler.
2647
+                       while( ((*ptr == '+')||(*ptr == '-'))
2648
+                               &&(isdigit(ptr[1])) ) {
2649
+                               sgn = (*ptr == '-');
2650
+                               v = strtoul(&ptr[1], &end, 0);
2651
+                               if (sgn) v = -v;
2652
+                               insn->i_imm += (int)v;
2653
+                               ptr = (const char *)end;
2654
+                       }
2655
+               } else if ((*ptr)&&(
2656
+                               (isalpha(*ptr))
2657
+                               ||('*'==*ptr)
2658
+                               ||('.'==*ptr)
2659
+                               ||('_'==*ptr))) {
2660
+                       // We start with an identifier
2661
+                       // printf("OP-B ( \'%s\' ) starts with an identifier (%c)\n",
2662
+                               // bop, *ptr);
2663
+
2664
+                       // Skip any compiler inserted prefix (if present)
2665
+                       if ('*' == *ptr)
2666
+                               ptr++;
2667
+                       while((*ptr)&&(
2668
+                                       (isalpha(*ptr))
2669
+                                       ||(isdigit(*ptr))
2670
+                                       ||('_' == *ptr)
2671
+                                       ||('$' == *ptr)
2672
+                                       ||('.' == *ptr)))
2673
+                               *lblp++ = *ptr++;
2674
+                       *lblp = '\0';
2675
+                       // printf("LBL was %s\n", lbl);
2676
+
2677
+                       // This could still be a register ... can't tell yet
2678
+                       if (sgn)
2679
+                               return "ERR: Not expecting a signed label!";
2680
+
2681
+                       ptr = zip_skip_white_spaces(ptr);
2682
+               }
2683
+       }
2684
+
2685
+       ptr = zip_skip_white_spaces(ptr);
2686
+
2687
+       const   char *err = NULL;
2688
+
2689
+       if ((*ptr == '+')&&(ptr[1] == '('))
2690
+               ptr++;
2691
+       if ((*ptr)&&(*ptr == '(')) {
2692
+               // Form #3: Number(register)
2693
+               char *end = strchr(ptr+1, ')');
2694
+               if (NULL == end)
2695
+                       return "Un-matched \'(\', cannot find \')\'";
2696
+               *end = '\0';
2697
+               // printf("Looking for a register in %s\n", ptr+1);
2698
+               err = zip_parse_reg(ptr+1, &insn->i_breg);
2699
+               if (err) {
2700
+                       // Must've been a symbol
2701
+                       if (lbl[0] != '\0') // Already have a symbol in this
2702
+                               return err;     // expression!
2703
+                       ptr++;
2704
+                       while((*ptr)&&(
2705
+                                       (isalpha(*ptr))
2706
+                                       ||(isdigit(*ptr))
2707
+                                       ||('_' == *ptr)
2708
+                                       ||('$' == *ptr)
2709
+                                       ||('.' == *ptr)))
2710
+                               *lblp++ = *ptr++;
2711
+                       *lblp = '\0';
2712
+                       insn->i_breg = ZIP_RNONE;
2713
+                       ptr = zip_skip_white_spaces(ptr);
2714
+                       if (*ptr != '\0')
2715
+                               return "ERR: Expression within parenthesis not supported";
2716
+                       err = NULL;
2717
+               }
2718
+               // printf("Found a register, %s -> %d\n", ptr+1, insn->i_breg);
2719
+       } else if ((*ptr)&&((*ptr == '+')||(*ptr == '-'))) {
2720
+               if ((*lbl)&&(zip_parse_reg(lbl, &insn->i_breg) == NULL)) {
2721
+                       // Register+Number
2722
+                       // Skip to the end to process what follows
2723
+                       *lbl = '\0'; // Label wasn't a symbol, so let's clear it
2724
+               } else {
2725
+                       // Number/label+Register
2726
+                       while((('+' == *ptr)||('-' == *ptr))
2727
+                                       &&(ptr[1])
2728
+                                       &&((isdigit(ptr[1]))
2729
+                                       ||((ptr[0] == '+')
2730
+                                               &&(ptr[1] == '-')
2731
+                                               &&(ptr[2])
2732
+                                               &&(isdigit(ptr[2]))))) {
2733
+                               char *end;
2734
+
2735
+                               if ((*ptr == '+')&&(isdigit(ptr[1])))
2736
+                                       insn->i_imm += strtoul(ptr, &end, 0);
2737
+                               else if ((*ptr == '+')&&(ptr[1] == '-')
2738
+                                               &&(isdigit(ptr[2])))
2739
+                                       insn->i_imm -= strtoul(ptr+2, &end, 0);
2740
+                               else if ((*ptr == '-')&&(isdigit(ptr[1])))
2741
+                                       insn->i_imm -= strtoul(ptr+1, &end, 0);
2742
+                               else {
2743
+                                       fprintf(stderr, "GAS: Cannot comprehend %s\n", ptr);
2744
+                                       gas_assert((0)&&("Should never get here"));
2745
+                               }
2746
+                               ptr = (const char *)end;
2747
+                       }
2748
+                       if (('+' == *ptr)&&((err = zip_parse_reg(ptr+1, &insn->i_breg))==NULL)) {
2749
+                               // Let's skip to the end of the register
2750
+                               ptr++;
2751
+                               while(isalpha(*ptr))
2752
+                                       ptr++;
2753
+                               while(isdigit(*ptr))
2754
+                                       ptr++;
2755
+                       } else if (('(' == *ptr)&&((err = zip_parse_reg(ptr+1, &insn->i_breg))==NULL)) {
2756
+                               ptr++;
2757
+                               while((*ptr)&&(')' != *ptr))
2758
+                                       ptr++;
2759
+                               ptr++;
2760
+                       } else {
2761
+                               // OOps!! Must've been a label + number
2762
+                               err = NULL;
2763
+                       }
2764
+               }
2765
+       } else if ((*lbl)&&(NULL == zip_parse_reg(lbl, &insn->i_breg))) {
2766
+               // Form: Register (only)
2767
+               insn->i_imm = 0;
2768
+               // printf("OP-B ( \'%s\' ) Had a register, %s -> %d\n", bop,
2769
+                       // lbl, insn->i_breg);
2770
+               *lbl = '\0';
2771
+       } else if (*lbl) {
2772
+               // Form: Label or Number (only)
2773
+               insn->i_breg = ZIP_RNONE;
2774
+       }
2775
+
2776
+       // Look for a +number at the end
2777
+       if ((*ptr)&&((*ptr == '+')||(*ptr == '-'))) {
2778
+               // printf("Looking at a plus: %s\n", ptr);
2779
+               int     sgn = (*ptr == '-')?1:0;
2780
+
2781
+               if (sgn) {
2782
+                       // printf("... I meant a minus\n");
2783
+                       ptr++;
2784
+               }
2785
+
2786
+               ptr = zip_skip_white_spaces(ptr);
2787
+               if ('$' == *ptr)
2788
+                       ptr = zip_skip_white_spaces(ptr+1);
2789
+
2790
+               if ('+' == *ptr)
2791
+                       ptr++;
2792
+               if ('-' == *ptr) {
2793
+                       sgn = !sgn;
2794
+                       ptr++;
2795
+               }
2796
+
2797
+               ptr = zip_skip_white_spaces(ptr);
2798
+               if ('$' == *ptr)
2799
+                       ptr = zip_skip_white_spaces(ptr+1);
2800
+               if ('-' == *ptr) {
2801
+                       sgn = !sgn;
2802
+                       ptr++;
2803
+               }
2804
+
2805
+               if ((*ptr)&&(isdigit(*ptr))) {
2806
+                       char *end = (char *)ptr;
2807
+
2808
+                       // printf("Parsing #: %s\n", ptr);
2809
+                       // While the following might make the most sense,
2810
+                       //    if (sgn) *--ptr = '-';
2811
+                       // the string is read-only, so we can't change it.
2812
+                       // Instead we do ...
2813
+                       unsigned long v = (sgn)?
2814
+                               -strtoul(ptr, &end, 0) : strtoul(ptr, &end, 0);
2815
+                       insn->i_imm += v;
2816
+                       ptr = (const char *)end;
2817
+               }
2818
+       }
2819
+
2820
+       if (*lbl) {
2821
+               // printf("i_rp = %s\n", (insn->i_rp)?"(Null)":"not NULL");
2822
+               symbolS *sym = symbol_find_or_make(lbl);
2823
+               sym->sy_flags.sy_used = TRUE;
2824
+               // segT seg = S_GET_SEGMENT(sym);
2825
+#ifdef ZIP_DEBUG
2826
+               zip_dump_sym(sym);
2827
+#endif
2828
+               if (insn->i_breg == ZIP_PC) {
2829
+                       // New pc-relative relocation,
2830
+                       // ???
2831
+                       // symbolP = symbol_create(FAKE_LABEL_NAME,
2832
+                               // absolute_section, 0 &zero_address_frag);
2833
+                       // symbol_set_value_expression(symbolP, expressionP);
2834
+                       // resolve_symbol_value(symbolP);
2835
+                       insn->i_rp =(ZIPRELOC *)xmalloc(sizeof(ZIPRELOC));
2836
+                       insn->i_rp->r_sym = sym;
2837
+                       insn->i_rp->r_pcrel = TRUE;
2838
+                       insn->i_rp->r_fr_offset = 0;
2839
+                       insn->i_rp->r_fix = NULL;
2840
+                       insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_PCREL;
2841
+                       // symbol_make(name??)
2842
+                       // symbol_find_or_make(name)
2843
+                       // symbol_relc_make_sym
2844
+                       // symbol_relc_make_value
2845
+                       // symbol_find(name)
2846
+                       // symbol_find_noref(name, noref)
2847
+                       // symbol_find_exact(name)
2848
+                       // symbol_find_exact_noref(name, noref)
2849
+                       // symbol_find_or_make(name)
2850
+                       // symbol_make(name)
2851
+                       // symbol_new(name, seg, value, frag)
2852
+                       //      preferred call over symbol create
2853
+                       //      calls symbol_create internal
2854
+                       // symbol_create(name, segment, value, frag)
2855
+                       //
2856
+                       // local_symbol_make(name, section, value, frag)
2857
+                       // symbol_clone(sym, int)
2858
+                       // symbol_temp_new(seg, value, frag)
2859
+                       // symbol_temp_new_now(void)
2860
+                       // symbol_temp_make(void)
2861
+                       // colon(void)
2862
+                       //      Called when symbol: starts a line
2863
+                       //      Calls symbol_new(name, now_seg, frag_now_fix(),
2864
+                       //              frag_now);
2865
+                       //              symbol_table_insert(symbolP)
2866
+                       //
2867
+                       // expr_build_dot returns a symbol pointing to the
2868
+                       //      current location ...
2869
+                       //
2870
+                       // Useful:
2871
+                       //      frag_now is current frag
2872
+                       //      S_SET_VALUE(symbolP, frag_now_fix()) ???
2873
+                       //      now_seg must be the current segment
2874
+                       //      S_SET_SETGMENT(symbolP, now_seg);
2875
+               /*
2876
+               } else if((zip_param_got)&&(insn->i_breg == ZIP_GBL)) {
2877
+                       // New GOT-relative relocation
2878
+                       insn->i_rp =(ZIPRELOC *)xmalloc(sizeof(ZIPRELOC));
2879
+                       insn->i_rp->r_sym = sym;
2880
+                       insn->i_rp->r_pcrel = FALSE;
2881
+                       insn->i_rp->r_fr_offset = 0;
2882
+                       insn->i_rp->r_fix = NULL;
2883
+               */
2884
+               } else {
2885
+                       insn->i_rp =(ZIPRELOC *)xmalloc(sizeof(ZIPRELOC));
2886
+                       insn->i_rp->r_sym = sym;
2887
+                       insn->i_rp->r_pcrel = FALSE;
2888
+                       insn->i_rp->r_fr_offset = 0;
2889
+                       insn->i_rp->r_fix = NULL;
2890
+                       if (insn->i_breg != ZIP_RNONE)
2891
+                               insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_OFFSET;
2892
+                       else
2893
+                               insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_IMM;
2894
+               }
2895
+       }
2896
+
2897
+       return  err;
2898
+}
2899
+
2900
+static const char *zip_parse(const char *line, ZIPIS *insn) {
2901
+       const char      *err = NULL, *opstr = NULL;
2902
+       char    *alt;
2903
+       int     i;
2904
+       char *cndp = NULL;
2905
+       // Two (possible) tokens left:
2906
+       //      the left of the comma, and the right of the comma
2907
+       const char      *left, *right, *eol;
2908
+       typedef enum    {
2909
+               TWO_OP,         // Standard for most instructions
2910
+               IMM_OP,         // Immediate operand only
2911
+               BACKWARDS_TWO,  // Only used by STO REG,Off(REG)
2912
+               NO_OP,          // Used by NOOP, BUSY, HALT, RTU, LOCK, etc
2913
+               ONE_OR_TWO_OP,  // Only used by TST
2914
+               MAYBE_ONE_IMM,  // Only used by BREAK, NOOP, SIM
2915
+               MAYBE_ONE_REG,  // Only used by SDUMP, NDUMP
2916
+               MAYBE_ONE_IMM_OR_REG,   // Only used by SEXIT, NEXIT, SOUT, NOUT
2917
+               MAYBE_OPB,      // Only used by TRAP
2918
+               ONE_REGISTER,   // Only used by CLR, CLRF, and NOT
2919
+               OP_ADDRESS,     // Only used by BRA, BRA.C, and LINK
2920
+               OP_B,           // Only used by JMP
2921
+               TWO_REGISTER,   // Only used by FP instructions
2922
+               ILLEGAL_FORM    // Never used, for debugging only
2923
+       } FORMTYPE;
2924
+
2925
+       FORMTYPE        insn_form = ILLEGAL_FORM; // Make sure we set this
2926
+
2927
+
2928
+
2929
+#ifdef ZIP_DEBUG
2930 209 dgisselq
+       fprintf(stderr, "\n**** Parsing %s\n", line);
2931 202 dgisselq
+#endif
2932
+
2933
+       insn->i_naux = 0;
2934
+       insn->i_op   = ZIPO_NOOP;
2935
+       insn->i_cnd  = ZIPC_ALWAYS;
2936
+       insn->i_areg = ZIP_RNONE;
2937
+       insn->i_breg = ZIP_RNONE;
2938
+       insn->i_imm  = 0;
2939
+       insn->i_rp   = NULL;
2940
+       insn->i_code = NOOP_OPCODE;
2941
+       for(i=0; i<ZIP_MAX_NAUX; i++)
2942
+               insn->i_aux[i]  = NOOP_OPCODE;
2943
+
2944
+       // The opcode is given between whitespace and a period, or whitespace
2945
+       // and whitespace
2946
+       alt = strdup(zip_skip_white_spaces(line));
2947
+       if ((*alt)=='[') {
2948
+               // Instruction starts with condition codes-- a feature we
2949
+               // needed to add in order to support GCC conditional execution
2950
+               // macro
2951
+               cndp = strtok(alt,"] \t")+1;
2952
+               if (!cndp)
2953
+                       return "Mismatched parenthesis--an attempt at a condition?";
2954
+               if (strlen(cndp) > 3)
2955
+                       return "Invalid condition (too long)";
2956
+
2957
+               opstr = strtok(NULL, " \t");
2958
+               if (!opstr)
2959
+                       return "Condition not followed by valid opcode";
2960
+       } else {
2961
+               opstr = strtok(alt, " \t"); // Get our opcode
2962
+               if (!opstr) {
2963
+                       free(alt);
2964
+                       return "Invalid Instruction";
2965
+               }
2966
+       }
2967
+       // See if our token contains a '.' within it
2968
+       //      GCC allows conditions beginning a line, as in ...
2969
+       //              (CND)   Opcode  B,A
2970
+       //      such a condition, if present, was detected above.
2971
+       //
2972
+       //      If not, we now look for a condition written in our original
2973
+       //      format of ...
2974
+       //              Opcode.CND B,A
2975
+       //      and we look for it here.
2976
+       //
2977
+       if (!cndp) {
2978
+               cndp = strchr(opstr, '.');
2979
+               // If we found such a condition, we need to fix the opstr
2980
+               // so that it no longer includes the condition.  Hence, let's
2981
+               // place a NULL within the alt string and push our condition
2982
+               // forward to the first non '.' value.
2983
+               if (cndp)
2984
+                       *cndp++ = '\0';
2985
+       }
2986
+       if (strcasecmp(opstr, "SUB")==0) {
2987
+               insn->i_op = ZIPO_SUB;
2988
+               insn_form = TWO_OP;
2989
+       } else if (strcasecmp(opstr, "AND")==0) {
2990
+               insn->i_op = ZIPO_AND;
2991
+               insn_form = TWO_OP;
2992
+       } else if (strcasecmp(opstr, "ADD")==0) {
2993
+               insn->i_op = ZIPO_ADD;
2994
+               insn_form = TWO_OP;
2995
+       } else if (strcasecmp(opstr, "OR")==0) {
2996
+               insn->i_op = ZIPO_OR;
2997
+               insn_form = TWO_OP;
2998
+       } else if (strcasecmp(opstr, "XOR")==0) {
2999
+               insn->i_op = ZIPO_XOR;
3000
+               insn_form = TWO_OP;
3001
+       } else if (strcasecmp(opstr, "LSR")==0) {
3002
+               insn->i_op = ZIPO_LSR;
3003
+               insn_form = TWO_OP;
3004
+       } else if (strcasecmp(opstr, "LSL")==0) {
3005
+               insn->i_op = ZIPO_LSL;
3006
+               insn_form = TWO_OP;
3007
+       } else if (strcasecmp(opstr, "ASR")==0) {
3008
+               insn->i_op = ZIPO_ASR;
3009
+               insn_form = TWO_OP;
3010
+       } else if (strcasecmp(opstr, "BREV")==0) {
3011
+               insn->i_op = ZIPO_BREV;                 // BREV b+Rb,Ra, or
3012
+               insn_form = ONE_OR_TWO_OP;              // BREV Rx -> BREV Rx,Rx
3013
+       } else if((strcasecmp(opstr, "LDILO")==0)
3014
+                       ||(strcasecmp(opstr, "LLO")==0)) {
3015
+               insn->i_op = ZIPO_LDILO;
3016
+               insn_form = TWO_OP;
3017
+       } else if (strcasecmp(opstr, "MPYUHI")==0) {    // MPUHI
3018
+               insn->i_op = ZIPO_MPYUHI;
3019
+               insn_form = TWO_OP;
3020
+       } else if (strcasecmp(opstr, "MPYSHI")==0) {    // MPSHI
3021
+               insn->i_op = ZIPO_MPYSHI;
3022
+               insn_form = TWO_OP;
3023
+       } else if (strcasecmp(opstr, "MPY")==0) {
3024
+               insn_form = TWO_OP;
3025
+               insn->i_op = ZIPO_MPY;
3026
+       } else if (strcasecmp(opstr, "MOV")==0) {
3027
+               insn->i_op = ZIPO_MOV;
3028
+               insn_form = TWO_OP;
3029
+       } else if (strcasecmp(opstr, "DIVU")==0) {
3030
+               insn->i_op = ZIPO_DIVU;
3031
+               insn_form = TWO_OP;
3032
+       } else if (strcasecmp(opstr, "DIVS")==0) {
3033
+               insn->i_op = ZIPO_DIVS;
3034
+               insn_form = TWO_OP;
3035
+       } else if (strcasecmp(opstr, "CMP")==0) {
3036
+               insn->i_op = ZIPO_CMP;
3037
+               insn_form = TWO_OP;
3038
+       } else if ((strcasecmp(opstr, "TST")==0)
3039
+               ||(strcasecmp(opstr, "TEST")==0)) {
3040
+               insn->i_op = ZIPO_TST;                  // TST b+Rb,Ra, or
3041
+               insn_form = ONE_OR_TWO_OP;              // TST Rx -> TST -1,Rx
3042
+       } else if (strcasecmp(opstr, "LW")==0) {
3043
+               insn->i_op = ZIPO_LW;
3044
+               insn_form = TWO_OP;
3045
+       } else if (strcasecmp(opstr, "SW")==0) {
3046
+               insn->i_op = ZIPO_SW;
3047
+               insn_form = BACKWARDS_TWO;
3048
+       } else if (strcasecmp(opstr, "LH")==0) {
3049
+               insn->i_op = ZIPO_LH;
3050
+               insn_form = TWO_OP;
3051
+       } else if (strcasecmp(opstr, "SH")==0) {
3052
+               insn->i_op = ZIPO_SH;
3053
+               insn_form = BACKWARDS_TWO;
3054
+       } else if (strcasecmp(opstr, "LB")==0) {
3055
+               insn->i_op = ZIPO_LB;
3056
+               insn_form = TWO_OP;
3057
+       } else if (strcasecmp(opstr, "SB")==0) {
3058
+               insn->i_op = ZIPO_SB;
3059
+               insn_form = BACKWARDS_TWO;
3060
+       } else if (strcasecmp(opstr, "LDI")==0) {
3061
+               insn->i_op = ZIPO_LDI;
3062
+               insn_form = IMM_OP;
3063
+       } else if (strcasecmp(opstr, "FPADD")==0) {
3064
+               insn->i_op = ZIPO_FPADD;
3065
+               insn_form = TWO_REGISTER;
3066
+       } else if (strcasecmp(opstr, "FPSUB")==0) {
3067
+               insn->i_op = ZIPO_FPSUB;
3068
+               insn_form = TWO_REGISTER;
3069
+       } else if (strcasecmp(opstr, "FPMUL")==0) {
3070
+               insn->i_op = ZIPO_FPMPY;
3071
+               insn_form = TWO_REGISTER;
3072
+       } else if (strcasecmp(opstr, "FPDIV")==0) {
3073
+               insn->i_op = ZIPO_FPDIV;
3074
+               insn_form = TWO_REGISTER;
3075
+       } else if (strcasecmp(opstr, "FPI2F")==0) {
3076
+               insn->i_op = ZIPO_FPI2F;
3077
+               insn_form = TWO_OP;
3078
+       } else if (strcasecmp(opstr, "FPF2I")==0) {
3079
+               insn->i_op = ZIPO_FPF2I;
3080
+               insn_form = TWO_REGISTER;
3081
+       } else if ((strcasecmp(opstr, "BRK")==0)
3082
+               ||(strcasecmp(opstr, "BREAK")==0)) {
3083
+               insn->i_op = ZIPO_BREAK;
3084
+               insn->i_imm= 0;
3085
+               insn_form = MAYBE_ONE_IMM;
3086
+       } else if (strcasecmp(opstr, "LOCK")==0) {
3087
+               insn->i_op = ZIPO_LOCK;
3088
+               insn_form = NO_OP;
3089
+       // Now for some derived instructions
3090
+       } else if (strcasecmp(opstr, "TRAP")==0) {
3091
+               insn->i_op = ZIPO_TRAP;
3092
+               insn_form = MAYBE_OPB;
3093
+       } else if (strcasecmp(opstr, "CLR")==0) {
3094
+               insn->i_op = ZIPO_CLR;
3095
+               insn_form = ONE_REGISTER;
3096
+       } else if (strcasecmp(opstr, "BRA")==0) {
3097
+               insn->i_op = ZIPO_BRA;
3098
+               insn_form = OP_ADDRESS;
3099
+       } else if (strcasecmp(opstr, "LJMP")==0) {
3100
+               insn->i_op = ZIPO_LJMP;
3101
+               insn->i_breg = ZIP_RNONE;
3102
+               insn->i_imm  = 0;
3103
+               insn_form = OP_ADDRESS;
3104
+       } else if (strcasecmp(opstr, "BZ")==0) {
3105
+               insn->i_op = ZIPO_BRA;
3106
+               insn->i_cnd = ZIPC_Z;
3107
+               insn_form = OP_ADDRESS;
3108
+       } else if (strcasecmp(opstr, "BLT")==0) {
3109
+               insn->i_op = ZIPO_BRA;
3110
+               insn->i_cnd = ZIPC_LT;
3111
+               insn_form = OP_ADDRESS;
3112
+       } else if (strcasecmp(opstr, "BC")==0) {
3113
+               insn->i_op = ZIPO_BRA;
3114
+               insn->i_cnd = ZIPC_C;
3115
+               insn_form = OP_ADDRESS;
3116
+       } else if (strcasecmp(opstr, "BV")==0) {
3117
+               insn->i_op = ZIPO_BRA;
3118
+               insn->i_cnd = ZIPC_V;
3119
+               insn_form = OP_ADDRESS;
3120
+       } else if (strcasecmp(opstr, "BNZ")==0) {
3121
+               insn->i_op = ZIPO_BRA;
3122
+               insn->i_cnd = ZIPC_NZ;
3123
+               insn_form = OP_ADDRESS;
3124
+       } else if (strcasecmp(opstr, "BGE")==0) {
3125
+               insn->i_op = ZIPO_BRA;
3126
+               insn->i_cnd = ZIPC_GE;
3127
+               insn_form = OP_ADDRESS;
3128
+       } else if (strcasecmp(opstr, "BNC")==0) {
3129
+               insn->i_op = ZIPO_BRA;
3130
+               insn->i_cnd = ZIPC_NC;
3131
+               insn_form = OP_ADDRESS;
3132
+       } else if (strcasecmp(opstr, "HALT")==0) {
3133
+               insn->i_op = ZIPO_HALT;
3134
+               insn->i_imm = ZIP_CC_SLEEP;
3135
+               insn->i_areg= ZIP_CC;
3136
+               insn_form = NO_OP;
3137
+       } else if (strcasecmp(opstr, "WAIT")==0) {
3138
+               insn->i_op = ZIPO_WAIT;
3139
+               insn->i_imm = ZIP_CC_SLEEP | ZIP_CC_GIE;
3140
+               insn->i_areg= ZIP_CC;
3141
+               insn_form = NO_OP;
3142
+       } else if (strcasecmp(opstr, "STEP")==0) {
3143
+               insn->i_op = ZIPO_STEP;
3144
+               insn->i_imm = ZIP_CC_STEP | ZIP_CC_GIE;
3145
+               insn->i_areg= ZIP_CC;
3146
+               insn_form = NO_OP;
3147
+       } else if ((strcasecmp(opstr, "RTU")==0)
3148
+                       ||(strcasecmp(opstr, "IRET")==0)) {
3149
+               insn->i_op = ZIPO_RTU;
3150
+               insn->i_imm = ZIP_CC_GIE;
3151
+               insn->i_areg = ZIP_CC;
3152
+               insn_form = NO_OP;
3153
+       } else if (strcasecmp(opstr, "BUSY")==0) {
3154
+               insn->i_op = ZIPO_BUSY;
3155
+               insn->i_imm= -4;
3156
+               insn->i_areg = ZIP_PC;
3157
+               insn->i_breg = ZIP_RNONE;
3158
+               insn_form = NO_OP;
3159
+       } else if (strcasecmp(opstr, "JMP")==0) {
3160
+               insn->i_op = ZIPO_JMP;
3161
+               insn->i_areg = ZIP_PC;
3162
+               insn_form = OP_B;
3163
+       } else if ((strcasecmp(opstr, "RETN")==0)
3164
+                       ||(strcasecmp(opstr, "RTN")==0)) {
3165
+               insn->i_op = ZIPO_JMP;
3166
+               insn->i_areg = ZIP_PC;
3167
+               insn->i_breg = ZIP_LR;
3168
+               insn->i_imm  = 0;
3169
+               insn_form = NO_OP;
3170
+       } else if (strcasecmp(opstr, "NOT")==0) {
3171
+               insn->i_op = ZIPO_NOT;
3172
+               insn->i_imm = -1;
3173
+               insn_form = ONE_REGISTER;
3174
+       } else if (strcasecmp(opstr, "NEG")==0) {
3175
+               insn->i_op = ZIPO_NEG;
3176
+               insn->i_imm = 0;
3177
+               insn_form = ONE_OR_TWO_OP;
3178
+       } else if (strcasecmp(opstr, "LJSR")==0) {
3179
+               insn->i_op   = ZIPO_LJSR;
3180
+               insn->i_breg = ZIP_RNONE;
3181
+               insn->i_imm  = 0;
3182
+               insn_form    = OP_ADDRESS;
3183
+       } else if (strcasecmp(opstr, "JSR")==0) {
3184
+               insn->i_op = ZIPO_JSR;
3185
+               insn->i_imm = 0;
3186
+               insn_form = OP_ADDRESS;
3187
+       } else if ((strcasecmp(opstr, "NOP")==0)
3188
+                       ||(strcasecmp(opstr, "NOOP")==0)) {
3189
+               insn->i_op = ZIPO_NOOP;
3190
+               insn_form = MAYBE_ONE_IMM;
3191
+       } else if (strcasecmp(opstr, "SIM")==0) {
3192
+               insn->i_op = ZIPO_SIM;
3193
+               insn->i_imm= 0;
3194
+               insn_form = MAYBE_ONE_IMM;
3195
+       } else if (strcasecmp(opstr, "SNOOP")==0) {
3196
+               insn->i_op = ZIPO_SIM;
3197
+               insn->i_imm= 0;
3198
+               insn_form = MAYBE_ONE_IMM;
3199
+       } else if (strcasecmp(opstr, "SDUMP")==0) {
3200
+               insn->i_op = ZIPO_SDUMP;
3201
+               insn->i_imm= 0;
3202
+               insn_form = MAYBE_ONE_REG;
3203
+       } else if (strcasecmp(opstr, "SEXIT")==0) {
3204
+               insn->i_op = ZIPO_SEXIT;
3205
+               insn->i_imm= 0;
3206
+               insn_form = MAYBE_ONE_IMM_OR_REG;
3207
+       } else if (strcasecmp(opstr, "SOUT")==0) {
3208
+               insn->i_op = ZIPO_SOUT;
3209
+               insn->i_imm= 0;
3210
+               insn_form = MAYBE_ONE_IMM_OR_REG;
3211
+       } else if (strcasecmp(opstr, "NDUMP")==0) {
3212
+               insn->i_op = ZIPO_NDUMP;
3213
+               insn->i_imm= 0;
3214
+               insn_form = MAYBE_ONE_REG;
3215
+       } else if (strcasecmp(opstr, "NEXIT")==0) {
3216
+               insn->i_op = ZIPO_NEXIT;
3217
+               insn->i_imm= 0;
3218
+               insn_form = MAYBE_ONE_IMM_OR_REG;
3219
+       } else if (strcasecmp(opstr, "SEXTB")==0) {
3220
+               insn->i_op = ZIPO_SEXTB;
3221
+               insn->i_imm= 0;
3222
+               insn_form = ONE_REGISTER;
3223
+       } else if (strcasecmp(opstr, "SEXTH")==0) {
3224
+               insn->i_op = ZIPO_SEXTH;
3225
+               insn->i_imm= 0;
3226
+               insn_form = ONE_REGISTER;
3227
+       } else if (strcasecmp(opstr, "NOUT")==0) {
3228
+               insn->i_op = ZIPO_NOUT;
3229
+               insn->i_imm= 0;
3230
+               insn_form = MAYBE_ONE_IMM_OR_REG;
3231
+       } else {
3232
+               free(alt);
3233
+               return "Unrecognized op-code";
3234
+       }
3235
+
3236
+       if (cndp) {
3237
+               // We have a condition
3238
+               if (insn->i_cnd != ZIPC_ALWAYS) {
3239
+                       err = "Instruction cannot take an additional condition";
3240
+               } else {
3241
+                       err = zip_parse_condition(cndp, &insn->i_cnd);
3242
+               }
3243
+       } if (err) {
3244
+               free(alt);
3245
+               return err;
3246
+       }
3247
+
3248
+       if (strchr(line, ',')!=NULL)
3249
+               left = strtok(NULL, ",");
3250
+       else
3251
+               left  = strtok(NULL, " \t,");
3252
+       right = (left)  ? strtok(NULL, " \t") : NULL;
3253
+       eol   = (right) ? strtok(NULL, " \t") : NULL;
3254
+       if (eol != NULL) {
3255
+               free(alt);
3256
+               return "Too many tokens on one line";
3257
+       }
3258
+
3259
+       switch(insn_form) {
3260
+               case TWO_OP:
3261
+                       err = zip_parse_bop(left,insn);
3262
+                       if (!err)
3263
+                               err = zip_parse_reg(right,&insn->i_areg);
3264
+                       break;
3265
+               case IMM_OP:
3266
+                       err = zip_parse_bop(left,insn);
3267
+                       if ((!err)&&(insn->i_breg == ZIP_RNONE))
3268
+                               err = zip_parse_reg(right,&insn->i_areg);
3269
+                       else if (!err)
3270
+                               err = "LDI can only load immediates, not registers";
3271
+                       break;
3272
+               case BACKWARDS_TWO:
3273
+                       err = zip_parse_reg(left,&insn->i_areg);
3274
+                       if (!err)
3275
+                               err = zip_parse_bop(right,insn);
3276
+                       break;
3277
+               case MAYBE_ONE_IMM:
3278
+                       if (NULL != right)
3279
+                               err = "Wrong number of operands!";
3280
+                       else if (left) {
3281
+                               err = zip_parse_bop(left,insn);
3282
+                               if ((!err)&&(insn->i_breg != ZIP_RNONE))
3283
+                                       err = "BREAK arguments can only be immediates";
3284
+                       }
3285
+                       break;
3286
+               case MAYBE_ONE_IMM_OR_REG:
3287
+                       if (NULL != right)
3288
+                               err = "Wrong number of operands!";
3289
+                       else if (left) {
3290
+                               err = zip_parse_bop(left,insn);
3291
+                               if ((!err)&&(insn->i_breg != ZIP_RNONE)
3292
+                                       &&(insn->i_imm != 0))
3293
+                                       err = "EXIT arguments can only be immediates or register, not both";
3294
+                       }
3295
+                       break;
3296
+               case MAYBE_ONE_REG:
3297
+                       if (NULL != right)
3298
+                               err = "Wrong number of operands!";
3299
+                       else if (left) {
3300
+                               err = zip_parse_bop(left,insn);
3301
+                               if ((!err)&&(insn->i_breg != ZIP_RNONE)&&(insn->i_imm))
3302
+                                       err = "xDUMP instructions can handle immediates or registers, not both";
3303
+                       } else {
3304
+                               insn->i_breg = ZIP_RNONE;
3305
+                               insn->i_imm  = 0;
3306
+                       } break;
3307
+               case NO_OP:
3308
+                       if ((NULL != left)||(NULL != right))
3309
+                               err = "Wrong number of operands!";
3310
+                       break;
3311
+               case ONE_OR_TWO_OP:
3312
+                       // This is a reference to the test instruction, which
3313
+                       // can either be
3314
+                       //      A. TEST a,Rx, or TEST Rx,.
3315
+                       // or   B. BRA  a,Rx, or BRA Rx,.
3316
+                       if (NULL != right) {
3317
+                               err = zip_parse_bop(left,insn);
3318
+                               if (!err)
3319
+                                       err = zip_parse_reg(right,&insn->i_areg);
3320
+                               if (!err)
3321
+                                       err = zip_parse_bop(left,insn);
3322
+                       } else {
3323
+                               zip_parse_reg(left, &insn->i_areg);
3324
+                               if (insn->i_op == ZIPO_BREV) {
3325
+                                       insn->i_breg = insn->i_areg;
3326
+                                       insn->i_imm = 0;
3327
+                               } else {
3328
+                                       insn->i_breg = ZIP_RNONE;
3329
+                                       insn->i_imm = -1;
3330
+                               }
3331
+                       } break;
3332
+               case ONE_REGISTER:
3333
+                       // CLR, CLRF, or NOT
3334
+                       insn->i_breg = ZIP_RNONE;
3335
+                       if (NULL != right)
3336
+                               err = "Instruction opcode expects only one operand";
3337
+                       else
3338
+                               err = zip_parse_reg(left,&insn->i_areg);
3339
+                       break;
3340
+               case OP_ADDRESS:
3341
+                       // JSR or BRA instruction
3342
+                       //      This is different from OP_B below, in that this
3343
+                       //      form implies a PC relative addressing, which
3344
+                       //      may not be clear from the operands given
3345
+                       if (NULL != right)
3346
+                               err = "Instruction opcode expects only one operand";
3347
+                       else {
3348 206 dgisselq
+                               if ((NULL == left)||(left[0] == '\0')) {
3349
+                                       err = "No address given";
3350
+                               } else if ((NULL == strchr(left,'('))
3351 202 dgisselq
+                                       &&(NULL == strchr(left,'+'))) {
3352
+                                       char    *longerstr = (char *)xmalloc(strlen(left)+6);
3353
+                                       // If not stated, assume PC relative
3354
+                                       strcpy(longerstr,left);
3355
+                                       strcat(longerstr, "(PC)");
3356
+                                       err = zip_parse_bop(longerstr, insn);
3357
+                                       free(longerstr);
3358
+                               } else
3359
+                                       err = zip_parse_bop(left, insn);
3360
+                       }
3361
+
3362
+                       break;
3363
+               case MAYBE_OPB:
3364
+                       // JMP or TRAP instruction
3365
+                       if (NULL != right)
3366
+                               err = "Instruction opcode expects only one operand";
3367
+                       else if (NULL == left) {
3368
+                               insn->i_breg = ZIP_RNONE;
3369
+                               insn->i_imm = 0;
3370
+                               break;
3371
+                       } // Fall through
3372
+               case OP_B: // Operand B only (A is implied)
3373
+                       // JMP or TRAP instruction
3374
+                       if (NULL != right)
3375
+                               err = "Instruction opcode expects only one operand";
3376
+                       else
3377
+                               err = zip_parse_bop(left, insn);
3378
+                       if (insn->i_op == ZIPO_JMP)
3379
+                               insn->i_areg = ZIP_PC;
3380
+                       else // if insn->i_op == TRAP
3381
+                               insn->i_areg = ZIP_CC;
3382
+                       break;
3383
+               case TWO_REGISTER:
3384
+                       // These are the floating point instructions, which
3385
+                       // can't handle immediate offsets.
3386
+                       err = zip_parse_reg(right, &insn->i_areg);
3387
+                       if (!err)
3388
+                               err = zip_parse_reg(left, &insn->i_breg);
3389
+                       break;
3390
+               default:        // case ILLEGAL_FORM
3391
+                       err = "Unknown instruction format!";
3392
+                       break;
3393
+       }
3394
+
3395
+       if (err)
3396
+               return (err);
3397
+
3398
+       switch(insn->i_op) {
3399
+               case ZIPO_SUB:  case ZIPO_AND: case ZIPO_ADD: case ZIPO_OR:
3400
+               case ZIPO_XOR:  case ZIPO_LSR: case ZIPO_LSL: case ZIPO_ASR:
3401
+               case ZIPO_BREV:
3402
+               case ZIPO_MPYUHI: case ZIPO_MPYSHI:
3403
+               case ZIPO_MPY:
3404
+                       break;
3405
+               case ZIPO_LDILO:
3406
+                       if (!fits_within(16, insn->i_imm))
3407
+                               gas_assert((insn->i_imm & (~0x0ffff))==0);
3408
+                       insn->i_imm &= 0x0ffff;
3409
+                       break;
3410
+               case ZIPO_DIVU: case ZIPO_DIVS:
3411
+                       if (0x0e == (insn->i_areg & 0x0f))
3412
+                               err = "Divide instructions cannot result in CC or PC regs";
3413
+                       else if (insn->i_rp)
3414
+                               err = "Relocations not applicable for divides";
3415
+                       break;
3416
+                       break;
3417
+               case ZIPO_MOV:
3418
+                       if (insn->i_breg == ZIP_RNONE)
3419
+                               insn->i_op = ZIPO_LDI;
3420
+                       break;
3421
+               case ZIPO_CMP: case ZIPO_TST:
3422
+                       break;
3423
+               case ZIPO_LW: case ZIPO_SW:
3424
+               case ZIPO_LH: case ZIPO_SH:
3425
+               case ZIPO_LB: case ZIPO_SB:
3426
+                       break;
3427
+               case ZIPO_LDI: case ZIPO_LDIn:
3428
+                       break;
3429
+               case ZIPO_FPADD: case ZIPO_FPSUB:
3430
+               case ZIPO_FPMPY: case ZIPO_FPDIV:
3431
+               case ZIPO_FPF2I: case ZIPO_FPI2F:
3432
+                       if (0x0e == (insn->i_areg & 0x0f))
3433
+                               err = "Floating point operations cannot result in CC or PC regs";
3434
+                       else if (insn->i_rp)
3435
+                               err = "Relocations not applicable for floating point ops";
3436
+                       break;
3437
+               case ZIPO_TRAP:
3438
+                       insn->i_areg = ZIP_CC;
3439
+                       if (insn->i_breg == ZIP_RNONE) {
3440 209 dgisselq
+                               // TRAP instructions *ALWAYS* clear the GIE bit
3441
+                               insn->i_imm &= (~0x0020);
3442 202 dgisselq
+                               if (insn->i_cnd == ZIPC_ALWAYS)
3443
+                                       insn->i_op = ZIPO_LDI;
3444
+                               else if (fits_within(16, insn->i_imm))
3445
+                                       insn->i_op = ZIPO_LDILO;
3446
+                               else if (fits_within(18, zip_brev(insn->i_imm)))
3447
+                                       insn->i_op = ZIPO_BREV;
3448
+                               else
3449 209 dgisselq
+                                       err = "TRAP 18+ bit immediate not supported";
3450 202 dgisselq
+                       } else
3451
+                               insn->i_op = ZIPO_MOV;
3452
+                       break;
3453
+               case ZIPO_CLR:
3454
+                       insn->i_op = ZIPO_LDI;
3455
+                       insn->i_imm = 0;
3456
+                       break;
3457
+               case ZIPO_JMP:
3458
+                       if (insn->i_breg != ZIP_RNONE)
3459
+                               insn->i_op = ZIPO_MOV;  // JMP A+Rx
3460
+                       else
3461
+                               insn->i_op = ZIPO_BRA;  // JMP lbl = BRA lbl
3462
+                       // Fall through
3463
+               case ZIPO_BRA: // Leave as ZIPO_BRA until we assemble it
3464
+                       insn->i_areg = ZIP_PC;
3465
+                       break;
3466
+               case ZIPO_HALT: case ZIPO_WAIT: case ZIPO_RTU: case ZIPO_STEP:
3467
+                       insn->i_op = ZIPO_OR;
3468
+                       break;
3469
+               case ZIPO_BUSY:
3470
+                       insn->i_op = ZIPO_ADD;
3471
+                       break;
3472
+               case ZIPO_NOT:
3473
+                       insn->i_op = ZIPO_XOR;
3474
+                       insn->i_imm  = -1;
3475
+                       insn->i_breg = ZIP_RNONE;
3476
+                       break;
3477
+               case ZIPO_NEG:
3478
+                       if (insn->i_breg == ZIP_RNONE) {
3479
+                               insn->i_breg = insn->i_areg;
3480
+                               // This would've been set to -1 by the ONE or
3481
+                               // TWO op code.  Here, we set it back to zero.
3482
+                               insn->i_imm  = 0;
3483
+                       }
3484
+                       // insn->i_op = ZIPO_NEG; /// Can't collapse this yet
3485
+                       break;
3486
+               case ZIPO_BREAK:
3487
+                       insn->i_op = ZIPO_BREAK;
3488
+                       insn->i_areg = ZIP_RNONE;
3489
+                       insn->i_breg = ZIP_RNONE;
3490
+                       // insn->i_imm  = ... whatever it was set to
3491
+                       break;
3492
+               case ZIPO_LOCK:
3493
+                       insn->i_op = ZIPO_LOCK;
3494
+                       insn->i_areg = ZIP_RNONE;
3495
+                       insn->i_breg = ZIP_RNONE;
3496
+                       insn->i_imm  = 0;
3497
+                       break;
3498
+               case ZIPO_SDUMP:
3499
+                       insn->i_op = ZIPO_SIM;
3500
+                       if (insn->i_breg != ZIP_RNONE) {
3501
+                               insn->i_imm = (int)insn->i_breg + 0x0200;
3502
+                               insn->i_breg = ZIP_RNONE;
3503
+                       } else
3504
+                               insn->i_imm = 0x2ff;
3505
+                       break;
3506
+               case ZIPO_NDUMP:
3507
+                       insn->i_op = ZIPO_NOOP;
3508
+                       if (insn->i_breg != ZIP_RNONE) {
3509
+                               insn->i_imm = (int)insn->i_breg + 0x0200;
3510
+                               insn->i_breg = ZIP_RNONE;
3511
+                       } else
3512
+                               insn->i_imm = 0x2ff;
3513
+                       break;
3514
+               case ZIPO_SEXIT:
3515
+                       insn->i_op = ZIPO_SIM;
3516
+                       if (insn->i_breg != ZIP_RNONE)
3517
+                               insn->i_imm = 0x300 + (insn->i_breg & 0x01f);
3518
+                       else
3519
+                               insn->i_imm = 0x100 + (insn->i_imm & 0x0ff);
3520
+                       insn->i_breg = ZIP_RNONE;
3521
+                       break;
3522
+               case ZIPO_NEXIT:
3523
+                       insn->i_op = ZIPO_NOOP;
3524
+                       if (insn->i_breg != ZIP_RNONE)
3525
+                               insn->i_imm = 0x300 + (insn->i_breg & 0x01f);
3526
+                       else
3527
+                               insn->i_imm = 0x100 + (insn->i_imm & 0x0ff);
3528
+                       insn->i_breg = ZIP_RNONE;
3529
+                       break;
3530
+               case ZIPO_SOUT:
3531
+                       insn->i_op = ZIPO_SIM;
3532
+                       if (insn->i_breg != ZIP_RNONE)
3533
+                               insn->i_imm = 0x220 + (insn->i_breg & 0x01f);
3534
+                       else
3535
+                               insn->i_imm = 0x400 + (insn->i_imm & 0x0ff);
3536
+                       insn->i_breg = ZIP_RNONE;
3537
+                       break;
3538
+               case ZIPO_NOUT:
3539
+                       insn->i_op = ZIPO_NOOP;
3540
+                       if (insn->i_breg != ZIP_RNONE)
3541
+                               insn->i_imm = 0x220 + (insn->i_breg & 0x01f);
3542
+                       else
3543
+                               insn->i_imm = 0x400 + (insn->i_imm & 0x0ff);
3544
+                       insn->i_breg = ZIP_RNONE;
3545
+                       break;
3546
+               case ZIPO_SIM:
3547
+               case ZIPO_NOOP:
3548
+                       break;
3549
+               case ZIPO_LJMP: case ZIPO_LJSR:
3550
+                       if (insn->i_breg == ZIP_PC)
3551
+                               insn->i_breg = ZIP_RNONE;
3552
+                       if (insn->i_breg != ZIP_RNONE) {
3553
+                               err = "Indirect long jumps and long JSRs are not supported";
3554
+                       } break;
3555
+               case ZIPO_JSR:
3556
+                       break;
3557
+               case ZIPO_SEXTB: case ZIPO_SEXTH:
3558
+                       break;
3559
+               default:
3560
+                       return "Internal error -- unrecognized internal opcode";
3561
+                       break;
3562
+       } if (err) {
3563
+               free(alt);
3564
+               return err;
3565
+       }
3566
+
3567
+       if ((insn->i_op != ZIPO_MOV)&&(
3568
+                       ((insn->i_areg != ZIP_RNONE)&&(insn->i_areg >= 0x10))
3569
+                       ||((insn->i_breg != ZIP_RNONE)&&(insn->i_breg >= 0x10)))) {
3570
+               if (insn->i_rp)
3571
+                       free(insn->i_rp);
3572
+               insn->i_rp = NULL;
3573
+               free(alt);
3574
+               return "Only MOV instructions can reference explicit user registers";
3575
+       }
3576
+
3577
+       free(alt);
3578
+
3579
+       // We do nothing more to build the opcode here --- all we are doing
3580
+       // is parsing.
3581
+       return err;
3582
+}
3583
+
3584
+#define        NOOPGROUP(OP,IMM) ((0x78000000)|((((OP)+0x1c-ZIPO_BREAK)&0x01f)<<22)|((IMM) & 0x003fffff))
3585
+#define        DBLREGOP(OP,CND,IMM,B,A) ((((OP)&0x01f)<<22)|(((A)&0x0f)<<27)   \
3586
+                       | (((CND)&0x07)<<19)|(1<<18)|(((B)&0x0f)<<14)   \
3587
+                       | ((IMM) & 0x03fff))
3588
+#define        SMPLMOV(CND,IMM,B,A)    (((ZIPO_MOV&0x01f)<<22)|(((A)&0x0f)<<27)        \
3589
+                       | (((CND)&0x07)<<19)|(((B)&0x0f)<<14)|((IMM) & 0x01fff))
3590
+#define        IMMOP(OP,CND,IMM,A)     ((((OP)&0x01f)<<22)|(((A)&0x0f)<<27)    \
3591
+                       | (((CND)&0x07)<<19)|((IMM) & 0x03ffff))
3592
+#define        LDIOP(IMM,A)    ((ZIPO_LDI<<22)|(((A)&0x0f)<<27)|((IMM) & 0x07fffff))
3593
+
3594
+
3595
+/*
3596
+ *     CIS support code
3597
+ *
3598
+ *     Assuming that the instruction (a) is not a CIS instruction, this looks
3599
+ *     up the immediate value encoded in the instruction.  The purpose is to
3600
+ *     determine whether or not this instruction can be merged with the
3601
+ *     previous (or next) instruction in CIS mode.
3602
+ *
3603
+ */
3604
+static int
3605
+zip_non_cis_immediate(const unsigned a)
3606
+{
3607
+       ZIP_OPCODE      op = (ZIP_OPCODE)((a>>22)&0x1f);
3608
+       int             imm;
3609
+
3610
+       switch(op) {
3611
+               case    ZIPO_MOV:
3612
+                       imm = (a & 0x01fff); if (a&0x1000) imm |= -0x1000; break;
3613
+               case    ZIPO_LDI:
3614
+                       imm = (a & 0x03fffff); break;
3615
+               case    ZIPO_LDIn:
3616
+                       imm = (a & 0x03fffff); imm |= -0x0200000; break;
3617
+/*
3618
+ * While this makes conceptual sense, it doesn't match the CPU.  Hence let's
3619
+ * comment it out and make certain things still work.
3620
+               case    ZIPO_LDILO:
3621
+#ifndef        LONG_MPY
3622
+               case ZIPO_LDIHI: // BREVx would rm LDIHI
3623
+#endif
3624
+                       imm = (a & 0x0ffff); break;
3625
+*/
3626
+               default:
3627
+                       if (a & 0x040000) {
3628
+                               imm = (a & 0x03fff);
3629
+                               if (a & 0x2000) imm |= -0x02000;
3630
+                       } else {
3631
+                               imm = (a & 0x03ffff);
3632
+                               if (a & 0x020000)
3633
+                                       imm |= -0x020000;
3634
+                       }
3635
+       }
3636
+
3637
+       return imm;
3638
+}
3639
+
3640
+static int
3641
+zip_can_merge(const unsigned a, const unsigned b)
3642
+{
3643
+       // Can't merge instructions if merging isnt turned on
3644
+       if (!zip_param_cis)
3645
+               return 0;
3646
+
3647
+       // 1. Can't merge anything that's already merged
3648
+       if ((a|b) & 0x80000000)
3649
+               return 0;
3650 209 dgisselq
+
3651 202 dgisselq
+       ZIP_OPCODE      opa, opb;
3652
+       ZIP_CONDITION   ac, bc;
3653
+       int     imma, immb;
3654
+
3655
+       // Get the 5-bit operands for each
3656
+       opa = (a>>22)&0x1f;
3657
+       opb = (b>>22)&0x1f;
3658
+
3659
+       // 2. Can only merge if both are unconditional
3660
+       ac = ((a>>19)&0x07);
3661
+       bc = ((b>>19)&0x07);
3662
+       if ((opa != ZIPO_LDI)&&(opa != ZIPO_LDIn)&&(ac != ZIPC_ALWAYS))
3663
+               return 0;
3664
+       if ((opb != ZIPO_LDI)&&(opb != ZIPO_LDIn)&&(bc != ZIPC_ALWAYS))
3665
+               return 0;
3666
+
3667
+       // Only some instructions can be merged
3668
+       switch(opa) {
3669
+               case ZIPO_SUB: case ZIPO_AND: case ZIPO_ADD: case ZIPO_CMP:
3670
+               case ZIPO_LW:  case ZIPO_SW:  case ZIPO_LDI: case ZIPO_MOV:
3671
+               case ZIPO_LDIn:
3672
+                       break;
3673
+               default:
3674
+                       return 0;
3675
+       } switch(opb) {
3676
+               case ZIPO_SUB: case ZIPO_AND: case ZIPO_ADD: case ZIPO_CMP:
3677
+               case ZIPO_LW:  case ZIPO_SW:  case ZIPO_LDI: case ZIPO_MOV:
3678
+               case ZIPO_LDIn:
3679
+                       break;
3680
+               default:
3681
+                       return 0;
3682
+       }
3683
+
3684
+       // Prohibit moves to/from user regs to merge
3685 209 dgisselq
+       if ((opa == ZIPO_MOV)&&(a & 0x42000))
3686 202 dgisselq
+               return 0;
3687 209 dgisselq
+       if ((opb == ZIPO_MOV)&&(b & 0x42000))
3688 202 dgisselq
+               return 0;
3689 206 dgisselq
+
3690 202 dgisselq
+       imma = zip_non_cis_immediate(a);
3691
+       immb = zip_non_cis_immediate(b);
3692
+
3693
+       if (!fits_within(8,imma)) {
3694
+               return 0;
3695
+       } if (!fits_within(8,immb)) {
3696
+               return 0;
3697
+       }
3698
+
3699
+       // if abreg & 0x010, or bbreg & 0x010, then the register is being
3700
+       // used.
3701
+       int aareg = (a>>27)&0x00f;
3702
+       int abreg = (a>>14)&0x01f;
3703
+       int bbreg = (b>>14)&0x01f;
3704
+
3705
+       switch(opa) {
3706
+               case ZIPO_MOV:
3707
+                       if (!fits_within(3,imma))
3708
+                               return 0;
3709 206 dgisselq
+                       // Prohibit a MOV x(PC),Ry to move into a first
3710
+                       // instruction position.  While the CPU supports it,
3711
+                       // making sure x remains valid isn't yet supported
3712
+                       // here.
3713
+                       if ((ZIP_PC == aareg)||(ZIP_CC == aareg))
3714 202 dgisselq
+                               return 0;
3715
+                       break;
3716
+               case ZIPO_LDI: case ZIPO_LDIn:
3717
+                       if (!fits_within(8,imma))
3718
+                               return 0;
3719
+                       if (aareg == ZIP_CC)
3720
+                               return 0;
3721
+                       break;
3722
+               case ZIPO_ADD: case ZIPO_SUB: case ZIPO_AND:
3723
+                       if (aareg == ZIP_CC)
3724
+                               return 0;
3725
+               case ZIPO_CMP:
3726
+                       if ((abreg&0x10)==0) {
3727
+                               if (!fits_within(7,imma)) {
3728
+                                       return 0;
3729
+                               }
3730
+                       } else { // if (abreg&0x10)
3731
+                               if (!fits_within(3,imma))
3732
+                                       return 0;
3733
+                       } break;
3734
+               case ZIPO_LW: case ZIPO_SW:
3735
+                       if (aareg == ZIP_CC)
3736
+                               return 0;
3737
+                       if ((abreg&0x010)==0) {
3738
+                               return 0;
3739
+                       } else if (abreg== 0x10 + ZIP_SP) {
3740
+                               if (!fits_within(7,imma))
3741
+                                       return 0;
3742
+                       } else {
3743
+                               if (!fits_within(3,imma))
3744
+                                       return 0;
3745
+                       } break;
3746
+               default:
3747
+                       fprintf(stderr, "Unknown op, %d\n", opa);
3748
+                       return 0;
3749
+       }
3750
+
3751
+       switch(opb) {
3752
+               case ZIPO_MOV:
3753
+                       if (!fits_within(3,immb)) {
3754
+                               return 0;
3755
+                       } break;
3756
+               case ZIPO_LDI: case ZIPO_LDIn:
3757
+                       if (!fits_within(8,immb)) {
3758
+                               return 0;
3759
+                       } break;
3760
+               case ZIPO_ADD: case ZIPO_SUB: case ZIPO_CMP: case ZIPO_AND:
3761
+                       if ((bbreg&0x10)==0) {
3762
+                               if (!fits_within(7,immb))
3763
+                                       return 0;
3764
+                       } else { // if (bbreg&0x10)
3765
+                               if (!fits_within(3,immb))
3766
+                                       return 0;
3767
+                       } break;
3768
+               case ZIPO_LW: case ZIPO_SW:
3769
+                       if ((bbreg&0x010)==0) {
3770
+                               return 0;
3771
+                       } else if (bbreg== 0x10+ZIP_SP) {
3772
+                               if (!fits_within(7,immb))
3773
+                                       return 0;
3774
+                       } else {
3775
+                               if (!fits_within(3,immb))
3776
+                                       return 0;
3777
+                       } break;
3778
+               default:
3779
+                       return 0;
3780
+       }
3781
+
3782
+       return 1;
3783
+}
3784
+
3785
+static unsigned
3786
+zip_insn_merge(const unsigned a, const unsigned b)
3787
+{
3788
+       // 1. We already know we can merge these, so skip our can-merge checks
3789
+       ZIP_OPCODE      opa, opb;
3790
+       unsigned int    retv = 0;
3791
+
3792
+       // Get our two opcodes
3793
+       opa = (a>>22)&0x1f; opb = (b>>22)&0x1f;
3794
+
3795
+       // Truncate LDI opcodes back to their original values
3796
+       if (opa == 0x019) opa = 0x018;
3797
+       if (opb == 0x019) opb = 0x018;
3798
+       retv = 0x80008000;
3799
+
3800
+       // Start with the destination registers
3801
+       retv |= (a & 0x78000000);
3802
+       retv |= (b & 0x78000000) >> (27-11);
3803
+
3804
+       // Then the new OpCodes
3805
+       switch(opa) {
3806
+       case ZIPO_SUB:  retv |= (ZIPV_SUB<<24); break;
3807
+       case ZIPO_AND:  retv |= (ZIPV_AND<<24); break;
3808
+       case ZIPO_ADD:  retv |= (ZIPV_ADD<<24); break;
3809
+       case ZIPO_CMP:  retv |= (ZIPV_CMP<<24); break;
3810
+       case ZIPO_LW:   retv |= (ZIPV_LW <<24); break;
3811
+       case ZIPO_SW:   retv |= (ZIPV_SW <<24); break;
3812
+// 8e40
3813
+// 1.0001.110_0100_0000
3814
+       case ZIPO_LDI:  retv |= (ZIPV_LDI<<24); break;
3815
+       case ZIPO_MOV:  retv |= (ZIPV_MOV<<24); break;
3816
+       default: gas_assert(0);
3817
+       }
3818
+
3819
+       switch(opb) {
3820
+       case ZIPO_SUB:  retv |= (ZIPV_SUB<<8); break;
3821
+       case ZIPO_AND:  retv |= (ZIPV_AND<<8); break;
3822
+       case ZIPO_ADD:  retv |= (ZIPV_ADD<<8); break;
3823
+       case ZIPO_CMP:  retv |= (ZIPV_CMP<<8); break;
3824
+       case ZIPO_LW:   retv |= (ZIPV_LW <<8); break;
3825
+       case ZIPO_SW:   retv |= (ZIPV_SW <<8); break;
3826
+       case ZIPO_LDI:  retv |= (ZIPV_LDI<<8); break;
3827
+       case ZIPO_MOV:  retv |= (ZIPV_MOV<<8); break;
3828
+       default: gas_assert(0);
3829
+       }
3830
+
3831
+       // The new CIS has no condition codes
3832
+
3833
+       // Now for OpB, instruction A
3834
+       if (opa == ZIPO_LDI)
3835
+               retv |= (a & 0xff)<<16;
3836
+       else if (opa == ZIPO_MOV) {
3837
+               retv |= 1<<23;                  // Using a register? always4mov
3838
+               retv |= ((a>>14)&0x0f)<<19;     // OpB register
3839
+               retv |= (a & 0x7)<<16;          // Offset
3840
+       } else if(((opa == ZIPO_LW)||(opa == ZIPO_SW))
3841
+                       &&(((a>>14)&0x1f)==0x10 + ZIP_SP)) {
3842
+               // 7-bit immediate for loads or stores referencing the stack
3843
+               retv |= (a & 0x07f)<<16;
3844
+       } else if ((a>>18)&1) {
3845
+               // OpB ... with a register
3846
+               retv |= 1<<23;                  // Using a register?
3847
+               retv |= ((a>>14)&0x0f)<<19;     // OpB register
3848
+               retv |= (a&0x07)<<16;           // OpB constant
3849
+       } else {
3850
+               // OpB ... with constant offsets only
3851
+               retv |= (a&0x07f)<<16;
3852
+       }
3853
+
3854
+
3855
+       // Now for OpB, instruction B
3856
+       if (opb == ZIPO_LDI)
3857
+               retv |= (b & 0xff);
3858
+       else if (opb == ZIPO_MOV) {
3859
+               retv |= (1<<7);                 // Using a register? always4mov
3860
+               retv |= ((b>>14)&0x0f)<<3;      // OpB register
3861
+               retv |= (b & 0x7);              // Offset
3862
+       } else if(((opb == ZIPO_LW)||(opb == ZIPO_SW))
3863
+                       &&(((b>>14)&0x1f)==0x10 + ZIP_SP)) {
3864
+               retv |= (b & 0x07f);
3865
+       } else if ((b>>18)&1) {
3866
+               // OpB ... with a register
3867
+               retv |= 1<<7;                   // Using a register?
3868
+               retv |= ((b>>14)&0x0f)<<3;      // OpB register
3869
+               retv |= (b&0x07);               // OpB constant
3870
+       } else {
3871
+               // OpB ... with constant offsets only
3872
+               retv |= (b&0x07f);
3873
+       }
3874
+
3875
+       return retv;
3876
+}
3877
+
3878
+void
3879
+zip_check_label(symbolS *label ATTRIBUTE_UNUSED)
3880
+{
3881
+       // On any symbol, we need to make sure that we can jump to this
3882
+       // address, therefore we cannot merge the previous instruction with
3883
+       // another one that might follow.
3884
+       cis_mergable = FALSE;
3885
+       //
3886
+       // Likewise, our shadow virtual machine values may be ... unknown
3887
+       // upon any jump to this location.  Hence, we declare them unknown
3888
+       // here.
3889
+       zip_clear_machine(&zipm);
3890
+}
3891
+
3892
+// UNITS:
3893
+//     Offset  (target byte units)
3894
+//     Address (host byte units)
3895
+//     Sym     (target byte units)
3896
+//     Stretch (target byte units)
3897
+//
3898
+static void
3899
+zip_assemble_insn_words(fragS *fragP, segT seg, ZIPIS *insn, int relax_state,
3900
+               long stretch, MACHINEREGS *pzipm)
3901
+{
3902
+#ifdef ZIP_DEBUG
3903
+fprintf(stderr, "ZIP-ASSEMBLE-INSN-WORDS\n");
3904
+       zip_dump_insn(insn);
3905
+       if ((insn->i_rp)||(relax_state))
3906
+               zip_dump_sym(insn->i_rp->r_sym);
3907
+#endif
3908
+       unsigned long   symv = 0;
3909
+       int     sym_defined = 0, this_segment = 0, sym_known = 0;
3910
+       symbolS *sym = NULL;
3911
+       unsigned        immv = insn->i_imm;
3912
+
3913
+       if (insn->i_rp) {
3914
+               fragS   *sym_frag;
3915
+
3916
+               sym = insn->i_rp->r_sym;
3917
+               symv = ((sym)&&(S_IS_DEFINED(sym))) ? (S_GET_VALUE(sym)) : 0;
3918
+               sym_frag = symbol_get_frag(sym);
3919
+               this_segment = (S_GET_SEGMENT(sym) == seg);
3920
+
3921
+#ifdef ZIP_DEBUG
3922
+               fprintf(stderr, "SYMV(%s) = %08lx + %08lx -> %08lx\n",
3923
+                       S_GET_NAME(sym),
3924
+                       S_GET_VALUE(sym), fragP->fr_offset,
3925
+                       S_GET_VALUE(sym) + fragP->fr_offset);
3926
+#endif
3927
+               symv += fragP->fr_offset;
3928
+               // The immediate value has been included in the fragP->fr_offset
3929
+               // So, to keep us from applying it twice, we'll zero it here.
3930
+               immv = 0;
3931
+
3932
+#ifdef ZIP_DEBUG
3933
+               { int this_frag = (sym_frag == fragP);
3934
+               fprintf(stderr, "Determined symbol is %sin this frag, and %sin this segment\n", (this_frag)?"":"not ", (this_segment)?"":"not ");
3935
+               }
3936
+#endif
3937
+
3938
+               if ((stretch != 0)
3939
+                       &&( sym_frag->relax_marker != fragP->relax_marker)
3940
+                       &&(this_segment)) {
3941
+                       if ((stretch < 0)
3942
+                               ||(sym_frag->region == fragP->region))
3943
+                               symv += stretch;
3944
+                       else if (symv < fragP->fr_address)
3945
+                               symv = fragP->fr_next->fr_address;
3946
+               }
3947
+       }
3948
+
3949
+       // At this point, if the symbol is "defined" that only means that
3950
+       // the address is known--not that we can know it via GET_VALUE above
3951
+       // here.  There are a couple of possibilities: it could be a known
3952
+       // offset into a fragment, it could be a known offset into a segment,
3953
+       // it could be a known memory address, or it could be a known value.
3954
+       //
3955
+       // If the value is an offset into our current fragment, then we can
3956
+       // get at it via PC relative addressing.
3957
+       //
3958
+       // If the symbol is an offset into our current segment, often the
3959
+       // .text segment, we may also be able to get to it via PC relative
3960
+       // addressing.  However, we won't know until the fragment's are placed
3961
+       // together to create this segment.  This will be before writing
3962
+       // the file to disk.
3963
+       //
3964
+       // If the symbol is in the absolute segment, then we should try to
3965
+       // get to it via an absolute 32-bit offset reference--since we don't
3966
+       // know (and won't know until the final link) where we are currently
3967
+       // located within memory.
3968
+       //
3969
+       // The same is true of the undefined segment--we just don't know any
3970
+       // PC offsets to that segment.
3971
+       //
3972
+       // But if the address is to a GOT segment, we should be able to assume
3973
+       // it's offset from the beginning of that segment.
3974
+       //
3975
+       //
3976
+       if ((relax_state)&&(insn->i_rp))
3977
+               sym_defined = S_IS_DEFINED(insn->i_rp->r_sym);
3978
+
3979
+       /*
3980
+       sym_known = (sym_defined)&&
3981
+                       ((S_GET_SEGMENT(sym) == absolute_section)
3982
+                       ||(S_GET_SEGMENT(sym) == expr_section)
3983
+                       ||(this_frag)
3984
+                       ||((this_segment)&&(fragP->fr_address != 0))
3985
+                       );
3986
+       */
3987
+       sym_known = (sym_defined)&&(insn->i_rp->r_pcrel)&&(this_segment);
3988
+       if ((!sym_known)&&(sym_defined)&&(!S_FORCE_RELOC(sym, 0))) {
3989
+               if (this_segment)
3990
+                       sym_known = 1;
3991
+               else if (S_GET_SEGMENT(sym)==absolute_section)
3992
+                       sym_known = 1;
3993
+       }
3994
+#ifdef ZIP_DEBUG
3995
+       if (sym_known)
3996
+               fprintf(stderr, "%08lx@%08lx/%08lx - SYM(%s)-KNOWN %s%s%s%s%s\n",
3997
+                       (unsigned long)fragP->fr_literal,
3998
+                       fragP->fr_address,
3999
+                       (unsigned long)symv, S_GET_NAME(sym),
4000
+                       (S_GET_SEGMENT(sym) == absolute_section)?" abs":"",
4001
+                       (S_GET_SEGMENT(sym) == expr_section)?" expr":"",
4002
+                       (symbol_get_frag(sym)==fragP)?" this-frag ":"",
4003
+                       ((this_segment)&&(fragP->fr_address != 0))?" this-seg ":"",
4004
+                       insn->i_rp->r_pcrel?" (PC-REL)":" (ABS)");
4005
+       else if (insn->i_rp)
4006
+               fprintf(stderr, "%08lx@%08lx/%08lx - SYM(%s) -- not known (yet) %s%s%s%s%s%s\n",
4007
+                       (unsigned long)fragP->fr_literal, fragP->fr_address,
4008
+                       (unsigned long)symv, S_GET_NAME(sym),
4009
+                       (!sym_defined)?"-- not defined":"",
4010
+                       (S_GET_SEGMENT(sym) == absolute_section)?" abs":"",
4011
+                       (S_GET_SEGMENT(sym) == expr_section)?" expr":"",
4012
+                       (symbol_get_frag(sym)==fragP)?" this-frag ":"",
4013
+                       (this_segment)?" this-seg ":"",
4014
+                       ((this_segment)&&(fragP->fr_address != 0))?" this-off ":""
4015
+                       );
4016
+
4017
+       fprintf(stderr, "SYM-DEF %d,%d,%d,%d, IMM = %08x\n",
4018
+               sym_defined, sym_known,
4019
+               (insn->i_rp)&&(symbol_get_frag(insn->i_rp->r_sym)==fragP)?1:0,
4020
+               this_segment, insn->i_imm);
4021
+#endif
4022 209 dgisselq
+       int     rg;
4023
+
4024 202 dgisselq
+       switch(insn->i_op) {
4025
+       case ZIPO_LDI: // May or may not be conditional
4026
+               if ((sym_known)&&(this_segment)
4027 206 dgisselq
+                       &&(fits_within(15,immv+symv-fragP->fr_address-insn->i_rp->r_fr_offset-sizeof(uint32_t)))) {
4028 202 dgisselq
+                       // Turn this into a MOV x(PC),Rx
4029 206 dgisselq
+                       //
4030
+                       // Although moves can normally only handle 13 bits,
4031
+                       // when the immediate is an offset to the PC, the bottom
4032
+                       // two bits are always zero, and so the immediate
4033
+                       // gets an extra two free bits--hence the test for
4034
+                       // fitting into 15 bits above.
4035 202 dgisselq
+                       insn->i_breg = ZIP_PC;
4036
+                       insn->i_op = ZIPO_MOV;
4037
+                       insn->i_naux = 0;
4038
+                       zip_assemble_insn_words(fragP, seg, insn, relax_state,
4039
+                               stretch, pzipm);
4040
+                       // Tested--this works
4041
+                       return;
4042
+               }
4043
+
4044
+               // 0.111.x111.11
4045
+               insn->i_aux[0] = 0x7fc00000; // NOOP -- if never used.
4046
+               immv += symv;
4047 209 dgisselq
+               if ((insn->i_cnd == ZIPC_ALWAYS)
4048
+                       &&(zip_param_cis)
4049
+                       &&(zip_param_use_machine)&&(pzipm)
4050
+                       &&(!fits_within(8,immv))) {
4051
+                       // Convert an LDI instruction to a MOV instruction if
4052
+                       // it would make that instruction CIS-able.
4053
+
4054
+                       if ((rg=zip_findnearreg_machine(pzipm, immv))
4055
+                                       != ZIP_RNONE) {
4056
+                               int     d;
4057
+                               d = immv - pzipm->r[rg].m_value;
4058
+                               if (fits_within(3,d)) {
4059
+                                       insn->i_op = ZIPO_MOV;
4060
+                                       insn->i_breg = rg;
4061
+                                       insn->i_naux = 0;
4062
+                                       insn->i_imm  = d;
4063
+                                       zip_assemble_insn_words(fragP,
4064
+                                               seg, insn, relax_state,
4065
+                                               stretch, pzipm);
4066
+                                       return;
4067
+                               }
4068
+                       }
4069
+               }
4070
+
4071 206 dgisselq
+               if ((!insn->i_rp)&&(insn->i_cnd == ZIPC_ALWAYS)
4072 202 dgisselq
+                               &&(fits_within(23, immv))) {
4073 209 dgisselq
+                       // Can we do this with an ordinary load immediate
4074
+                       // instruction?
4075
+                       //
4076
+                       // If we do this, we'll avoid any opportunity to use
4077
+                       // the ZipMachine and move something into this address
4078 202 dgisselq
+                       insn->i_naux = 0;
4079
+                       insn->i_code = LDIOP(immv,insn->i_areg);
4080
+               } else if (((!insn->i_rp)||(sym_known))
4081
+                               &&(fits_within(18, zip_brev(immv)))) {
4082
+                       // Can we do this with a BREV instruction using an
4083
+                       // immediate?  If so, we can then conditionally load
4084
+                       // the top 18 bist of any value ...
4085
+                       //
4086
+                       insn->i_naux = 0;
4087
+                       insn->i_code = IMMOP(ZIPO_BREV, insn->i_cnd,
4088
+                                       zip_brev(immv),
4089
+                                       insn->i_areg&0x0f);
4090
+                       if (insn->i_rp)
4091
+                               insn->i_rp->r_type = BFD_RELOC_NONE;
4092
+// 0000 1110 0000 0000 0000 0000 0100 0000
4093 209 dgisselq
+               } else if ((zip_param_use_machine)&&(pzipm)
4094
+                       &&((!insn->i_rp)||(sym_known))
4095 202 dgisselq
+                       &&(pzipm->r[insn->i_areg].m_known)
4096
+                       &&(0==((immv^pzipm->r[insn->i_areg].m_value)
4097
+                                       & 0x0ffff0000))) {
4098
+                       // Replace LDI with LDILO
4099
+                       insn->i_naux = 0;
4100
+                       insn->i_code=IMMOP(ZIPO_LDILO, insn->i_cnd,
4101
+                                       (immv&0x0ffff), insn->i_areg);
4102
+
4103
+                       pzipm->r[insn->i_areg].m_value = immv;
4104
+                       if (ZIPC_ALWAYS == insn->i_cnd) {
4105
+                               // Henceforth, we only know the bottom 16bits
4106
+                               // of this register
4107
+                               pzipm->r[insn->i_areg].m_known = MACH_VUPPERKNOWN;
4108
+                       } else
4109
+                               pzipm->r[insn->i_areg].m_known = MACH_VKNOWN;
4110 209 dgisselq
+               } else if ((zip_param_use_machine)&&(pzipm)
4111
+                       &&((!insn->i_rp)||(sym_known))
4112
+                       &&(pzipm->r[insn->i_areg].m_known)
4113
+                       &&((rg=zip_findnearreg_machine(pzipm, immv))!= ZIP_RNONE)
4114
+                       &&(fits_within(13,pzipm->r[rg].m_value - immv))) {
4115
+                               // Replace LDI with a MOV instruction
4116
+                               insn->i_op = ZIPO_MOV;
4117
+                               insn->i_breg = rg;
4118
+                               insn->i_naux = 0;
4119
+                               insn->i_imm  = pzipm->r[rg].m_value - immv;
4120
+                               zip_assemble_insn_words(fragP, seg, insn,
4121
+                                       relax_state, stretch, pzipm);
4122
+                               return;
4123
+               } else if ((zip_param_use_machine)&&(pzipm)
4124
+                       &&((!insn->i_rp)||(sym_known))
4125
+                       &&(pzipm->r[insn->i_areg].m_known)
4126
+                       &&((rg=zip_findnearreg_machine(pzipm, zip_brev(immv)))!= ZIP_RNONE)
4127
+                       &&(fits_within(14,zip_brev(pzipm->r[rg].m_value - immv)))) {
4128
+                               // Replace LDI with a MOV instruction
4129
+                               insn->i_op = ZIPO_BREV;
4130
+                               insn->i_breg = rg;
4131
+                               insn->i_naux = 0;
4132
+                               insn->i_imm  = zip_brev(pzipm->r[rg].m_value - immv);
4133
+                               zip_assemble_insn_words(fragP, seg, insn,
4134
+                                       relax_state, stretch, pzipm);
4135
+                               return;
4136 202 dgisselq
+               } else {
4137
+                       //
4138
+                       // If the symbol isn't defined, then any immv value
4139
+                       // will work--we have to come back anyway.
4140
+                       //
4141 209 dgisselq
+                       // BREV Extension would modify this statement
4142
+                       insn->i_naux = 1;
4143
+                       insn->i_code = IMMOP(ZIPO_BREV, insn->i_cnd,
4144
+                               zip_brev(immv)&0x01ffff, insn->i_areg);
4145
+                       insn->i_aux[0]=IMMOP(ZIPO_LDILO, insn->i_cnd,
4146
+                               (immv&0x0ffff), insn->i_areg);
4147
+                       if (insn->i_rp)
4148
+                               insn->i_rp->r_type = BFD_RELOC_ZIP_LDI;
4149
+                       else if ((zip_param_cis)&&(zip_can_merge(insn->i_code, insn->i_aux[0]))) {
4150
+                               insn->i_code = zip_insn_merge(insn->i_code, insn->i_aux[0]);
4151
+                               insn->i_naux = 0;
4152 202 dgisselq
+                       }
4153
+               }
4154
+#ifdef ZIP_DEBUG
4155
+               fprintf(stderr, "LDI %04x:%04x,%d Instruction assembled into %08x : %08x\n",
4156
+                       (immv>>16)&0x0ffff,
4157
+                       immv & 0x0ffff, insn->i_areg,
4158
+                       insn->i_code, insn->i_aux[0]);
4159
+#endif
4160
+               break;
4161
+       case ZIPO_BRA: // Includes both conditional and unconditional branches
4162
+#ifdef ZIP_DEBUG
4163
+               fprintf(stderr, "ZIPO--BRA (ADDR = %08lx, OFFSET = %08lx)\n",
4164
+                               fragP->fr_address,
4165
+                               (insn->i_rp)?insn->i_rp->r_fr_offset:0);
4166
+#endif
4167
+               if (insn->i_rp)
4168
+                       immv += (int)(symv
4169
+                               - fragP->fr_address
4170
+                               - (insn->i_rp->r_fr_offset+sizeof(uint32_t)));
4171
+
4172
+#ifdef ZIP_DEBUG
4173
+               if (!fits_within(18,immv))
4174
+                       fprintf(stderr, "doesn't fit in 18 bits\n");
4175
+#endif
4176
+               if (zip_param_small) {
4177
+                       //
4178
+                       // We can fit (or so we are told), so short jump code
4179
+                       // to an unknown location ...
4180
+                       //
4181
+                       insn->i_naux = 0;
4182
+                       insn->i_aux[0] = NOOP_OPCODE;
4183
+                       insn->i_aux[1] = NOOP_OPCODE;
4184
+                       insn->i_code = IMMOP(ZIPO_ADD, insn->i_cnd,
4185
+                               immv, ZIP_PC); // Add value to PC
4186
+                       insn->i_rp->r_pcrel = TRUE;
4187
+                       // No relocation is required--we just did it
4188
+                       insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_PCREL;
4189
+                       // Tested--this works
4190
+               } else if ((!sym_known)||(!fits_within(18,immv))) {
4191
+                       insn->i_op = ZIPO_LJMP;
4192
+
4193
+                       zip_assemble_insn_words(fragP, seg, insn, relax_state, stretch, pzipm);
4194
+                       insn->i_op = ZIPO_BRA;
4195
+               } else {
4196
+                       //
4197
+                       // We can fit, so short jump code ...
4198
+                       //
4199
+                       insn->i_naux = 0;
4200
+                       insn->i_aux[0] = NOOP_OPCODE;
4201
+                       insn->i_aux[1] = NOOP_OPCODE;
4202
+                       insn->i_code = IMMOP(ZIPO_ADD, insn->i_cnd,
4203
+                               immv, ZIP_PC); // Add value to PC
4204
+                       insn->i_rp->r_pcrel = TRUE;
4205
+                       // No relocation is required--we just did it
4206
+                       insn->i_rp->r_type = BFD_RELOC_NONE;
4207
+               }
4208
+#ifdef ZIP_DEBUG
4209
+               fprintf(stderr, "BRA %08lx->%08x(%d,%d) assembled into(%d) %08x : %08x : %08x\n",
4210
+                       symv, immv, sym_defined, relax_state,
4211
+                       insn->i_naux, insn->i_code,
4212
+                       insn->i_aux[0], insn->i_aux[1]);
4213
+#endif
4214
+               break;
4215
+       case    ZIPO_LJMP:
4216
+               //
4217
+               // Long jump code
4218
+               //
4219
+               // I expect this to be true, since we should always
4220
+               // be branching (or jumping) to a location defined by a
4221
+               // symbol.
4222
+               if (insn->i_rp) {
4223
+                       insn->i_rp->r_pcrel = FALSE;
4224
+                       insn->i_rp->r_type = BFD_RELOC_ZIP_VALUE;
4225
+               } insn->i_breg = ZIP_RNONE;
4226
+#ifdef ZIP_DEBUG
4227
+               fprintf(stderr, "LJMP IMM = %08x = %d\n", immv, immv);
4228
+#endif
4229
+               if (insn->i_cnd == ZIPC_ALWAYS) {
4230
+                       insn->i_naux = 1;
4231
+                       insn->i_code=DBLREGOP(ZIPO_LW,ZIPC_ALWAYS,
4232
+                               0,ZIP_PC,ZIP_PC); // Load into PC register
4233
+                       insn->i_aux[0] = 0; // Value to load
4234
+               } else {
4235
+                       // A conditional long jump
4236
+                       insn->i_naux = 2;
4237
+                       insn->i_code=DBLREGOP(ZIPO_LW,insn->i_cnd,
4238
+                               1,ZIP_PC,ZIP_PC); // Conditional load to PC
4239
+                       insn->i_aux[0]=IMMOP(ZIPO_ADD,ZIPC_ALWAYS,
4240
+                               1,ZIP_PC); // Skip an instruction
4241
+                       insn->i_aux[1] = 0;
4242
+               } if (!insn->i_rp)
4243
+                       insn->i_aux[insn->i_naux-1] = immv;
4244
+               break;
4245
+       case ZIPO_MOV:
4246
+               //
4247
+               // We could go a little wild here:
4248
+               //      MOV val,Rx
4249
+               // Could be quietly compiled into
4250
+               //      LDI val,Rx      (if Rx is not a user register)
4251
+               // whereas
4252
+               //      MOV BIGVAL(Ry),Rx
4253
+               // could be quietly compiled into
4254
+               //      LDI BIGVAL,Rx
4255
+               //      ADD.Z Ry,Rx     (Note the contortions to avoid adjusting
4256
+               //      ADD.NZ Ry,Rx    ... the flag bits)
4257
+               // This would give us access to full 32-bit offsets ...
4258
+               // as long as neither Rx nor Ry was a user register.  On the
4259
+               // other hand, if we knew the flag bits would be set between
4260
+               // now and the next conditional instruction, we could do a
4261
+               //      LDI BIGVAL,Rx
4262
+               //      ADD Ry,Rx
4263
+               // and be okay with it.
4264
+               //
4265
+               // For now we just handle our normal 13 bit signed immediate
4266
+               //      offsets.
4267
+               //
4268
+               if (insn->i_rp) {
4269
+                       // MOV label(Rb),Ra
4270
+                       insn->i_rp->r_pcrel = (insn->i_breg == ZIP_PC);
4271
+                       immv += symv;
4272
+                       if (insn->i_breg == ZIP_PC) {
4273
+                               immv +=(int)(-fragP->fr_address
4274
+                                               -insn->i_rp->r_fr_offset-sizeof(uint32_t));
4275
+                               immv >>= 2;
4276
+                               if ((sym_known)&&(this_segment)) {
4277
+                                       // Tested--this works
4278
+                                       insn->i_rp->r_type = BFD_RELOC_NONE;
4279
+                               } else {
4280
+#ifdef ZIP_DEBUG
4281
+                                       fprintf(stderr, "ZIP_MOV_PCREL relocation needed for %s, pcrel = %d\n", S_GET_NAME(sym), insn->i_rp->r_pcrel);
4282
+#endif
4283
+                                       insn->i_rp->r_type = BFD_RELOC_ZIP_MOV_PCREL;
4284
+                               }
4285
+
4286
+
4287
+//                     } else if((zip_param_got)&&(insn->i_breg == ZIP_GBL)) {
4288
+//                             immv = symv;
4289
+//                             insn->i_rp->r_type = BFD_RELOC_ZIP_MOV_GOTREL;
4290
+//                             as_bad("MOV x(GOT),Ry not yet implemented");
4291
+                       } else {
4292
+                               // Do we really want to assume this is an
4293
+                               // address?
4294
+                               insn->i_rp->r_type = BFD_RELOC_ZIP_MOV_OFFSET;
4295
+                       }
4296
+               } else if ((zip_param_use_machine)&&(pzipm)
4297
+                               &&(insn->i_breg<ZIP_CC)&&(insn->i_areg<ZIP_CC)
4298
+                               &&(ZIPC_ALWAYS == insn->i_cnd)
4299
+                               &&(pzipm->r[insn->i_breg].m_known==MACH_VKNOWN)
4300
+                               &&(fits_within(4,pzipm->r[insn->i_breg].m_value
4301
+                                       +immv))) {
4302
+                       // MOV Rb,Ra
4303
+                       // turn this into an LDI instruction, rather than a
4304
+                       // move instruction
4305
+                       insn->i_op = ZIPO_LDI;
4306
+                       insn->i_imm += pzipm->r[insn->i_breg].m_value;
4307
+                       insn->i_breg = ZIP_RNONE;
4308
+
4309
+                       insn->i_code = LDIOP(insn->i_imm, insn->i_areg);
4310
+                       insn->i_naux = 0;
4311
+               }
4312
+               /*
4313
+               // Handle offsets greater than 13 bits --- up to 32 bits
4314
+               // Only works if we have no symbol in question, and when the
4315
+               // target isn't the PC register (or CC for that matter).
4316
+               else if ((!fits_within(13,insn->i_imm))
4317
+                               &&(insn->i_areg < ZIP_CC)
4318
+                               &&(insn->i_breg < ZIP_CC)) {
4319
+                       // Alternate instruction sequence:
4320
+                       //      but .... these make conditional insns from
4321
+                       //              unconditional!!
4322
+                       //      MOV.always A,Rx -> LDI A,Rx
4323
+                       //      MOV.always A(Ry),Rx -> LDI A,Rx, ADD Ry,Rx
4324
+                       // this works for conditional moves, since ADD.C
4325
+                       // doesn't set conditions
4326
+                       //      MOV.C A(Ry),Rx -> LDI.C A,Rx, ADD.C Ry,Rx
4327
+
4328
+                       return;
4329
+               }
4330
+               */
4331
+
4332
+               if (insn->i_op == ZIPO_MOV) { // If we haven't changed insns,
4333
+                       gas_assert(fits_within(13, insn->i_imm));
4334
+                       insn->i_code = SMPLMOV(insn->i_cnd, immv, insn->i_breg,
4335
+                                       insn->i_areg);
4336
+                       //
4337
+                       // Now for the extra two register bits only present
4338
+                       // in move instructions
4339
+                       //
4340
+                       insn->i_code |= (insn->i_areg&0x10)?0x40000:0;
4341
+                       insn->i_code |= (insn->i_breg&0x10)?0x02000:0;
4342
+               }
4343
+#ifdef ZIP_DEBUG
4344
+               fprintf(stderr, "MOV Instruction assembled into %08x\n", insn->i_code);
4345
+#endif
4346
+               break;
4347
+       case ZIPO_NEG:
4348
+               insn->i_naux = 1;
4349
+               if (insn->i_rp)
4350
+                       as_bad("NEG cannot handle symbols");
4351
+               gas_assert(fits_within(13, -1+insn->i_imm));
4352
+               insn->i_code = SMPLMOV(insn->i_cnd,
4353
+                       (-1+immv), insn->i_breg, insn->i_areg);
4354
+               insn->i_code &= 0xfffbdfff;
4355
+               insn->i_aux[0] = IMMOP(ZIPO_XOR, insn->i_cnd, -1,
4356
+                       insn->i_areg);
4357
+               // printf("NEG Instruction assembled into %08x:%08x\n",
4358
+                       // insn->i_code, insn->i_aux[0]);
4359
+               break;
4360
+       case ZIPO_BREAK: case ZIPO_LOCK: case ZIPO_SIM: case ZIPO_NOOP:
4361
+               if (insn->i_cnd != ZIPC_ALWAYS)
4362
+                       as_bad("NOOP/BREAK/LOCK/SIM instructions cannot handle conditions\n");
4363
+               insn->i_code = NOOPGROUP(insn->i_op, insn->i_imm);
4364
+               insn->i_naux = 0;
4365
+               break;
4366
+       case    ZIPO_SDUMP: case ZIPO_NDUMP: case ZIPO_SEXIT: case ZIPO_NEXIT:
4367
+       case    ZIPO_SOUT:  case ZIPO_NOUT:
4368
+               // These instructions *should*ve been turned into NOOP and SIM
4369
+               // instructions by now.  Getting here with them is therefore
4370
+               // an error.
4371
+               gas_assert(0);
4372
+       case ZIPO_SEXTB: {
4373
+               insn->i_naux = 1;
4374
+               insn->i_code   = IMMOP(ZIPO_LSL, insn->i_cnd, 24, insn->i_areg);
4375
+               insn->i_aux[0] = IMMOP(ZIPO_ASR, insn->i_cnd, 24, insn->i_areg);
4376
+               } break;
4377
+       case ZIPO_SEXTH: {
4378
+               insn->i_naux = 1;
4379
+               insn->i_code   = IMMOP(ZIPO_LSL, insn->i_cnd, 16, insn->i_areg);
4380
+               insn->i_aux[0] = IMMOP(ZIPO_ASR, insn->i_cnd, 16, insn->i_areg);
4381
+               } break;
4382
+       case ZIPO_JSR:
4383
+               if ((zip_param_cis)&&(insn->i_cnd == ZIPC_ALWAYS)
4384
+                               &&(insn->i_rp)) {
4385
+                       insn->i_op = ZIPO_LJSR;
4386
+                       zip_assemble_insn_words(fragP, seg, insn, relax_state, stretch, pzipm);
4387
+                       insn->i_op = ZIPO_JSR;
4388
+               } else if ((zip_param_cis)&&(insn->i_cnd == ZIPC_ALWAYS)
4389
+                               &&(insn->i_breg != ZIP_RNONE)
4390
+                               &&(insn->i_imm == 0)) {
4391
+                       // JSR (Register)
4392
+                       insn->i_naux = 0;
4393
+                       insn->i_code = 0x80008000
4394
+                               | (ZIPV_MOV<<24)
4395
+                               | 0x00f90000    // MOV OpB = PC+1
4396
+                               | 0x0f880       // MOV into PC
4397
+                               | ((insn->i_breg&0x0f)<<3)
4398
+                               | (ZIPV_MOV << 8); // The LW instruction
4399
+
4400
+                       gas_assert(!insn->i_rp);
4401
+               } else if ((!insn->i_rp)&&(insn->i_breg != ZIP_RNONE)) {
4402
+                       gas_assert(fits_within(13,immv));
4403
+                       // JSR offset+register, implemented as two moves
4404
+                       insn->i_naux = 1;
4405
+                       insn->i_code = SMPLMOV(insn->i_cnd, 1, ZIP_PC, ZIP_LR);
4406
+                       insn->i_aux[0] = SMPLMOV(insn->i_cnd, immv, insn->i_breg, ZIP_PC);
4407
+                       insn->i_aux[1] = NOOP_OPCODE;
4408
+               } else {
4409
+                       if (insn->i_rp)
4410
+                               immv += (int)(symv
4411
+                                       - fragP->fr_address
4412
+                                       - (insn->i_rp->r_fr_offset+sizeof(uint32_t)));
4413
+                       if ((zip_param_small)||((sym_known)&&(fits_within(18,immv-4)))) {
4414
+                               // MOV.C 1(PC),R0
4415
+                               // BRA.C _somewhere_
4416
+                               insn->i_naux = 1;
4417
+                               insn->i_code = SMPLMOV(insn->i_cnd, 1, ZIP_PC,
4418
+                                       ZIP_LR);
4419
+                               // Bias the branch by -4, since we're one word
4420
+                               // into this instruction
4421
+                               insn->i_aux[0] = IMMOP(ZIPO_ADD, insn->i_cnd,
4422
+                                       immv-4, ZIP_PC);
4423
+                               insn->i_aux[1] = NOOP_OPCODE;
4424
+                               insn->i_rp->r_pcrel = TRUE;
4425
+                               insn->i_rp->r_type = BFD_RELOC_NONE;
4426
+                       } else {
4427
+                               // If all else fails, call for a long JSR
4428
+                               insn->i_op = ZIPO_LJSR;
4429
+                               zip_assemble_insn_words(fragP, seg, insn,
4430
+                                       relax_state, stretch, pzipm);
4431
+                               insn->i_op = ZIPO_JSR;
4432
+                       }
4433
+               } break;
4434
+       case ZIPO_LJSR:
4435
+               if (insn->i_rp)
4436
+                       immv += (int)(symv
4437
+                               - fragP->fr_address
4438
+                               - (insn->i_rp->r_fr_offset+sizeof(uint32_t)));
4439
+               if (insn->i_rp) {
4440
+                       insn->i_rp->r_pcrel = FALSE;
4441
+                       insn->i_rp->r_type = BFD_RELOC_ZIP_VALUE;
4442
+               } insn->i_breg = ZIP_RNONE;
4443
+               if (insn->i_cnd == ZIPC_ALWAYS) {
4444
+                       if (zip_param_cis) {
4445
+                               insn->i_naux = 1;
4446
+                               insn->i_code = 0x80008000
4447
+                                       | (ZIPV_MOV<<24)
4448
+                                       | 0x00fa0000    // MOV OpB = PC+2
4449
+                                       | 0x0f8f8       // (LW) into PC
4450
+                                       | (ZIPV_LW << 8); // The LW instruction
4451
+                               insn->i_aux[0] = 0; // To be filled in with address value
4452
+                       } else { // If unconditional
4453
+                               // MOV 1(PC),R0
4454
+                               // LW (PC),PC
4455
+                               // _somewhere_
4456
+                               insn->i_naux = 2;
4457
+                               insn->i_code = SMPLMOV(insn->i_cnd, 2, ZIP_PC,
4458
+                                       ZIP_LR);
4459
+                               insn->i_aux[0] = DBLREGOP(ZIPO_LW,ZIPC_ALWAYS,
4460
+                                       0,ZIP_PC,ZIP_PC); // Load into PC register
4461
+                               insn->i_aux[1] = 0;
4462
+                       }
4463
+               } else {
4464
+                       // If conditional, naux = 3
4465
+                       // BRA.!cnd (for whatever condition) +3
4466
+                       // MOV 4(PC),R0
4467
+                       // LW (PC),PC
4468
+                       // address
4469
+                       insn->i_naux = 3;
4470
+                       insn->i_aux[2] = 0;
4471
+                       if (insn->i_cnd != ZIPC_V) {
4472
+                               ZIP_CONDITION cnd =
4473
+                                       zip_negate_condition(insn->i_cnd);
4474
+                               insn->i_code = IMMOP(ZIPO_ADD, cnd, 12, ZIP_PC);
4475
+                               insn->i_aux[0] = SMPLMOV(ZIPC_ALWAYS, 2, ZIP_PC,
4476
+                                       ZIP_LR);
4477
+                               insn->i_aux[1] = DBLREGOP(ZIPO_LW, ZIPC_ALWAYS,
4478
+                                       0,ZIP_PC,ZIP_PC); // Load into PC register
4479
+                       } else {
4480
+                               insn->i_code = SMPLMOV(ZIPC_V, 3, ZIP_PC,
4481
+                                       ZIP_LR);
4482
+                               insn->i_aux[0] = DBLREGOP(ZIPO_LW, ZIPC_V,
4483
+                                       0,ZIP_PC,ZIP_PC); // Load into PC register
4484
+                               insn->i_aux[1] = IMMOP(ZIPO_ADD, ZIPC_ALWAYS, 4, ZIP_PC);
4485
+                       }
4486
+               } if (!insn->i_rp)
4487
+                       insn->i_aux[insn->i_naux-1] = immv;
4488
+               break;
4489
+       default:
4490
+               if (insn->i_rp) {
4491
+                       insn->i_rp->r_pcrel = FALSE;
4492
+                       immv += symv;
4493
+                       if (insn->i_breg == ZIP_PC) {
4494
+                               immv+=(int)(-fragP->fr_address
4495
+                                               -insn->i_rp->r_fr_offset-sizeof(uint32_t));
4496
+                               insn->i_rp->r_pcrel= TRUE;
4497
+                               insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_PCREL;
4498
+                               if ((sym_known)&&(this_segment))
4499
+                                       insn->i_rp->r_type = BFD_RELOC_NONE;
4500
+//                     } else if((zip_param_got)&&(insn->i_breg == ZIP_GBL)) {
4501
+//                             as_bad("<OP> x(GOT),Ry not yet implemented");
4502
+//                             immv += symv;
4503
+//                             insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_GOTREL;
4504
+                       } else {
4505
+                               // Do we really want to assume this is an
4506
+                               // address?
4507
+                               immv += symv;
4508
+                               insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_OFFSET;
4509
+                       }
4510
+               } if (insn->i_breg != ZIP_RNONE) {
4511
+                       if (insn->i_breg == ZIP_PC)
4512
+                               immv >>= 2;
4513
+                       if (!fits_within(14, insn->i_imm)) {
4514
+                               fprintf(stderr, "ERR: (%d) 0x%08x does not fit within 18 bits!\n", insn->i_imm, insn->i_imm);
4515
+                               gas_assert(fits_within(14, insn->i_imm));
4516
+                       }
4517
+                       insn->i_code = DBLREGOP(insn->i_op, insn->i_cnd,
4518
+                               immv, insn->i_breg, insn->i_areg);
4519
+                       if (insn->i_rp) {
4520
+                               if (insn->i_breg == ZIP_PC) {
4521
+                                       insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_PCREL;
4522
+                                       insn->i_rp->r_pcrel = TRUE;
4523
+//                             } else if((zip_param_got)&&(insn->i_breg == ZIP_GBL)) {
4524
+//                                     insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_GOTREL;
4525
+                               } else
4526
+                                       insn->i_rp->r_type = BFD_RELOC_ZIP_OPB_OFFSET;
4527
+                       }
4528
+               } else {
4529
+                       if (!fits_within(18, insn->i_imm)) {
4530
+                               fprintf(stderr, "ERR: (%d) 0x%08x does not fit within 18 bits!\n", insn->i_imm, insn->i_imm);
4531
+                               gas_assert(fits_within(18, insn->i_imm));
4532
+                       }
4533
+                       insn->i_code = IMMOP(insn->i_op, insn->i_cnd,
4534
+                               immv, insn->i_areg);
4535
+                       if (insn->i_rp)
4536
+                               insn->i_rp->r_type  = BFD_RELOC_ZIP_OPB_IMM;
4537
+               }
4538
+#ifdef ZIP_DEBUG
4539
+               fprintf(stderr, "Instruction assembled into %08x%s\n", insn->i_code,
4540
+                       (insn->i_rp)?" w/ Symbol":"");
4541
+#endif
4542
+               break;
4543
+       }
4544
+}
4545
+
4546
+void
4547
+md_assemble(char *line) {
4548
+       const char *linep;
4549
+       char    *p;
4550
+
4551
+       linep = (char *)zip_skip_white_spaces(line);
4552
+       if ((strncasecmp(linep, "nstr", 4)==0)
4553
+               ||(strncasecmp(linep, "sstr", 4)==0)) {
4554
+               uint32_t        base;
4555
+               const char      *sbeg;
4556
+
4557
+               if ((linep[0] =='n')||(linep[0] == 'N'))
4558
+                       base = 0x0400 + NOOP_OPCODE;
4559
+               else
4560
+                       base = 0x0400 + SIM_OPCODE;
4561
+
4562
+               sbeg = strchr(line, '\"');
4563
+               if (!sbeg)
4564
+                       as_bad("String instruction with no quotes found");
4565
+               sbeg++;
4566
+               while(*sbeg != '\"') {
4567
+                       unsigned v = *sbeg++;
4568
+                       if (v == '\\') {
4569
+                               switch(*sbeg++) {
4570
+                               case 'a':       v = '\a'; break;
4571
+                               case 'b':       v = '\b'; break;
4572
+                               case 'f':       v = '\f'; break;
4573
+                               case 'n':       v = '\n'; break;
4574
+                               case 'r':       v = '\r'; break;
4575
+                               case 't':       v = '\t'; break;
4576
+                               case '\\':      v = '\\'; break;
4577
+                               case '\"':      v = '\"'; break;
4578
+                               case '\'':      v = '\''; break;
4579
+                               default: sbeg--;
4580
+                               }
4581
+                       }
4582
+                       p = frag_more(sizeof(uint32_t));
4583
+                       md_number_to_chars(p,base+(v&0x0ff),sizeof(uint32_t));
4584
+               }
4585
+
4586
+               return;
4587
+       }
4588
+
4589
+
4590
+       // Decode an instruction from op_str
4591
+       //      Determine the opcode
4592
+       //              any conditions
4593
+       //              the result register
4594
+       //              any immediate
4595
+       //              any "B" register
4596
+       ZIPIS   insnv, *insn = &insnv;
4597
+       const char *error = zip_parse(line, insn);
4598
+
4599
+#ifdef ZIP_DEBUG
4600
+       fprintf(stderr, "ZIP-ASSEMBLE %s\n", line);
4601
+#endif
4602
+
4603
+       if (error) {
4604
+               as_bad("%s \'%s\'", error, line);
4605
+               return;
4606
+       }
4607
+
4608
+       zip_assemble_insn_words(frag_now, now_seg, insn, 0, 0, &zipm);
4609
+       if (zip_param_use_machine)
4610
+               zip_advance_machine(&zipm, insn);
4611
+#ifdef ZIP_DEBUG
4612
+       zip_debug_machine(&zipm);
4613
+#endif
4614
+
4615
+       // Then, if the instruction is valid we ...
4616
+       //      for branches ...
4617
+       //        symbolS *symp = reloc->reloc_expression.X_add_symbol;
4618
+       //        offsetT offset = reloc->reloc_expression.X_add_number;
4619
+       //        char *f;
4620
+       //        f = frag_var(?, 4, 4, BRANCH_SUBTYPE, symp, offset, NULL);
4621
+       //        md_number_to_chars(f, insn->insn_code, 4); // ???
4622
+       //
4623
+       //
4624
+       if ((!insn->i_rp)&&(cis_mergable)&&(insn->i_naux == 0)
4625
+                       &&(frag_now_fix_octets()>=4)) {
4626
+               // ZIPI lcode = md_number_from_chars(p, 4);
4627
+               unsigned int    last_iword;
4628
+               char    *buf;
4629
+
4630
+               buf = &frag_now->fr_literal[frag_now_fix_octets() - 4];
4631
+               last_iword = (buf[3]&0x0ff)|((buf[2]&0x0ff)<<8)
4632
+                       |((buf[1]&0x0ff)<<16)|((buf[0]&0x0ff)<<24);
4633
+               if ((buf >= frag_now->fr_literal)
4634
+                               &&(zip_can_merge(last_iword,insn->i_code))) {
4635
+                       p = buf;
4636
+                       insn->i_code =zip_insn_merge(last_iword, insn->i_code);
4637
+                       md_number_to_chars(p, insn->i_code, sizeof(uint32_t));
4638
+               } else {
4639
+                       p = frag_more(sizeof(uint32_t)*(1+insn->i_naux));
4640
+                       md_number_to_chars(p, insn->i_code, sizeof(uint32_t));
4641
+               }
4642
+       } else {
4643
+               int     i;
4644
+               ZIPRELOC        *rp = insn->i_rp;
4645
+
4646
+               if ((insn->i_naux == 0)||(NULL == insn->i_rp)) {
4647
+                       // If we have no need of any symbols, we come here.
4648
+                       // If we have no need of any extra 4-byte instructions,
4649
+                       // we come here.
4650
+                       p = frag_more(sizeof(uint32_t)*(1+insn->i_naux));
4651
+
4652
+                       if (insn->i_rp) {
4653
+                               // Generate a fixup for when we finally
4654
+                               // know where this symbol links to
4655
+                               insn->i_rp->r_fr_offset =
4656
+                                       (p - frag_now->fr_literal);
4657
+                               insn->i_rp->r_fix = fix_new(frag_now,
4658
+                                       insn->i_rp->r_fr_offset, // where w/in frag?
4659
+                                       4,              // 1,2, or 4 usually ... ??
4660
+                                       insn->i_rp->r_sym, // Add symbol,
4661
+                                       insn->i_imm, // Fixed/known offset to the symbol
4662
+                                       insn->i_rp->r_pcrel, // T if PC-Relative reloc
4663
+                                       insn->i_rp->r_type); // Reloc type
4664
+                               insn->i_rp = NULL;
4665
+                       }
4666
+               } else {
4667
+                       // First, grow our fragment so we know we have the
4668
+                       // size we'll need.
4669
+                       frag_grow(sizeof(uint32_t)*(1+insn->i_naux));
4670
+
4671
+                       // Then p, the place where we'd get more from, is
4672
+                       // where our instruction will be installed.  We know
4673
+                       // there's room for it there now.
4674
+                       p = frag_more(0);
4675
+                       // Record where in the frag our relaxable instruction
4676
+                       // will be installed
4677
+                       insn->i_rp->r_fr_offset = ( p - frag_now->fr_literal );
4678
+                       // Now tell the assembler about what we've done.
4679
+                       // This'll close off the frag as well, so this is the
4680
+                       // last we'll see of this frag--even though frag_now
4681
+                       // may yet point to it (or not) for a while.
4682
+                       frag_var(rs_machine_dependent, // Relaxation type
4683
+                               sizeof(uint32_t)*(1+insn->i_naux),
4684
+                               sizeof(uint32_t)*(1+insn->i_naux),
4685
+                               rs_machine_dependent,   // Subtype
4686
+                               insn->i_rp->r_sym,      // Symbol
4687
+                               insn->i_imm,    // Offset (to be added to symbol)
4688
+                               (char *)zip_copy_insn(insn));   // Opcode
4689