OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

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[/] [zipcpu/] [trunk/] [sw/] [gcc-zippatch.patch] - Blame information for rev 103

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Line No. Rev Author Line
1 102 dgisselq
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/config.sub gcc-5.3.0-zip/config.sub
2
--- gcc-5.3.0-original/config.sub       2015-01-02 04:30:21.000000000 -0500
3
+++ gcc-5.3.0-zip/config.sub    2016-01-30 12:27:56.023073747 -0500
4
@@ -316,7 +316,7 @@
5
        | visium \
6
        | we32k \
7
        | x86 | xc16x | xstormy16 | xtensa \
8
-       | z8k | z80)
9
+       | z8k | z80 | zip)
10
                basic_machine=$basic_machine-unknown
11
                ;;
12
        c54x)
13
@@ -1547,6 +1547,9 @@
14
 # system, and we'll never get to this point.
15
 
16
 case $basic_machine in
17
+       zip-*)
18
+               os=-elf
19
+               ;;
20
        score-*)
21
                os=-elf
22
                ;;
23
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure gcc-5.3.0-zip/configure
24
--- gcc-5.3.0-original/configure        2015-05-03 13:29:57.000000000 -0400
25
+++ gcc-5.3.0-zip/configure     2016-01-30 16:19:48.264867231 -0500
26
@@ -3927,6 +3927,8 @@
27
   vax-*-*)
28
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
29
     ;;
30
+  zip*)
31
+    noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"
32
 esac
33
 
34
 # If we aren't building newlib, then don't build libgloss, since libgloss
35
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/configure.ac gcc-5.3.0-zip/configure.ac
36
--- gcc-5.3.0-original/configure.ac     2015-05-03 13:29:57.000000000 -0400
37
+++ gcc-5.3.0-zip/configure.ac  2016-02-12 10:47:23.847194843 -0500
38
@@ -1274,6 +1274,10 @@
39
   vax-*-*)
40
     noconfigdirs="$noconfigdirs target-newlib target-libgloss"
41
     ;;
42
+  zip*)
43
+    noconfigdirs="$noconfigdirs target-libffi target-boehm-gc gdb gprof"
44
+    unsupported_languages="$unsupported_languages fortran java"
45
+    ;;
46
 esac
47
 
48
 # If we aren't building newlib, then don't build libgloss, since libgloss
49
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/common/config/zip/zip-common.c gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c
50
--- gcc-5.3.0-original/gcc/common/config/zip/zip-common.c       1969-12-31 19:00:00.000000000 -0500
51
+++ gcc-5.3.0-zip/gcc/common/config/zip/zip-common.c    2016-02-14 00:54:31.821055716 -0500
52
@@ -0,0 +1,52 @@
53
+////////////////////////////////////////////////////////////////////////////////
54
+//
55
+// Filename:   common/config/zip/zip-common.c
56
+//
57
+// Project:    Zip CPU backend for the GNU Compiler Collection
58
+//
59
+// Purpose:    To eliminate the frame register automatically.
60
+//
61
+// Creator:    Dan Gisselquist, Ph.D.
62
+//             Gisselquist Technology, LLC
63
+//
64
+////////////////////////////////////////////////////////////////////////////////
65
+//
66
+// Copyright (C) 2016, Gisselquist Technology, LLC
67
+//
68
+// This program is free software (firmware): you can redistribute it and/or
69
+// modify it under the terms of  the GNU General Public License as published
70
+// by the Free Software Foundation, either version 3 of the License, or (at
71
+// your option) any later version.
72
+//
73
+// This program is distributed in the hope that it will be useful, but WITHOUT
74
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
75
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
76
+// for more details.
77
+//
78
+// You should have received a copy of the GNU General Public License along
79
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
80
+// target there if the PDF file isn't present.)  If not, see
81
+// <http://www.gnu.org/licenses/> for a copy.
82
+//
83
+// License:    GPL, v3, as defined and found on www.gnu.org,
84
+//             http://www.gnu.org/licenses/gpl.html
85
+//
86
+//
87
+////////////////////////////////////////////////////////////////////////////////
88
+#include "config.h"
89
+#include "system.h"
90
+#include "coretypes.h"
91
+#include "tm.h"
92
+#include "common/common-target.h"
93
+#include "common/common-target-def.h"
94
+
95
+static const struct default_options zip_option_optimization_table[] =
96
+  {
97
+    { OPT_LEVELS_1_PLUS, OPT_fomit_frame_pointer, NULL, 1 },
98
+    { OPT_LEVELS_NONE, 0, NULL, 0 }
99
+  };
100
+
101
+#undef TARGET_OPTION_OPTIMIZATION_TABLE
102
+#define        TARGET_OPTION_OPTIMIZATION_TABLE        zip_option_optimization_table
103
+
104
+struct gcc_targetm_common      targetm_common = TARGETM_COMMON_INITIALIZER;
105
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h
106 103 dgisselq
--- gcc-5.3.0-original/gcc/config/aarch64/aarch64-linux.h       2016-03-08 04:57:02.962902614 -0500
107 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/aarch64/aarch64-linux.h    2015-07-24 12:00:26.000000000 -0400
108
@@ -21,7 +21,7 @@
109
 #ifndef GCC_AARCH64_LINUX_H
110
 #define GCC_AARCH64_LINUX_H
111
 
112
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
113
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-aarch64%{mbig-endian:_be}%{mabi=ilp32:_ilp32}.so.1"
114
 
115
 #undef  ASAN_CC1_SPEC
116
 #define ASAN_CC1_SPEC "%{%:sanitize(address):-funwind-tables}"
117
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/alpha/linux-elf.h gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h
118 103 dgisselq
--- gcc-5.3.0-original/gcc/config/alpha/linux-elf.h     2016-03-08 04:57:02.962902614 -0500
119 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/alpha/linux-elf.h  2015-01-05 07:33:28.000000000 -0500
120
@@ -23,8 +23,8 @@
121
 #define EXTRA_SPECS \
122
 { "elf_dynamic_linker", ELF_DYNAMIC_LINKER },
123
 
124
-#define GLIBC_DYNAMIC_LINKER   "/tools/lib/ld-linux.so.2"
125
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
126
+#define GLIBC_DYNAMIC_LINKER   "/lib/ld-linux.so.2"
127
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
128
 #if DEFAULT_LIBC == LIBC_UCLIBC
129
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
130
 #elif DEFAULT_LIBC == LIBC_GLIBC
131
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-eabi.h gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h
132 103 dgisselq
--- gcc-5.3.0-original/gcc/config/arm/linux-eabi.h      2016-03-08 04:57:02.962902614 -0500
133 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/arm/linux-eabi.h   2015-01-05 07:33:28.000000000 -0500
134
@@ -68,8 +68,8 @@
135
    GLIBC_DYNAMIC_LINKER_DEFAULT and TARGET_DEFAULT_FLOAT_ABI.  */
136
 
137
 #undef  GLIBC_DYNAMIC_LINKER
138
-#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/tools/lib/ld-linux.so.3"
139
-#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/tools/lib/ld-linux-armhf.so.3"
140
+#define GLIBC_DYNAMIC_LINKER_SOFT_FLOAT "/lib/ld-linux.so.3"
141
+#define GLIBC_DYNAMIC_LINKER_HARD_FLOAT "/lib/ld-linux-armhf.so.3"
142
 #define GLIBC_DYNAMIC_LINKER_DEFAULT GLIBC_DYNAMIC_LINKER_SOFT_FLOAT
143
 
144
 #define GLIBC_DYNAMIC_LINKER \
145
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/arm/linux-elf.h gcc-5.3.0-zip/gcc/config/arm/linux-elf.h
146 103 dgisselq
--- gcc-5.3.0-original/gcc/config/arm/linux-elf.h       2016-03-08 04:57:02.962902614 -0500
147 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/arm/linux-elf.h    2015-06-23 05:26:54.000000000 -0400
148
@@ -62,7 +62,7 @@
149
 
150
 #define LIBGCC_SPEC "%{mfloat-abi=soft*:-lfloat} -lgcc"
151
 
152
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
153
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
154
 
155
 #define LINUX_TARGET_LINK_SPEC  "%{h*} \
156
    %{static:-Bstatic} \
157
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/bfin/linux.h gcc-5.3.0-zip/gcc/config/bfin/linux.h
158 103 dgisselq
--- gcc-5.3.0-original/gcc/config/bfin/linux.h  2016-03-08 04:57:02.962902614 -0500
159 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/bfin/linux.h       2015-01-05 07:33:28.000000000 -0500
160
@@ -45,7 +45,7 @@
161
   %{shared:-G -Bdynamic} \
162
   %{!shared: %{!static: \
163
    %{rdynamic:-export-dynamic} \
164
-   -dynamic-linker /tools/lib/ld-uClibc.so.0} \
165
+   -dynamic-linker /lib/ld-uClibc.so.0} \
166
    %{static}} -init __init -fini __fini"
167
 
168
 #undef TARGET_SUPPORTS_SYNC_CALLS
169
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/cris/linux.h gcc-5.3.0-zip/gcc/config/cris/linux.h
170 103 dgisselq
--- gcc-5.3.0-original/gcc/config/cris/linux.h  2016-03-08 04:57:02.962902614 -0500
171 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/cris/linux.h       2015-01-05 07:33:28.000000000 -0500
172
@@ -102,7 +102,7 @@
173
 #undef CRIS_DEFAULT_CPU_VERSION
174
 #define CRIS_DEFAULT_CPU_VERSION CRIS_CPU_NG
175
 
176
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
177
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
178
 
179
 #undef CRIS_LINK_SUBTARGET_SPEC
180
 #define CRIS_LINK_SUBTARGET_SPEC \
181
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/freebsd-spec.h gcc-5.3.0-zip/gcc/config/freebsd-spec.h
182 103 dgisselq
--- gcc-5.3.0-original/gcc/config/freebsd-spec.h        2016-03-08 04:57:02.962902614 -0500
183 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/freebsd-spec.h     2015-06-25 13:53:14.000000000 -0400
184
@@ -129,9 +129,9 @@
185
 #endif
186
 
187
 #if FBSD_MAJOR < 6
188
-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
189
+#define FBSD_DYNAMIC_LINKER "/usr/libexec/ld-elf.so.1"
190
 #else
191
-#define FBSD_DYNAMIC_LINKER "/tools/libexec/ld-elf.so.1"
192
+#define FBSD_DYNAMIC_LINKER "/libexec/ld-elf.so.1"
193
 #endif
194
 
195
 /* NOTE: The freebsd-spec.h header is included also for various
196
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/frv/linux.h gcc-5.3.0-zip/gcc/config/frv/linux.h
197 103 dgisselq
--- gcc-5.3.0-original/gcc/config/frv/linux.h   2016-03-08 04:57:02.962902614 -0500
198 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/frv/linux.h        2015-01-05 07:33:28.000000000 -0500
199
@@ -34,7 +34,7 @@
200
 #define ENDFILE_SPEC \
201
   "%{shared|pie:crtendS.o%s;:crtend.o%s} crtn.o%s"
202
 
203
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
204
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
205
 
206
 #undef LINK_SPEC
207
 #define LINK_SPEC "\
208
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/gnu.h gcc-5.3.0-zip/gcc/config/i386/gnu.h
209 103 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/gnu.h    2016-03-08 04:57:02.962902614 -0500
210 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/gnu.h 2015-01-05 07:33:28.000000000 -0500
211
@@ -22,7 +22,7 @@
212
 #define GNU_USER_LINK_EMULATION "elf_i386"
213
 
214
 #undef GNU_USER_DYNAMIC_LINKER
215
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so"
216
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so"
217
 
218
 #undef STARTFILE_SPEC
219
 #if defined HAVE_LD_PIE
220
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h
221 103 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu64.h 2016-03-08 04:57:02.962902614 -0500
222 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu64.h      2015-01-05 07:33:28.000000000 -0500
223
@@ -22,6 +22,6 @@
224
 #define GNU_USER_LINK_EMULATION64 "elf_x86_64_fbsd"
225
 #define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64_fbsd"
226
 
227
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
228
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld-kfreebsd-x86-64.so.1"
229
-#define GLIBC_DYNAMIC_LINKERX32 "/tools/lib/ld-kfreebsd-x32.so.1"
230
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
231
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld-kfreebsd-x86-64.so.1"
232
+#define GLIBC_DYNAMIC_LINKERX32 "/lib/ld-kfreebsd-x32.so.1"
233
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h
234 103 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/kfreebsd-gnu.h   2016-03-08 04:57:02.962902614 -0500
235 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/kfreebsd-gnu.h        2015-01-05 07:33:28.000000000 -0500
236
@@ -19,4 +19,4 @@
237
 <http://www.gnu.org/licenses/>.  */
238
 
239
 #define GNU_USER_LINK_EMULATION "elf_i386_fbsd"
240
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
241
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
242
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux64.h gcc-5.3.0-zip/gcc/config/i386/linux64.h
243 103 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/linux64.h        2016-03-08 04:57:02.962902614 -0500
244 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/linux64.h     2015-01-05 07:33:28.000000000 -0500
245
@@ -27,6 +27,6 @@
246
 #define GNU_USER_LINK_EMULATION64 "elf_x86_64"
247
 #define GNU_USER_LINK_EMULATIONX32 "elf32_x86_64"
248
 
249
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-linux.so.2"
250
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib64/ld-linux-x86-64.so.2"
251
-#define GLIBC_DYNAMIC_LINKERX32 "/tools/libx32/ld-linux-x32.so.2"
252
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
253
+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux-x86-64.so.2"
254
+#define GLIBC_DYNAMIC_LINKERX32 "/libx32/ld-linux-x32.so.2"
255
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/i386/linux.h gcc-5.3.0-zip/gcc/config/i386/linux.h
256 103 dgisselq
--- gcc-5.3.0-original/gcc/config/i386/linux.h  2016-03-08 04:57:02.962902614 -0500
257 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/i386/linux.h       2015-01-05 07:33:28.000000000 -0500
258
@@ -20,4 +20,4 @@
259
 <http://www.gnu.org/licenses/>.  */
260
 
261
 #define GNU_USER_LINK_EMULATION "elf_i386"
262
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
263
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
264
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/ia64/linux.h gcc-5.3.0-zip/gcc/config/ia64/linux.h
265 103 dgisselq
--- gcc-5.3.0-original/gcc/config/ia64/linux.h  2016-03-08 04:57:02.962902614 -0500
266 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/ia64/linux.h       2015-01-05 07:33:28.000000000 -0500
267
@@ -55,7 +55,7 @@
268
 /* Define this for shared library support because it isn't in the main
269
    linux.h file.  */
270
 
271
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux-ia64.so.2"
272
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux-ia64.so.2"
273
 
274
 #undef LINK_SPEC
275
 #define LINK_SPEC "\
276
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/knetbsd-gnu.h gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h
277 103 dgisselq
--- gcc-5.3.0-original/gcc/config/knetbsd-gnu.h 2016-03-08 04:57:02.962902614 -0500
278 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/knetbsd-gnu.h      2015-01-05 07:33:28.000000000 -0500
279
@@ -32,4 +32,4 @@
280
 
281
 
282
 #undef GNU_USER_DYNAMIC_LINKER
283
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"
284
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
285
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h
286 103 dgisselq
--- gcc-5.3.0-original/gcc/config/kopensolaris-gnu.h    2016-03-08 04:57:02.962902614 -0500
287 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/kopensolaris-gnu.h 2015-01-05 07:33:28.000000000 -0500
288
@@ -31,5 +31,4 @@
289
   while (0)
290
 
291
 #undef GNU_USER_DYNAMIC_LINKER
292
-#define GNU_USER_DYNAMIC_LINKER "/tools/lib/ld.so.1"
293
-
294
+#define GNU_USER_DYNAMIC_LINKER "/lib/ld.so.1"
295
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/linux.h gcc-5.3.0-zip/gcc/config/linux.h
296 103 dgisselq
--- gcc-5.3.0-original/gcc/config/linux.h       2016-03-08 04:57:02.962902614 -0500
297 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/linux.h    2015-01-05 07:33:28.000000000 -0500
298
@@ -73,10 +73,10 @@
299
    GLIBC_DYNAMIC_LINKER must be defined for each target using them, or
300
    GLIBC_DYNAMIC_LINKER32 and GLIBC_DYNAMIC_LINKER64 for targets
301
    supporting both 32-bit and 64-bit compilation.  */
302
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
303
-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"
304
-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"
305
-#define UCLIBC_DYNAMIC_LINKERX32 "/tools/lib/ldx32-uClibc.so.0"
306
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
307
+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"
308
+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"
309
+#define UCLIBC_DYNAMIC_LINKERX32 "/lib/ldx32-uClibc.so.0"
310
 #define BIONIC_DYNAMIC_LINKER "/system/bin/linker"
311
 #define BIONIC_DYNAMIC_LINKER32 "/system/bin/linker"
312
 #define BIONIC_DYNAMIC_LINKER64 "/system/bin/linker64"
313
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h
314 103 dgisselq
--- gcc-5.3.0-original/gcc/config/lm32/uclinux-elf.h    2016-03-08 04:57:02.962902614 -0500
315 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/lm32/uclinux-elf.h 2015-01-05 07:33:28.000000000 -0500
316
@@ -67,7 +67,7 @@
317
    %{shared:-shared} \
318
    %{symbolic:-Bsymbolic} \
319
    %{rdynamic:-export-dynamic} \
320
-   -dynamic-linker /tools/lib/ld-linux.so.2"
321
+   -dynamic-linker /lib/ld-linux.so.2"
322
 
323
 #define TARGET_OS_CPP_BUILTINS() GNU_USER_TARGET_OS_CPP_BUILTINS()
324
 
325
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/m68k/linux.h gcc-5.3.0-zip/gcc/config/m68k/linux.h
326 103 dgisselq
--- gcc-5.3.0-original/gcc/config/m68k/linux.h  2016-03-08 04:57:02.962902614 -0500
327 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/m68k/linux.h       2015-01-05 07:33:28.000000000 -0500
328
@@ -71,7 +71,7 @@
329
    When the -shared link option is used a final link is not being
330
    done.  */
331
 
332
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
333
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
334
 
335
 #undef LINK_SPEC
336
 #define LINK_SPEC "-m m68kelf %{shared} \
337
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/microblaze/linux.h gcc-5.3.0-zip/gcc/config/microblaze/linux.h
338 103 dgisselq
--- gcc-5.3.0-original/gcc/config/microblaze/linux.h    2016-03-08 04:57:02.962902614 -0500
339 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/microblaze/linux.h 2015-05-28 10:08:19.000000000 -0400
340
@@ -28,7 +28,7 @@
341
 #undef TLS_NEEDS_GOT
342
 #define TLS_NEEDS_GOT 1
343
 
344
-#define DYNAMIC_LINKER "/tools/lib/ld.so.1"
345
+#define DYNAMIC_LINKER "/lib/ld.so.1"
346
 #undef  SUBTARGET_EXTRA_SPECS
347
 #define SUBTARGET_EXTRA_SPECS \
348
   { "dynamic_linker", DYNAMIC_LINKER }
349
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mips/linux.h gcc-5.3.0-zip/gcc/config/mips/linux.h
350 103 dgisselq
--- gcc-5.3.0-original/gcc/config/mips/linux.h  2016-03-08 04:57:02.962902614 -0500
351 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/mips/linux.h       2015-01-05 07:33:28.000000000 -0500
352
@@ -22,20 +22,20 @@
353
 #define GNU_USER_LINK_EMULATIONN32 "elf32%{EB:b}%{EL:l}tsmipn32"
354
 
355
 #define GLIBC_DYNAMIC_LINKER32 \
356
-  "%{mnan=2008:/tools/lib/ld-linux-mipsn8.so.1;:/tools/lib/ld.so.1}"
357
+  "%{mnan=2008:/lib/ld-linux-mipsn8.so.1;:/lib/ld.so.1}"
358
 #define GLIBC_DYNAMIC_LINKER64 \
359
-  "%{mnan=2008:/tools/lib64/ld-linux-mipsn8.so.1;:/tools/lib64/ld.so.1}"
360
+  "%{mnan=2008:/lib64/ld-linux-mipsn8.so.1;:/lib64/ld.so.1}"
361
 #define GLIBC_DYNAMIC_LINKERN32 \
362
-  "%{mnan=2008:/tools/lib32/ld-linux-mipsn8.so.1;:/tools/lib32/ld.so.1}"
363
+  "%{mnan=2008:/lib32/ld-linux-mipsn8.so.1;:/lib32/ld.so.1}"
364
 
365
 #undef UCLIBC_DYNAMIC_LINKER32
366
 #define UCLIBC_DYNAMIC_LINKER32 \
367
-  "%{mnan=2008:/tools/lib/ld-uClibc-mipsn8.so.0;:/tools/lib/ld-uClibc.so.0}"
368
+  "%{mnan=2008:/lib/ld-uClibc-mipsn8.so.0;:/lib/ld-uClibc.so.0}"
369
 #undef UCLIBC_DYNAMIC_LINKER64
370
 #define UCLIBC_DYNAMIC_LINKER64 \
371
-  "%{mnan=2008:/tools/lib/ld64-uClibc-mipsn8.so.0;:/tools/lib/ld64-uClibc.so.0}"
372
+  "%{mnan=2008:/lib/ld64-uClibc-mipsn8.so.0;:/lib/ld64-uClibc.so.0}"
373
 #define UCLIBC_DYNAMIC_LINKERN32 \
374
-  "%{mnan=2008:/tools/lib32/ld-uClibc-mipsn8.so.0;:/tools/lib32/ld-uClibc.so.0}"
375
+  "%{mnan=2008:/lib32/ld-uClibc-mipsn8.so.0;:/lib32/ld-uClibc.so.0}"
376
 
377
 #define BIONIC_DYNAMIC_LINKERN32 "/system/bin/linker32"
378
 #define GNU_USER_DYNAMIC_LINKERN32 \
379
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/mn10300/linux.h gcc-5.3.0-zip/gcc/config/mn10300/linux.h
380 103 dgisselq
--- gcc-5.3.0-original/gcc/config/mn10300/linux.h       2016-03-08 04:57:02.962902614 -0500
381 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/mn10300/linux.h    2015-01-05 07:33:28.000000000 -0500
382
@@ -32,7 +32,7 @@
383
 #undef  ASM_SPEC
384
 #define ASM_SPEC ""
385
 
386
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
387
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
388
 
389
 #undef  LINK_SPEC
390
 #define LINK_SPEC "%{mrelax:--relax} %{shared:-shared} \
391
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/pa/pa-linux.h gcc-5.3.0-zip/gcc/config/pa/pa-linux.h
392 103 dgisselq
--- gcc-5.3.0-original/gcc/config/pa/pa-linux.h 2016-03-08 04:57:02.962902614 -0500
393 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/pa/pa-linux.h      2015-09-24 20:04:26.000000000 -0400
394
@@ -37,7 +37,7 @@
395
 /* Define this for shared library support because it isn't in the main
396
    linux.h file.  */
397
 
398
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
399
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
400
 
401
 #undef LINK_SPEC
402
 #define LINK_SPEC "\
403
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/linux64.h gcc-5.3.0-zip/gcc/config/rs6000/linux64.h
404 103 dgisselq
--- gcc-5.3.0-original/gcc/config/rs6000/linux64.h      2016-03-08 04:57:02.966902587 -0500
405 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/rs6000/linux64.h   2015-03-09 19:18:57.000000000 -0400
406
@@ -357,14 +357,14 @@
407
 #undef LINK_OS_DEFAULT_SPEC
408
 #define LINK_OS_DEFAULT_SPEC "%(link_os_linux)"
409
 
410
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
411
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
412
 #ifdef LINUX64_DEFAULT_ABI_ELFv2
413
-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/tools/lib64/ld64.so.1;:/tools/lib64/ld64.so.2}"
414
+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv1:/lib64/ld64.so.1;:/lib64/ld64.so.2}"
415
 #else
416
-#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/tools/lib64/ld64.so.2;:/tools/lib64/ld64.so.1}"
417
+#define GLIBC_DYNAMIC_LINKER64 "%{mabi=elfv2:/lib64/ld64.so.2;:/lib64/ld64.so.1}"
418
 #endif
419
-#define UCLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-uClibc.so.0"
420
-#define UCLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64-uClibc.so.0"
421
+#define UCLIBC_DYNAMIC_LINKER32 "/lib/ld-uClibc.so.0"
422
+#define UCLIBC_DYNAMIC_LINKER64 "/lib/ld64-uClibc.so.0"
423
 #if DEFAULT_LIBC == LIBC_UCLIBC
424
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
425
 #elif DEFAULT_LIBC == LIBC_GLIBC
426
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/rs6000/sysv4.h gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h
427 103 dgisselq
--- gcc-5.3.0-original/gcc/config/rs6000/sysv4.h        2016-03-08 04:57:02.966902587 -0500
428 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/rs6000/sysv4.h     2015-09-24 09:46:45.000000000 -0400
429
@@ -757,8 +757,8 @@
430
 
431
 #define LINK_START_LINUX_SPEC ""
432
 
433
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
434
-#define UCLIBC_DYNAMIC_LINKER "/tools/lib/ld-uClibc.so.0"
435
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
436
+#define UCLIBC_DYNAMIC_LINKER "/lib/ld-uClibc.so.0"
437
 #if DEFAULT_LIBC == LIBC_UCLIBC
438
 #define CHOOSE_DYNAMIC_LINKER(G, U) "%{mglibc:" G ";:" U "}"
439
 #elif !defined (DEFAULT_LIBC) || DEFAULT_LIBC == LIBC_GLIBC
440
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/s390/linux.h gcc-5.3.0-zip/gcc/config/s390/linux.h
441 103 dgisselq
--- gcc-5.3.0-original/gcc/config/s390/linux.h  2016-03-08 04:57:02.966902587 -0500
442 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/s390/linux.h       2015-05-11 03:14:10.000000000 -0400
443
@@ -60,8 +60,8 @@
444
 #define MULTILIB_DEFAULTS { "m31" }
445
 #endif
446
 
447
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld.so.1"
448
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib/ld64.so.1"
449
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld.so.1"
450
+#define GLIBC_DYNAMIC_LINKER64 "/lib/ld64.so.1"
451
 
452
 #undef  LINK_SPEC
453
 #define LINK_SPEC \
454
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sh/linux.h gcc-5.3.0-zip/gcc/config/sh/linux.h
455 103 dgisselq
--- gcc-5.3.0-original/gcc/config/sh/linux.h    2016-03-08 04:57:02.966902587 -0500
456 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sh/linux.h 2015-01-05 07:33:28.000000000 -0500
457
@@ -43,7 +43,7 @@
458
 
459
 #define TARGET_ASM_FILE_END file_end_indicate_exec_stack
460
 
461
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
462
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
463
 
464
 #undef SUBTARGET_LINK_EMUL_SUFFIX
465
 #define SUBTARGET_LINK_EMUL_SUFFIX "_linux"
466
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux64.h gcc-5.3.0-zip/gcc/config/sparc/linux64.h
467 103 dgisselq
--- gcc-5.3.0-original/gcc/config/sparc/linux64.h       2016-03-08 04:57:02.966902587 -0500
468 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sparc/linux64.h    2015-01-05 07:33:28.000000000 -0500
469
@@ -84,8 +84,8 @@
470
    When the -shared link option is used a final link is not being
471
    done.  */
472
 
473
-#define GLIBC_DYNAMIC_LINKER32 "/tools/lib/ld-linux.so.2"
474
-#define GLIBC_DYNAMIC_LINKER64 "/tools/lib64/ld-linux.so.2"
475
+#define GLIBC_DYNAMIC_LINKER32 "/lib/ld-linux.so.2"
476
+#define GLIBC_DYNAMIC_LINKER64 "/lib64/ld-linux.so.2"
477
 
478
 #ifdef SPARC_BI_ARCH
479
 
480
@@ -193,7 +193,7 @@
481
 #else /* !SPARC_BI_ARCH */
482
 
483
 #undef LINK_SPEC
484
-#define LINK_SPEC "-m elf64_sparc -Y P,%R/tools/lib64 %{shared:-shared} \
485
+#define LINK_SPEC "-m elf64_sparc -Y P,%R/usr/lib64 %{shared:-shared} \
486
   %{!shared: \
487
     %{!static: \
488
       %{rdynamic:-export-dynamic} \
489
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/sparc/linux.h gcc-5.3.0-zip/gcc/config/sparc/linux.h
490 103 dgisselq
--- gcc-5.3.0-original/gcc/config/sparc/linux.h 2016-03-08 04:57:02.966902587 -0500
491 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/sparc/linux.h      2015-01-05 07:33:28.000000000 -0500
492
@@ -83,7 +83,7 @@
493
    When the -shared link option is used a final link is not being
494
    done.  */
495
 
496
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld-linux.so.2"
497
+#define GLIBC_DYNAMIC_LINKER "/lib/ld-linux.so.2"
498
 
499
 #undef  LINK_SPEC
500
 #define LINK_SPEC "-m elf32_sparc %{shared:-shared} \
501
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/vax/linux.h gcc-5.3.0-zip/gcc/config/vax/linux.h
502 103 dgisselq
--- gcc-5.3.0-original/gcc/config/vax/linux.h   2016-03-08 04:57:02.966902587 -0500
503 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/vax/linux.h        2015-01-05 07:33:28.000000000 -0500
504
@@ -41,7 +41,7 @@
505
   %{!shared: \
506
     %{!static: \
507
       %{rdynamic:-export-dynamic} \
508
-      -dynamic-linker /tools/lib/ld.so.1} \
509
+      -dynamic-linker /lib/ld.so.1} \
510
     %{static:-static}}"
511
 
512
 #undef  WCHAR_TYPE
513
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/xtensa/linux.h gcc-5.3.0-zip/gcc/config/xtensa/linux.h
514 103 dgisselq
--- gcc-5.3.0-original/gcc/config/xtensa/linux.h        2016-03-08 04:57:02.966902587 -0500
515 102 dgisselq
+++ gcc-5.3.0-zip/gcc/config/xtensa/linux.h     2015-01-05 07:33:28.000000000 -0500
516
@@ -44,7 +44,7 @@
517
   %{mlongcalls:--longcalls} \
518
   %{mno-longcalls:--no-longcalls}"
519
 
520
-#define GLIBC_DYNAMIC_LINKER "/tools/lib/ld.so.1"
521
+#define GLIBC_DYNAMIC_LINKER "/lib/ld.so.1"
522
 
523
 #undef LINK_SPEC
524
 #define LINK_SPEC \
525
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/netbsd.h gcc-5.3.0-zip/gcc/config/zip/netbsd.h
526
--- gcc-5.3.0-original/gcc/config/zip/netbsd.h  1969-12-31 19:00:00.000000000 -0500
527
+++ gcc-5.3.0-zip/gcc/config/zip/netbsd.h       2016-01-30 15:04:14.796899050 -0500
528
@@ -0,0 +1,82 @@
529
+////////////////////////////////////////////////////////////////////////////////
530
+//
531
+// Filename:   netbsd.h
532
+//
533
+// Project:    Zip CPU backend for the GNU Compiler Collection
534
+//
535
+// Purpose:
536
+//
537
+// Creator:    Dan Gisselquist, Ph.D.
538
+//             Gisselquist Technology, LLC
539
+//
540
+////////////////////////////////////////////////////////////////////////////////
541
+//
542
+// Copyright (C) 2016, Gisselquist Technology, LLC
543
+//
544
+// This program is free software (firmware): you can redistribute it and/or
545
+// modify it under the terms of  the GNU General Public License as published
546
+// by the Free Software Foundation, either version 3 of the License, or (at
547
+// your option) any later version.
548
+//
549
+// This program is distributed in the hope that it will be useful, but WITHOUT
550
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
551
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
552
+// for more details.
553
+//
554
+// You should have received a copy of the GNU General Public License along
555
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
556
+// target there if the PDF file isn't present.)  If not, see
557
+// <http://www.gnu.org/licenses/> for a copy.
558
+//
559
+// License:    GPL, v3, as defined and found on www.gnu.org,
560
+//             http://www.gnu.org/licenses/gpl.html
561
+//
562
+//
563
+////////////////////////////////////////////////////////////////////////////////
564
+#ifndef        ZIP_NETBSD_H
565
+#define        ZIP_NETBSD_H
566
+
567
+/* Define default target values. */
568
+
569
+#undef MACHINE_TYPE
570
+#define        MACHINE_TYPE    "NetBSD/Zip ELF"
571
+
572
+#undef TARGET_OS_CPP_BUILTINS
573
+#define        TARGET_OS_CPP_BUILTINS()        \
574
+       do { NETBSD_OS_CPP_BUILTINS_ELF();              \
575
+       builtin_define("__ZIPCPU__");                   \
576
+       builtin_assert("cpu=zip");                      \
577
+       builtin_assert("machine=zip");                  \
578
+       } while(0);
579
+
580
+#undef CPP_SPEC
581
+#define        CPP_SPEC        NETBSD_CPP_SPEC
582
+
583
+#undef STARTFILE_SPEC
584
+#define        STARTFILE_SPEC  NETBSD_STARTFILE_SPEC
585
+
586
+#undef ENDFILE_SPEC
587
+#define        ENDFILE_SPEC    NETBSD_ENDFILE_SPEC
588
+
589
+#undef LIB_SPEC
590
+#define        LIB_SPEC        NETBSD_LIB_SPEC
591
+
592
+#undef TARGET_VERSION
593
+#define        TARGET_VERSION  fprintf(stderr, " (%s)", MACHINE_TYPE);
594
+
595
+/* Make gcc agree with <machine/ansi.h> */
596
+
597
+#undef WCHAR_TYPE
598
+#define        WCHAR_TYPE      "int"
599
+
600
+#undef WCHAR_TYPE_SIZE
601
+#define        WCHAR_TYPE_SIZE 32
602
+
603
+#undef WINT_TYPE
604
+#define        WINT_TYPE       "int"
605
+
606
+/* Clean up after the generic Zip/ELF configuration. */
607
+#undef MD_EXEC_PREFIX
608
+#undef MD_STARTFILE_PREFIX
609
+
610
+#endif /* ZIP_NETBSD_H */
611
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/t-zip gcc-5.3.0-zip/gcc/config/zip/t-zip
612
--- gcc-5.3.0-original/gcc/config/zip/t-zip     1969-12-31 19:00:00.000000000 -0500
613
+++ gcc-5.3.0-zip/gcc/config/zip/t-zip  2016-02-04 19:00:59.939652587 -0500
614
@@ -0,0 +1,47 @@
615
+################################################################################
616
+##
617
+## Filename:   t-zip
618
+##
619
+## Project:    Zip CPU backend for the GNU Compiler Collection
620
+##
621
+## Purpose:
622
+##
623
+## Creator:    Dan Gisselquist, Ph.D.
624
+##             Gisselquist Technology, LLC
625
+##
626
+################################################################################
627
+##
628
+## Copyright (C) 2016, Gisselquist Technology, LLC
629
+##
630
+## This program is free software (firmware): you can redistribute it and/or
631
+## modify it under the terms of  the GNU General Public License as published
632
+## by the Free Software Foundation, either version 3 of the License, or (at
633
+## your option) any later version.
634
+##
635
+## This program is distributed in the hope that it will be useful, but WITHOUT
636
+## ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
637
+## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
638
+## for more details.
639
+##
640
+## You should have received a copy of the GNU General Public License along
641
+## with this program.  (It's in the $(ROOT)/doc directory, run make with no
642
+## target there if the PDF file isn't present.)  If not, see
643
+## <http://www.gnu.org/licenses/> for a copy.
644
+##
645
+## License:    GPL, v3, as defined and found on www.gnu.org,
646
+##             http://www.gnu.org/licenses/gpl.html
647
+##
648
+##
649
+################################################################################
650
+
651
+FPBIT = fp-bit.c
652
+DPBIT = dp-bit.c
653
+
654
+# dp-bit.c: $(srcdir)/config/fp-bit.c
655
+       # cat $(srcdir)/config/fp-bit.c > dp-bit.c
656
+#
657
+# fp-bit.c: $(srcdir)/config/fp-bit.c
658
+       # echo '#define FLOAT" > fp-bit.c
659
+       # cat $(srcdir)/config/fp-bit.c >> fp-bit.c
660
+
661
+
662
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.c gcc-5.3.0-zip/gcc/config/zip/zip.c
663
--- gcc-5.3.0-original/gcc/config/zip/zip.c     1969-12-31 19:00:00.000000000 -0500
664 103 dgisselq
+++ gcc-5.3.0-zip/gcc/config/zip/zip.c  2016-03-08 04:27:14.906499512 -0500
665
@@ -0,0 +1,2175 @@
666 102 dgisselq
+////////////////////////////////////////////////////////////////////////////////
667
+//
668
+// Filename:   zip.c
669
+//
670
+// Project:    Zip CPU backend for the GNU Compiler Collection
671
+//
672
+// Purpose:
673
+//
674
+// Creator:    Dan Gisselquist, Ph.D.
675
+//             Gisselquist Technology, LLC
676
+//
677
+////////////////////////////////////////////////////////////////////////////////
678
+//
679
+// Copyright (C) 2016, Gisselquist Technology, LLC
680
+//
681
+// This program is free software (firmware): you can redistribute it and/or
682
+// modify it under the terms of  the GNU General Public License as published
683
+// by the Free Software Foundation, either version 3 of the License, or (at
684
+// your option) any later version.
685
+//
686
+// This program is distributed in the hope that it will be useful, but WITHOUT
687
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
688
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
689
+// for more details.
690
+//
691
+// You should have received a copy of the GNU General Public License along
692
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
693
+// target there if the PDF file isn't present.)  If not, see
694
+// <http://www.gnu.org/licenses/> for a copy.
695
+//
696
+// License:    GPL, v3, as defined and found on www.gnu.org,
697
+//             http://www.gnu.org/licenses/gpl.html
698
+//
699
+//
700
+////////////////////////////////////////////////////////////////////////////////
701
+#include "config.h"
702
+#include "system.h"
703
+#include "coretypes.h"
704
+#include "tm.h"
705
+#include "rtl.h"
706
+#include "dominance.h"
707
+#include "cfg.h"
708
+#include "cfgrtl.h"
709
+#include "cfganal.h"
710
+#include "lcm.h"
711
+#include "cfgbuild.h"
712
+#include "cfgcleanup.h"
713
+#include "predict.h"
714
+#include "basic-block.h"
715
+#include "df.h"
716
+#include "hashtab.h"
717
+#include "hash-set.h"
718
+#include "machmode.h"
719
+#include "symtab.h"
720
+#include "rtlhash.h"
721
+#include "tree.h"
722
+#include "regs.h"
723
+#include "hard-reg-set.h"
724
+#include "real.h"
725
+#include "insn-config.h"
726
+#include "conditions.h"
727
+#include "output.h"
728
+#include "insn-attr.h"
729
+#include "flags.h"
730
+#include "expr.h"
731
+#include "function.h"
732
+#include "recog.h"
733
+#include "toplev.h"
734
+#include "ggc.h"
735
+#include "builtins.h"
736
+#include "calls.h"
737
+#include "langhooks.h"
738
+#include "optabs.h"
739
+#include "explow.h"
740
+#include "emit-rtl.h"
741
+
742
+// #include "tmp_p.h"
743
+#include "target.h"
744
+#include "target-def.h"
745
+// #include "tm-constrs.h"
746
+// #include "tm-preds.h"
747
+
748
+#include "diagnostic.h"
749
+// #include "integrate.h"
750
+
751
+// static int  zip_arg_partial_bytes(CUMULATIVE_ARGS *, enum machine_mode, tree, bool);
752
+// static      bool    zip_pass_by_reference(CUMULATIVE_ARGS *, enum machine_mode, const_tree, bool);
753
+static bool    zip_return_in_memory(const_tree, const_tree);
754
+static bool    zip_frame_pointer_required(void);
755
+// static      bool    zip_must_pass_in_stack(enum machine_mode, const_tree);
756
+
757
+// static      void    zip_setup_incoming_varargs(CUMULATIVE_ARGS *, enum machine_mode, tree, int *, int);
758
+static void zip_function_arg_advance(cumulative_args_t ca, enum machine_mode mode,
759
+               const_tree type, bool named);
760
+static rtx zip_function_arg(cumulative_args_t ca, enum machine_mode mode, const_tree type, bool named);
761
+
762
+static void    zip_asm_trampoline_template(FILE *);
763
+static void    zip_trampoline_init(rtx, tree, rtx);
764
+static void    zip_init_builtins(void);
765
+static tree zip_builtin_decl(unsigned, bool);
766
+// static void zip_asm_output_anchor(rtx x);
767
+       void    zip_asm_output_def(FILE *s, const char *n, const char *v);
768
+       void    zip_update_cc_notice(rtx exp, rtx_insn *insn);
769
+static rtx     zip_expand_builtin(tree exp, rtx target, rtx subtarget,
770
+                       enum machine_mode tmode, int    ignore);
771
+static bool    zip_scalar_mode_supported_p(enum machine_mode mode);
772
+static bool    zip_libgcc_floating_mode_supported_p(enum machine_mode mode);
773
+static int     zip_address_cost(rtx addr, enum machine_mode mode, addr_space_t as, bool spd);
774
+static bool    zip_mode_dependent_address_p(const_rtx addr, addr_space_t);
775
+static unsigned HOST_WIDE_INT  zip_const_anchor = 0x20000;
776
+static          HOST_WIDE_INT  zip_min_anchor_offset = -0x20000;
777
+static          HOST_WIDE_INT  zip_max_anchor_offset =  0x1ffff;
778
+static          HOST_WIDE_INT  zip_min_mov_offset = -0x1000;
779
+static          HOST_WIDE_INT  zip_max_mov_offset =  0x0fff;
780
+static int     zip_sched_issue_rate(void) { return 1; }
781
+static bool    zip_legitimate_address_p(machine_mode, rtx, bool);
782
+static bool    zip_legitimate_move_operand_p(machine_mode, rtx, bool);
783
+       void    zip_debug_rtx_pfx(const char *, const_rtx x);
784
+       void    zip_debug_rtx(const_rtx x);
785
+static void    zip_override_options(void);
786
+static bool    zip_can_eliminate(int from ATTRIBUTE_UNUSED, int to);
787
+// static      void    zip_canonicalize_comparison(int *, rtx *, rtx *, bool);
788
+static int     zip_memory_move_cost(machine_mode, reg_class_t, bool);
789
+
790
+
791 103 dgisselq
+#define        ALL_DEBUG_OFF   false
792 102 dgisselq
+#define        ALL_DEBUG_ON    false
793
+
794
+enum ZIP_BUILTIN_ID_CODE {
795
+       ZIP_BUILTIN_RTU,
796
+       ZIP_BUILTIN_HALT,
797
+       ZIP_BUILTIN_IDLE,
798
+       ZIP_BUILTIN_SYSCALL,
799
+       ZIP_BUILTIN_SAVE_CONTEXT,
800
+       ZIP_BUILTIN_RESTORE_CONTEXT,
801
+       ZIP_BUILTIN_BITREV,
802
+       ZIP_BUILTIN_CC,
803
+       ZIP_BUILTIN_MAX
804
+};
805
+
806
+static GTY (()) tree   zip_builtins[(int)ZIP_BUILTIN_MAX];
807
+static enum insn_code  zip_builtins_icode[(int)ZIP_BUILTIN_MAX];
808
+
809
+
810
+#include "gt-zip.h"
811
+
812
+/* The Global 'targetm' Variable. */
813
+struct gcc_target      targetm = TARGET_INITIALIZER;
814
+
815
+
816
+enum   reg_class zip_reg_class(int);
817
+
818
+#define        LOSE_AND_RETURN(msgid, x)               \
819
+       do {                                    \
820
+               zip_operand_lossage(msgid, x);  \
821
+               return;                         \
822
+       } while(0)
823
+
824
+/* Per-function machine data. */
825
+struct GTY(()) machine_function
826
+{
827
+       /* number of pretented arguments for varargs */
828
+       int     pretend_size;
829
+
830
+       /* Number of bytes saved on the stack for local variables. */
831
+       int     local_vars_size;
832
+
833
+       /* Number of bytes saved on stack for register save area */
834
+       int     saved_reg_size;
835
+       int     save_ret;
836
+
837
+       int     sp_fp_offset;
838
+       bool    fp_needed;
839
+       int     size_for_adjusting_sp;
840
+};
841
+
842
+/* Allocate a chunk of memory for per-function machine-dependent data. */
843
+
844
+static struct machine_function *
845
+zip_init_machine_status(void) {
846
+       return ggc_cleared_alloc<machine_function>();
847
+}
848
+
849
+static void
850
+zip_override_options(void)
851
+{
852
+       init_machine_status = zip_init_machine_status;
853
+}
854
+
855
+enum   reg_class
856
+zip_reg_class(int regno)
857
+{
858
+       if (is_ZIP_GENERAL_REG(regno)) {
859
+               return GENERAL_REGS;
860
+       } else if (is_ZIP_REG(regno)) {
861
+               return ALL_REGS;
862
+       } return NO_REGS;
863
+}
864
+
865
+/* Worker function for TARGET_RETURN_IN_MEMORY. */
866
+static bool
867
+zip_return_in_memory(const_tree type, const_tree fntype ATTRIBUTE_UNUSED) {
868
+       const   HOST_WIDE_INT size = int_size_in_bytes(type);
869
+       return (size == -1)||(size > UNITS_PER_WORD);
870
+}
871
+
872
+/* Emit an error emssage when we're in an asm, and a fatal error for "normal"
873
+ * insn.  Formatted output isn't easily implemented, since we use output operand
874
+ * lossage to output the actual message and handle the categorization of the
875
+ * error.  */
876
+
877
+static void
878
+zip_operand_lossage(const char *msgid, rtx op) {
879
+       fprintf(stderr, "Operand lossage??\n");
880
+       debug_rtx(op);
881
+       zip_debug_rtx(op);
882
+       output_operand_lossage("%s", msgid);
883
+}
884
+
885
+/* The PRINT_OPERAND_ADDRESS worker.   */
886
+void
887
+zip_print_operand_address(FILE *file, rtx x) {
888
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
889
+
890
+       if (dbg) zip_debug_rtx(x);
891
+       switch(GET_CODE(x)) {
892
+               case REG:
893
+                       fprintf(file, "(%s)", reg_names[REGNO(x)]);
894
+                       break;
895
+               case SYMBOL_REF:
896
+                       fprintf(file, "%s", XSTR(x,0));
897
+                       break;
898
+               case LABEL_REF:
899
+                       x = LABEL_REF_LABEL(x);
900
+               case CODE_LABEL:
901
+                       { char buf[256];
902
+                       ASM_GENERATE_INTERNAL_LABEL(buf, "L", CODE_LABEL_NUMBER(x));
903
+#ifdef ASM_OUTPUT_LABEL_REF
904
+                       ASM_OUTPUT_LABEL_REF(file, buf);
905
+#else
906
+                       assemble_name(file, buf);
907
+#endif
908
+                       }
909
+                       break;
910
+               case PLUS:
911
+                       if (!REG_P(XEXP(x, 0)))
912
+                               abort();
913
+                       if (CONST_INT_P(XEXP(x, 1))) {
914
+                               if (INTVAL(XEXP(x,1))!=0) {
915
+                                       fprintf(file, "%ld(%s)",
916
+                                       INTVAL(XEXP(x, 1)),
917
+                                       reg_names[REGNO(XEXP(x, 0))]);
918
+                               } else {
919
+                                       fprintf(file, "(%s)",
920
+                                       reg_names[REGNO(XEXP(x, 0))]);
921
+                               }
922
+                       } else if (GET_CODE(XEXP(x,1)) == SYMBOL_REF) {
923
+                               fprintf(file, "%s(%s)", XSTR(x,0),
924
+                                       reg_names[REGNO(XEXP(x, 0))]);
925
+                       } else if ((GET_CODE(XEXP(x, 1)) == MINUS)
926
+                               && (GET_CODE(XEXP(XEXP(x, 1), 0))==SYMBOL_REF)
927
+                               && (GET_CODE(XEXP(XEXP(x, 1), 1))==SYMBOL_REF)) {
928
+                               fprintf(file, "%s-%s(%s)",
929
+                                       XSTR(XEXP(XEXP(x, 1),0),0),
930
+                                       XSTR(XEXP(XEXP(x, 1),1),0),
931
+                                       reg_names[REGNO(XEXP(x, 0))]);
932
+                       } else
933
+                               fprintf(file, "#INVALID(%s)",
934
+                                       reg_names[REGNO(XEXP(x, 0))]);
935
+                       /*
936
+                       else if (GET_CODE(XEXP(addr, 1)) == LABEL)
937
+                               fprintf(file, "%s(%s)",
938
+                                       GET_CODE(XEXP(addr, 1)),
939
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
940
+                       else if ((GET_CODE(XEXP(addr, 1)) == MINUS)
941
+                               && (GET_CODE(XEXP(GET_CODE(XEXP(addr, 1)), 0))==LABEL)
942
+                               && (GET_CODE(XEXP(GET_CODE(XEXP(addr, 1)), 1))==LABEL)) {
943
+                               fprintf(file, "%s-%s(%s)",
944
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
945
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
946
+                                       reg_names[REGNO(GET_CODE(XEXP(addr, 0)))]);
947
+                       }
948
+                       */
949
+                       break;
950
+               // We don't support direct memory addressing within our
951
+               // instruction set, even though the instructions themselves
952
+               // would support direct memory addressing of the lower 18 bits
953
+               // of memory space.
954
+               case MEM:
955
+                       if (dbg) zip_debug_rtx(x);
956
+                       zip_print_operand_address(file, XEXP(x, 0));
957
+                       break;
958
+               default:
959
+                       abort(); break;
960
+                       // output_addr_const(file, x);
961
+               break;
962
+       }
963
+}
964
+
965
+/* The PRINT_OPERAND worker. */
966
+
967
+void
968
+zip_print_operand(FILE *file, rtx x, int code)
969
+{
970
+       rtx operand = x;
971
+       int     rgoff = 0;
972
+
973
+       // fprintf(file, "Print Operand!\n");
974
+
975
+       /* New code entries should just be added to the switch below.  If
976
+        * handling is finished, just return.  If handling was just a
977
+        * modification of the operand, the modified operand should be put in
978
+        * "operand", and then do a break to let default handling
979
+        * (zero-modifier) output the operand.
980
+        */
981
+       switch(code) {
982
+               case 0:
983
+                       /* No code, print as usual. */
984
+                       break;
985
+               case 'L':
986
+                       /* Lower of two registers, print one up */
987
+                       rgoff = 1;
988
+                       break;
989
+               case 'R':
990
+               case 'H':
991
+                       /* Higher of a register pair, print normal */
992
+                       break;
993
+
994
+               default:
995
+                       LOSE_AND_RETURN("invalid operand modifier letter", x);
996
+       }
997
+
998
+       /* Print an operand as without a modifier letter. */
999
+       switch (GET_CODE(operand)) {
1000
+       case REG:
1001
+               if (REGNO(operand)+rgoff >= FIRST_PSEUDO_REGISTER)
1002
+                       internal_error("internal error: bad register: %d", REGNO(operand));
1003
+               fprintf(file, "%s", reg_names[REGNO(operand)+rgoff]);
1004
+               return;
1005
+       case SCRATCH:
1006
+               LOSE_AND_RETURN("Need a scratch register", x);
1007
+               return;
1008
+
1009
+       case CODE_LABEL:
1010
+       case LABEL_REF:
1011
+       case SYMBOL_REF:
1012
+       case PLUS:
1013
+               PRINT_OPERAND_ADDRESS(file, operand);
1014
+               return;
1015
+       case MEM:
1016
+               PRINT_OPERAND_ADDRESS(file, XEXP(operand, 0));
1017
+               return;
1018
+
1019
+       default:
1020
+               /* No need to handle all strange variants, let
1021
+                * output_addr_const do it for us.
1022
+                */
1023
+               if (CONSTANT_P(operand)) {
1024
+                       output_addr_const(file, operand);
1025
+                       return;
1026
+               }
1027
+
1028
+               LOSE_AND_RETURN("unexpected operand", x);
1029
+       }
1030
+}
1031
+
1032
+static bool
1033
+zip_frame_pointer_required(void)
1034
+{
1035
+       // This should really depend upon whether we have variable sized
1036
+       // arguments in our frame or not.  Once this fails, let's look
1037
+       // at what the problem was and then whether or not we can detect
1038
+       // it.
1039
+       //
1040
+       // Use a GCC global to determine our answer
1041 103 dgisselq
+       if (cfun->calls_alloca)
1042
+               return true;
1043 102 dgisselq
+       return (frame_pointer_needed);
1044
+/*
1045
+       fprintf(stderr, "ZIP_FRAME_POINTER_REQUIRED()\n");
1046
+       if (frame_pointer_needed) {
1047
+               fprintf(stderr, "FRAME_POINTER_NEEDED is true\n");
1048
+               zip_debug_rtx(frame_pointer_rtx);
1049
+               if (frame_pointer_rtx == NULL_RTX)
1050
+                       return true;
1051
+               if (GET_CODE(frame_pointer_rtx)==PLUS) {
1052
+                       if ((REG_P(XEXP(frame_pointer_rtx,0)))
1053
+                               &&(REGNO(XEXP(frame_pointer_rtx, 0))==zip_SP)
1054
+                               &&(CONST_INT_P(XEXP(frame_pointer_rtx,1))))
1055
+                               return false;
1056
+                       if ((REG_P(XEXP(frame_pointer_rtx,1)))
1057
+                               &&(REGNO(XEXP(frame_pointer_rtx, 1))==zip_SP)
1058
+                               &&(CONST_INT_P(XEXP(frame_pointer_rtx,0))))
1059
+                               return false;
1060
+                       return true;
1061
+               } else if ((REG_P(frame_pointer_rtx))
1062
+                               &&(REGNO(frame_pointer_rtx) == zip_SP))
1063
+                       return false;
1064
+               return true;
1065
+       } else return false;
1066
+*/
1067
+}
1068
+
1069
+/* Determine whether or not a register needs to be saved on the stack or not.
1070
+ */
1071
+static bool
1072
+zip_save_reg(int regno) {
1073
+       if (regno == 0)
1074
+               return ((!crtl->is_leaf)
1075
+                       ||((df_regs_ever_live_p(0))&&(!call_used_regs[0])));
1076
+       else if ((regno == zip_GOT)&&(!ZIP_PIC))
1077
+               return  ((df_regs_ever_live_p(regno))
1078
+                               &&(!call_used_regs[regno]));
1079
+       else if (regno == zip_FP)
1080
+               return((zip_frame_pointer_required())||((df_regs_ever_live_p(regno))
1081
+                               &&(!call_used_regs[regno])));
1082
+       else if (regno < zip_FP)
1083
+               return  ((df_regs_ever_live_p(regno))
1084
+                               &&(!call_used_regs[regno]));
1085
+       return false;
1086
+}
1087
+
1088
+/* Compute the size of the local area and the size to be adjusted by the
1089
+ * prologue and epilogue.
1090
+ *
1091
+ * Here's what we are looking at (top is the current, bottom is the last ...)
1092
+ *
1093
+ *     Stack Pointer ->
1094
+ *                     Local variables (could be variable size)
1095
+ *     Frame Pointer ->        (= Stack Pointer + sp_fp_offset)
1096
+ *                     Saved return address, if saved
1097
+ *                     Other Saved registers
1098
+ *                     Saved frame pointer (if used)
1099
+ *                     Saved R12, if used
1100
+ *                     (Stack pointer is not saved)
1101
+ *     Original stack pointer ->       (= Stack_Pointer +size_for_adjusting_sp)
1102
+ *                     Called arguments (not passed in registers)
1103
+ *                     Return arguments (not R1, args.pretend_args_size)
1104
+ *             (Prior function's stack frame ... )
1105
+ *
1106
+ */
1107
+static void
1108
+zip_compute_frame(void) {
1109
+       int     regno;
1110
+       int     args_size;
1111
+
1112
+       // gcc_assert(crtl);
1113
+       gcc_assert(cfun);
1114
+       gcc_assert(cfun->machine);
1115
+
1116
+       args_size=(ACCUMULATE_OUTGOING_ARGS ? crtl->outgoing_args_size : 0);
1117
+
1118
+       if(crtl->args.pretend_args_size > 0) {
1119
+               args_size += crtl->args.pretend_args_size;
1120
+               // printf("%s pretend_args_size : %d\n", current_function_name(),
1121
+                       // crtl->args.pretend_args_size);
1122
+               cfun->machine->pretend_size = crtl->args.pretend_args_size;
1123
+       }
1124
+
1125
+       cfun->machine->local_vars_size = get_frame_size();
1126
+
1127
+       // Save callee-saved registers.
1128
+       cfun->machine->saved_reg_size = 0;
1129
+       for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1130
+               if (zip_save_reg(regno))
1131
+                       cfun->machine->saved_reg_size ++;
1132
+       }
1133
+
1134
+       cfun->machine->fp_needed = (zip_frame_pointer_required());
1135
+
1136
+       if ((cfun->machine->fp_needed)&&
1137
+                       (!df_regs_ever_live_p(zip_FP))) {
1138
+               cfun->machine->saved_reg_size ++;
1139
+       }
1140
+
1141
+       cfun->machine->sp_fp_offset = args_size + cfun->machine->local_vars_size;
1142
+       cfun->machine->size_for_adjusting_sp = cfun->machine->local_vars_size
1143
+                       + cfun->machine->saved_reg_size
1144
+                       + args_size;
1145
+
1146
+       /*
1147
+       if (cfun->machine->fp_needed)
1148
+               frame_pointer_rtx = gen_rtx_REG(Pmode, zip_FP);
1149
+       else
1150
+               frame_pointer_rtx = plus_constant(Pmode, gen_rtx_REG(Pmode, zip_SP),
1151
+                       cfun->machine->sp_fp_offset);
1152
+       */
1153
+}
1154
+
1155
+void
1156
+zip_expand_prologue(void) {
1157
+       rtx     insn;
1158
+
1159
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1160
+       zip_compute_frame();
1161
+
1162 103 dgisselq
+       if (dbg)  fprintf(stderr, "Computing Prologue instructions\n");
1163 102 dgisselq
+       if (cfun->machine->size_for_adjusting_sp != 0) {
1164
+               insn = emit_insn(gen_subsi3(stack_pointer_rtx,
1165
+                               stack_pointer_rtx,
1166
+                       gen_int_mode(cfun->machine->size_for_adjusting_sp,
1167
+                               SImode)));
1168
+                       // cfun->machine->sp_fp_offset
1169
+
1170
+               RTX_FRAME_RELATED_P(insn) = 1;
1171
+       }
1172
+
1173
+       {
1174
+               int offset = 0, regno;
1175
+               for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1176
+                       if (zip_save_reg(regno)) {
1177
+                               insn=emit_insn(gen_movsi_sto(
1178
+                                       gen_rtx_MEM(SImode, plus_constant(
1179
+                                               Pmode, stack_pointer_rtx,
1180
+                                               cfun->machine->sp_fp_offset
1181
+                                               +offset++, true)),
1182
+                                       gen_rtx_REG(SImode, regno)));
1183
+                               RTX_FRAME_RELATED_P(insn) = 1;
1184
+                       }
1185
+               }
1186 103 dgisselq
+               if (dbg)  fprintf(stderr, "%d registers saved%s\n", offset,
1187
+                       (crtl->saves_all_registers)?", should be all of them":", less than all");
1188 102 dgisselq
+       }
1189
+
1190
+       if (cfun->machine->fp_needed) {
1191
+               if (dbg) zip_debug_rtx(stack_pointer_rtx);
1192
+               if (dbg) zip_debug_rtx(frame_pointer_rtx);
1193
+               insn = emit_insn(gen_movsi_reg_off(frame_pointer_rtx,
1194
+                               stack_pointer_rtx, gen_int_mode(
1195
+                                               cfun->machine->sp_fp_offset,
1196
+                                               SImode)));
1197
+               RTX_FRAME_RELATED_P(insn) = 1;
1198 103 dgisselq
+               if (dbg)  fprintf(stderr, "sp_fp_offset is %d\n", cfun->machine->sp_fp_offset);
1199 102 dgisselq
+       }
1200
+}
1201
+
1202
+bool
1203
+zip_use_return_insn(void)
1204
+{
1205
+       if ((!reload_completed)||(cfun->machine->fp_needed)
1206
+                       ||(get_frame_size()!=0)) {
1207
+               // If R0 ever gets pushed to the stack, then we cannot
1208
+               // use a master return from anywhere.  We need to clean up the
1209
+               // stack first.
1210
+               if ((!crtl->is_leaf)||((df_regs_ever_live_p(0))
1211
+                                               &&(!call_used_regs[0]))) {
1212
+                       return false;
1213
+               }
1214
+       }
1215
+       zip_compute_frame();
1216
+       return (cfun->machine->size_for_adjusting_sp == 0);
1217
+}
1218
+
1219
+/* As per the notes in M68k.c, quote the function epilogue should not depend
1220
+ * upon the current stack pointer.  It should use the frame poitner only,
1221
+ * if there is a frame pointer.  This is mandatory because of alloca; we also
1222
+ * take advantage of it to omit stack adjustments before returning ...
1223
+ *
1224
+ * Let's see if we can use their approach here.
1225
+ *
1226
+ * We can't.  Consider our choices:
1227
+ *     LOD (FP),R0
1228
+ *     LOD 1(FP),R4
1229
+ *     LOD 2(FP),R5
1230
+ *     LOD 3(FP),R6
1231
+ *     LOD 4(FP),FP
1232
+ *     ... Then what is the stack pointer?
1233
+ * or
1234
+ *     LOD (FP),R0
1235
+ *     LOD 1(FP),R4
1236
+ *     LOD 2(FP),R5
1237
+ *     LOD 3(FP),R6
1238
+ *     MOV FP,SP
1239
+ *     LOD 4(SP),FP
1240
+ *     ... Which suffers unnecessary pipeline stalls, and certainly doesn't
1241
+ *     exploit our pipeline memory function
1242
+ * or
1243
+ *     MOV FP,SP
1244
+ *     LOD (SP),R0
1245
+ *     LOD 1(SP),R4
1246
+ *     LOD 2(SP),R5
1247
+ *     LOD 3(SP),R6
1248
+ *     LOD 4(SP),FP
1249
+ * Which will be our choice.  Note that we do use the stack pointer, eventually.
1250
+ *
1251
+ */
1252
+void
1253
+zip_expand_epilogue(void) {
1254
+       int     regno, offset;
1255
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1256
+
1257
+       zip_compute_frame();
1258
+
1259
+       if (dbg) fprintf(stderr, "EPILOG::\n");
1260
+       if (cfun->machine->fp_needed) {
1261
+               if (dbg) fprintf(stderr, "EPILOG::Moving frame pointer to stack register\n");
1262
+               emit_insn(gen_movsi_reg(stack_pointer_rtx, frame_pointer_rtx));
1263
+       }
1264
+
1265
+       if (cfun->machine->saved_reg_size != 0) {
1266
+               offset =  (cfun->machine->size_for_adjusting_sp -
1267
+                               cfun->machine->sp_fp_offset
1268
+                       - cfun->machine->saved_reg_size);
1269
+               if (dbg) fprintf(stderr, "EPILOG::Saved_REG_Size = %d\n", cfun->machine->saved_reg_size);
1270
+               for(regno=0; regno < FIRST_PSEUDO_REGISTER; regno++) {
1271
+                       if (zip_save_reg(regno)) {
1272
+                               if (dbg) fprintf(stderr, "EPILOG::RESTORING R%d\n", regno);
1273
+                               emit_insn(gen_movsi_lod(
1274
+                                               gen_rtx_REG(SImode, regno),
1275
+                                       gen_rtx_MEM(SImode, plus_constant( SImode,
1276
+                                               stack_pointer_rtx, offset++, true))));
1277
+                       }
1278
+               }
1279
+       }
1280
+
1281
+       if (cfun->machine->size_for_adjusting_sp != 0) {
1282
+               if (dbg) fprintf(stderr, "EPILOG::ADDSI3(StackPtr, %d)\n",
1283
+                               cfun->machine->size_for_adjusting_sp);
1284
+               emit_insn(gen_addsi3(stack_pointer_rtx, stack_pointer_rtx,
1285
+                       gen_int_mode(
1286
+                               cfun->machine->size_for_adjusting_sp
1287
+                               -cfun->machine->sp_fp_offset, SImode)));
1288
+       }
1289
+       if (dbg) fprintf(stderr, "EPILOG::EMITTING-RETURN\n");
1290
+
1291
+       emit_jump_insn(ret_rtx);
1292
+}
1293
+
1294
+/* Implement RETURN_ADDR_RTX(COUNT, FRAMEADDR).
1295
+ *
1296
+ * We currently only support calculating the return address for the current
1297
+ * frame.
1298
+ */
1299
+
1300
+/*
1301
+rtx
1302
+zip_return_addr_rtx(int count, rtx frame ATTRIBUTE_UNUSED)
1303
+{
1304
+       if (count)
1305
+               return NULL_RTX;
1306
+
1307
+       zip_compute_frame();
1308
+
1309
+       // saved return address for current function is at fp - 1
1310
+       if (cfun->machine->save_ret)
1311
+               return gen_rtx_MEM(Pmode, plus_constant(frame_pointer_rtx,
1312
+                               -UNITS_PER_WORD));
1313
+       return get_hard_reg_initial_val(Pmode, RETURN_ADDRESS_REGNUM);
1314
+}
1315
+*/
1316
+
1317
+/* Implements the macro INITIAL_ELIMINATION_OFFSET,
1318
+ * return the OFFSET.
1319
+ */
1320
+/*
1321
+int
1322
+zip_initial_elimination_offset(int from, int to) {
1323
+       int     ret = 0;
1324
+       zip_compute_frame();
1325
+
1326
+       if (((from) == FRAME_POINTER_REGNUM)&&((to) == STACK_POINTER_REGNUM)) {
1327
+               ret = cfun->machine->sp_fp_offset;
1328
+       } else if (((from)=ARG_POINTER_REGNUM)&&((to)==FRAME_POINTER_REGNUM)) {
1329
+               ret = cfun->machine->local_vars_size;
1330
+       } else {
1331
+               abort();
1332
+       }
1333
+
1334
+       return ret;
1335
+}
1336
+*/
1337
+
1338
+/* Return non-zero if the function argument described by TYPE is to be passed
1339
+ * by reference.
1340
+ */
1341
+/*
1342
+static bool
1343
+zip_pass_by_reference(CUMULATIVE_ARGS *cum ATTRIBUTE_UNUSED,
1344
+               enum machine_mode mode, const_tree type,
1345
+               bool name ATTRIBUTE_UNUSED) {
1346
+       unsigned        HOST_WIDE_INT   size;
1347
+
1348
+       if (type) {
1349
+               if (AGGREGATE_TYPE_P(type)) {
1350
+                       return TRUE;
1351
+               } size = int_size_in_bytes(type);
1352
+       } else
1353
+               size = GET_MODE_SIZE(mode);
1354
+
1355
+       return (size > GET_MODE_SIZE(SImode)); // > 1 word : is this okay?
1356
+       // The idea is to pass everything larger than an int by reference (or
1357
+       // on the stack)
1358
+}
1359
+*/
1360
+
1361
+/*
1362
+ * Code taken from m68k ...
1363
+ */
1364
+static bool
1365
+zip_can_eliminate(int from, int to)
1366
+{
1367
+       // fprintf(stderr, "CAN_ELIMINATE::QUERYING(%d,%d)\n", from, to);
1368
+       if ((from == zip_FP)&&(to == zip_SP))
1369
+               return !cfun->machine->fp_needed;
1370
+       return true;
1371
+}
1372
+
1373
+/*
1374
+static bool
1375
+zip_must_pass_in_stack(enum machine_mode mode, const_tree type)
1376
+{
1377
+       if (mode == BLKmode) {
1378
+               return true;
1379
+       } if (type == NULL) {
1380
+               return false;
1381
+       } return AGGREGATE_TYPE_P(type);
1382
+}
1383
+*/
1384
+
1385
+/*
1386
+static void
1387
+zip_basic_check(void)
1388
+{
1389
+       gcc_assert(mode_base_align[SImode]==4);
1390
+       if ((BITS_PER_UNIT != 32)
1391
+                       ||(GET_MODE_SIZE(SImode)!=1)
1392
+                       ||(GET_MODE_SIZE(DImode)!=1)
1393
+                       ||(HARD_REGNO_NREGS(0,SImode)!=1)) {
1394
+               printf("SIZEOF(SIMode) == %d\n", GET_MODE_SIZE(SImode));
1395
+               printf("BITS_PER_UNIT  == %d\n", BITS_PER_UNIT);
1396
+               gcc_assert(BITS_PER_UNIT==32);
1397
+               gcc_assert(GET_MODE_SIZE(SImode)==1);
1398
+               gcc_assert(HARD_REGNO_NREGS(0,SImode)==1);
1399
+       }
1400
+}
1401
+*/
1402
+
1403
+#define        zip_basic_check()
1404
+
1405
+/* Compute the number of word sized regiters needed to hold a function
1406
+ * argument of mode INT_MODE and tree type TYPE.
1407
+ */
1408
+int
1409
+zip_num_arg_regs(enum machine_mode mode, const_tree type) {
1410
+       int     size;
1411
+
1412
+       zip_basic_check();
1413
+
1414
+       if (targetm.calls.must_pass_in_stack(mode, type))
1415
+               return 0;
1416
+
1417
+       if ((type)&&(mode == BLKmode))
1418
+               size = int_size_in_bytes(type);
1419
+       else
1420
+               size = GET_MODE_SIZE(mode);
1421
+
1422
+       return (size + UNITS_PER_WORD - 1)/UNITS_PER_WORD;
1423
+}
1424
+
1425
+/* pushed in function prologue */
1426
+/*
1427
+static void
1428
+zip_setup_incoming_varargs(CUMULATIVE_ARGS *cum, enum machine_mode mode,
1429
+               tree type, int *pretend_size, int no_rtl) {
1430
+       if (no_rtl)
1431
+               return;
1432
+
1433
+       gcc_assert(mode != BLKmode);
1434
+
1435
+       if (*cum < (ZIP_LAST_ARG_REGNO+1)) {
1436
+               int size = ZIP_FIRST_ARG_REGNO + ZIP_NUM_ARGS_REGS - *cum;
1437
+               rtx     regblock;
1438
+               int     offset = (*cum - ZIP_FIRST_ARG_REGNO) * UNITS_PER_WORD;
1439
+               regblock = gen_rtx_MEM(BLKmode,
1440
+                       plus_constant(arg_pointer_rtx, offset));
1441
+               move_block_from_reg(*cum, regblock, size);
1442
+               *pretend_size = size * UNITS_PER_WORD;
1443
+       }
1444
+
1445
+       if (targetm.calls.strict_argument_naming(cum))
1446
+               *cum = *cum + zip_num_arg_regs(mode, type);
1447
+}
1448
+*/
1449
+
1450
+/*
1451
+static int
1452
+zip_arg_partial_bytes(CUMULATIVE_ARGS *cum, enum machine_mode mode,
1453
+               tree type, bool name ATTRIBUTE_UNUSED) {
1454
+       int     words;
1455
+       unsigned int    regs = zip_num_arg_regs(mode, type);
1456
+
1457
+       if (*cum >= ZIP_LAST_ARG_REGNO + 1)
1458
+               words = 0;
1459
+       else if ((*cum + regs) > ZIP_LAST_ARG_REGNO + 1)
1460
+               words = (*cum + regs) - ZIP_LAST_ARG_REGNO + 1;
1461
+       else
1462
+               words = 0;
1463
+
1464
+       return words * UNITS_PER_WORD;
1465
+}
1466
+*/
1467
+
1468
+static void
1469
+zip_function_arg_advance(cumulative_args_t ca, machine_mode mode,
1470
+               const_tree type, bool named ATTRIBUTE_UNUSED) {
1471
+       CUMULATIVE_ARGS *cum;
1472
+       int     nreg;
1473
+
1474
+       zip_basic_check();
1475
+
1476
+       cum = get_cumulative_args(ca);
1477
+       nreg = zip_num_arg_regs(mode, type);
1478
+       if (((*cum)+nreg) > NUM_ARG_REGS)
1479
+               (*cum) = NUM_ARG_REGS;
1480
+       else
1481
+               (*cum) += nreg;
1482
+}
1483
+
1484
+static rtx
1485
+zip_function_arg(cumulative_args_t ca, machine_mode mode,
1486
+               const_tree type ATTRIBUTE_UNUSED, bool named) {
1487
+       CUMULATIVE_ARGS *cum;
1488
+
1489
+       zip_basic_check();
1490
+
1491
+
1492
+       if (!named)
1493
+               return NULL_RTX;
1494
+       //if (targetm.calls.must_pass_in_stack(mode, type))
1495
+               //return NULL_RTX;
1496
+       cum = get_cumulative_args(ca);
1497
+
1498
+       if ((*cum) >= NUM_ARG_REGS)
1499
+               return NULL_RTX;
1500
+       return
1501
+               gen_rtx_REG(mode, (*cum)+1);
1502
+}
1503
+
1504
+/* NOTICE_UPDATE_CC sends us here
1505
+ */
1506
+void
1507
+zip_update_cc_notice(rtx exp, rtx_insn *insn)
1508
+{
1509
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
1510
+       enum    attr_ccresult  ccr;
1511
+       enum    attr_conditional  conditionally_executed;
1512
+
1513
+       // The default is that nothing has changed.
1514
+       // cc_status = cc_status_prev;
1515
+       rtx     src, dest;
1516
+
1517
+       if (dbg) fprintf(stderr, "CC-NOTICE ...\n");
1518
+       if (dbg) zip_debug_rtx_pfx("CC :", exp);
1519
+       if (dbg) debug_rtx(exp);
1520
+
1521
+       ccr = get_attr_ccresult(insn);
1522
+       if (ccr == CCRESULT_UNKNOWN) {
1523
+               CC_STATUS_INIT;
1524
+               if (dbg) fprintf(stderr, "\tINIT-CC\n");
1525
+               return;
1526
+       } else if (ccr == CCRESULT_UNCHANGED) {
1527
+               if (dbg) fprintf(stderr, "\tUnchanged CC\n");
1528
+               return;
1529
+       }
1530
+
1531
+       if ((GET_CODE(exp) == PARALLEL)&&(GET_CODE(XVECEXP(exp, 0, 0))==SET)) {
1532
+               // This works up and until we add cc0 parallel instructions
1533
+               // to our instruction set.
1534
+               dest = SET_DEST(XVECEXP(exp, 0, 0));
1535
+               src  = SET_SRC (XVECEXP(exp, 0, 0));
1536
+       } else if (GET_CODE(exp) == SET) {
1537
+               dest = SET_DEST(exp);
1538
+               src  = SET_SRC (exp);
1539
+       } else {
1540
+               // First, do nothing if we haven't touched the condition codes.
1541
+               // Condition codes can only be changed as a result of a set
1542
+               // expression ...?
1543
+               if (dbg) fprintf(stderr, "Non-set expression, doesn\'t touch condition codes\n");
1544
+               return;
1545
+       }
1546
+
1547
+       // Gotta wait on this test, until we know whether or not the
1548
+       // conditionally executed instruction was designed to set the
1549
+       // CC0 register.
1550
+       conditionally_executed = get_attr_conditional(insn);
1551
+       if ((conditionally_executed == CONDITIONAL_YES)&&(dest != cc0_rtx)) {
1552
+               // cc_status is unchanged
1553
+               if (dbg) fprintf(stderr, "\tCC -- unchanged (conditional exec)\n");
1554
+               return;
1555
+       }
1556
+
1557
+       if (ccr == CCRESULT_VALIDZN)
1558
+               cc_status.flags = CC_NO_OVERFLOW;
1559
+       else
1560
+               cc_status.flags = 0;
1561
+       cc_status.value1 = dest;
1562
+       if (dest == cc0_rtx)
1563
+               cc_status.value2 = src;
1564
+       else if((REG_P(dest))&&(!reg_mentioned_p(dest, src)))
1565
+               cc_status.value2 = src;
1566
+       else if((SUBREG_P(dest))&&(!reg_mentioned_p(XEXP(dest,0), src)))
1567
+               cc_status.value2 = src;
1568
+       else
1569
+               cc_status.value2 = 0;
1570
+       if (dbg) fprintf(stderr, "\tCC -- Set flags for\n");
1571
+       if (dbg) zip_debug_rtx_pfx("V1: ", dest);
1572
+       if ((dbg)&&(cc_status.value2)) zip_debug_rtx_pfx("V2: ", src);
1573
+       else if (dbg)   fprintf(stderr, "V2: (No SRC)\n");
1574
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "src refers to dest ?? %s\n",
1575
+               refers_to_regno_p(REGNO(dest),REGNO(dest),src,NULL)?"Yes":"No");
1576
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "Occurrs %d times\n",
1577
+               count_occurrences(dest,src,0));
1578
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "%s mentioned\n",
1579
+               reg_mentioned_p(dest,src)?"Is":"Is not");
1580
+       if ((dbg)&&(REG_P(dest))) fprintf(stderr, "%s referenced\n",
1581
+               reg_referenced_p(dest,src)?"Is":"Is not");
1582
+
1583
+//
1584
+// These results are only used in final.c, where they are used to remove
1585
+// compare instructions if the optimizer is on.  If I produce nothing, no
1586
+// compare instructions will be removed.  If I produce something, a smart
1587
+// decision may be made to remove compare instructions.
1588
+//
1589
+// cc_status will be compared  with subsequent
1590
+//     (set (cc0) (something)) (i.e. compare only) instructions
1591
+//
1592
+//     (set (cc0) (compare (x) (y)))
1593
+//     dst = cc0 -- the destination of the set is ignored, save that it must be
1594
+//             cc0
1595
+//     src1 = (compare (x) (y))
1596
+//     if (src1 == compare)&&(y == (const_int 0))
1597
+//             src2 = (x)
1598
+//     else
1599
+//             src2 = null
1600
+//
1601
+//     Four conditions:
1602
+//     1. if (val1)&&(src1 == val1)
1603
+//             This would be true if I had seen a (set (val1) (src1)) insn
1604
+//             If I have seen a (set (val1) (src1))
1605
+//                     or equivalently a (set (val1) (compare (x) (y)))
1606
+//     or
1607
+//     2. if (val2)&&(src1 == val2)
1608
+//             This would be true if I had seen a (set (val1) (src1)) insn,
1609
+//             and only if val2 was still valid.
1610
+//     or
1611
+//     3. if (src2)&&(value1)&&(src2 == value1)
1612
+//             This would be true if we are comparing against zero, and the
1613
+//             number we are comparing against zero is value 1
1614
+//     or
1615
+//     4. if (src2)&&(value2)&&(src2 == value2)
1616
+//             ... or value2.  This is the common ZipCPU case.
1617
+//
1618
+//             then delete the compare.
1619
+//
1620
+}
1621
+
1622
+
1623
+/* totally buggy - we can't return pointers to nested functions */
1624
+static void
1625
+zip_asm_trampoline_template(FILE *f) {
1626
+       // Whereas at one time I thought I wouldn't need it, now I know I
1627
+       // need this trampoline function, although it is for a completely
1628
+       // different purpose than the one I was familiar with.
1629
+       fprintf(f, "\tldihi 0,r1\n");
1630
+       fprintf(f, "\tldilo 0,r1\n");
1631
+       fprintf(f, "\tjmp r1\n");
1632
+}
1633
+
1634
+/* Worker function for TARGET_TRAMPOLINE_INIT. */
1635
+static void
1636
+zip_trampoline_init(rtx m_tramp ATTRIBUTE_UNUSED,
1637
+       tree fndecl ATTRIBUTE_UNUSED,
1638
+       rtx chain_value ATTRIBUTE_UNUSED) {
1639
+// #warning "This needs to be filled out"
1640
+       abort();
1641
+}
1642
+
1643
+static tree
1644
+def_builtin(const char *name, enum insn_code icode, enum ZIP_BUILTIN_ID_CODE code,
1645
+       tree type)
1646
+{
1647
+       tree t = add_builtin_function(name,type,code,BUILT_IN_MD, NULL, NULL_TREE);
1648
+       zip_basic_check();
1649
+
1650
+       if(t) {
1651
+               zip_builtins[code] = t;
1652
+               zip_builtins_icode[code] = icode;
1653
+       }
1654
+
1655
+       return t;
1656
+
1657
+}
1658
+
1659
+void   zip_init_builtins(void) {
1660
+       zip_basic_check();
1661
+
1662
+  tree void_ftype_void = build_function_type_list(void_type_node, NULL_TREE);
1663
+#ifdef HAVE_zip_rtu
1664
+  def_builtin("zip_rtu", CODE_FOR_zip_rtu, ZIP_BUILTIN_RTU, void_ftype_void);
1665
+#endif
1666
+#ifdef HAVE_zip_halt
1667
+  def_builtin("zip_halt",  CODE_FOR_zip_halt,  ZIP_BUILTIN_HALT, void_ftype_void);
1668
+#endif
1669
+#ifdef HAVE_zip_idle
1670
+  def_builtin("zip_idle", CODE_FOR_zip_idle, ZIP_BUILTIN_IDLE, void_ftype_void);
1671
+#endif
1672
+
1673
+#ifdef HAVE_zip_syscall
1674
+// Support int SYSCALL(callID, int a, int b, int c);
1675
+  def_builtin("zip_syscall", CODE_FOR_zip_syscall, ZIP_BUILTIN_SYSCALL,
1676
+                       build_function_type_list(void_type_node, NULL_TREE));
1677
+#endif
1678
+
1679
+#ifdef HAVE_zip_save_context
1680
+  def_builtin("zip_save_context", CODE_FOR_zip_save_context, ZIP_BUILTIN_SAVE_CONTEXT,
1681
+               build_function_type_list(void_type_node, ptr_type_node, 0));
1682
+#endif
1683
+
1684
+#ifdef HAVE_zip_restore_context
1685
+  def_builtin("zip_restore_context", CODE_FOR_zip_restore_context, ZIP_BUILTIN_RESTORE_CONTEXT,
1686
+       build_function_type_list(void_type_node, ptr_type_node, 0));
1687
+#endif
1688
+
1689
+#ifdef HAVE_zip_bitrev
1690
+  def_builtin("zip_bitrev", CODE_FOR_zip_bitrev, ZIP_BUILTIN_BITREV,
1691
+       build_function_type_list(unsigned_type_node, unsigned_type_node,
1692
+               NULL_TREE));
1693
+#endif
1694
+
1695
+#ifdef HAVE_zip_cc
1696
+  def_builtin("zip_cc", CODE_FOR_zip_cc, ZIP_BUILTIN_CC,
1697
+       build_function_type_list(unsigned_type_node, NULL_TREE));
1698
+#endif
1699
+
1700
+}
1701
+
1702
+static tree
1703
+zip_builtin_decl(unsigned zip_builtin_code, bool initialize_p ATTRIBUTE_UNUSED)
1704
+{
1705
+  if (zip_builtin_code >= ZIP_BUILTIN_MAX)
1706
+    return error_mark_node;
1707
+
1708
+  return zip_builtins[zip_builtin_code];
1709
+}
1710
+
1711
+static rtx
1712
+zip_expand_builtin(tree exp, rtx target,
1713
+               rtx subtarget ATTRIBUTE_UNUSED,
1714
+               machine_mode tmode ATTRIBUTE_UNUSED,
1715
+               int     ignore ATTRIBUTE_UNUSED) {
1716
+
1717
+       tree    fndecl = TREE_OPERAND(CALL_EXPR_FN(exp), 0);
1718
+       bool    nonvoid = (TREE_TYPE(TREE_TYPE(fndecl)) != void_type_node);
1719
+       enum    ZIP_BUILTIN_ID_CODE code=(enum ZIP_BUILTIN_ID_CODE)DECL_FUNCTION_CODE(fndecl);
1720
+       enum    insn_code icode = zip_builtins_icode[code];
1721
+       rtx     pat, op[5];
1722
+       call_expr_arg_iterator  iter;
1723
+       tree    arg;
1724
+
1725
+       if ((code == ZIP_BUILTIN_SAVE_CONTEXT)
1726
+                       ||(code == ZIP_BUILTIN_RESTORE_CONTEXT)) {
1727
+               arg = first_call_expr_arg(exp, &iter);
1728
+               if (arg == error_mark_node)
1729
+                       return NULL_RTX;
1730
+               op[0] = expand_normal(arg);
1731
+               if (GET_CODE(op[0]) != REG)
1732
+                       op[0] = force_reg(Pmode, op[0]);
1733
+               pat = GEN_FCN(icode)(op[0]);
1734
+       } else if (code == ZIP_BUILTIN_BITREV) {
1735
+               arg = first_call_expr_arg(exp, &iter);
1736
+               if (arg == error_mark_node) {
1737
+                       return NULL_RTX;
1738
+               }
1739
+               op[0] = expand_normal(arg);
1740
+               if (!target)
1741
+                       target = gen_reg_rtx(SImode);
1742
+               pat = GEN_FCN(icode)(target, op[0]);
1743
+       } else if (code == ZIP_BUILTIN_CC) {
1744
+               if (!target)
1745
+                       target = gen_reg_rtx(SImode);
1746
+               pat = GEN_FCN(icode)(target);
1747
+       } else // RTU, HALT, IDLE
1748
+               pat = GEN_FCN(icode)();
1749
+       if (!pat)
1750
+               return NULL_RTX;
1751
+       emit_insn(pat);
1752
+       return (nonvoid ? target : const0_rtx);
1753
+}
1754
+
1755
+static bool
1756
+zip_scalar_mode_supported_p(enum machine_mode mode) {
1757
+       zip_basic_check();
1758
+
1759
+       return ((mode)==SImode)||((mode)==DImode); // ||((mode)==SFmode);
1760
+}
1761
+
1762
+static bool
1763
+zip_libgcc_floating_mode_supported_p(enum machine_mode mode) {
1764
+       return ((mode)==SFmode)||((mode)==DFmode);
1765
+}
1766
+
1767
+static int
1768
+zip_address_cost(rtx addr ATTRIBUTE_UNUSED,
1769
+       enum machine_mode mode ATTRIBUTE_UNUSED,
1770
+       addr_space_t as ATTRIBUTE_UNUSED, bool spd ATTRIBUTE_UNUSED) {
1771
+       return 1;
1772
+}
1773
+
1774
+static bool
1775
+zip_mode_dependent_address_p(const_rtx addr ATTRIBUTE_UNUSED,
1776
+       addr_space_t as ATTRIBUTE_UNUSED) {
1777
+       return false;
1778
+}
1779
+
1780
+/*
1781
+static void
1782
+zip_asm_output_anchor(rtx x) {
1783
+       printf("ANCHOR: OP(%d)\n", GET_CODE(x));
1784
+}
1785
+*/
1786
+
1787
+static void
1788
+zip_debug_print(const char *pfx, int lvl, const char *str) {
1789
+       int     i;
1790
+       i = lvl;
1791
+       if ((true)||(lvl == 0))
1792
+               fprintf(stderr, "%s", pfx);
1793
+       else
1794
+               i += strlen(pfx);
1795
+       while(i-->0)
1796
+               fprintf(stderr, "  ");
1797
+       fprintf(stderr, "%s\n", str);
1798
+}
1799
+
1800
+static void
1801
+zip_debug_print_m(const char *pfx, int lvl, const char *str, enum machine_mode m) {
1802
+       int     i;
1803
+
1804
+       i = lvl;
1805
+       if ((true)||(lvl == 0))
1806
+               fprintf(stderr, "%s", pfx);
1807
+       else
1808
+               i = lvl+strlen(pfx);
1809
+       while(i-->0)
1810
+               fprintf(stderr, "  ");
1811
+       switch(m) {
1812
+               case VOIDmode:
1813
+                       fprintf(stderr, "%s:V\n", str);
1814
+                       break;
1815
+               case BLKmode:
1816
+                       fprintf(stderr, "%s:BLK\n", str);
1817
+                       break;
1818
+               case BImode:
1819
+                       fprintf(stderr, "%s:BI\n", str);
1820
+                       break;
1821
+#ifdef HAVE_QImode
1822
+               case QImode:
1823
+                       fprintf(stderr, "%s:QI\n", str);
1824
+                       break;
1825
+#endif
1826
+#ifdef HAVE_HImode
1827
+               case HImode:
1828
+                       fprintf(stderr, "%s:HI\n", str);
1829
+                       break;
1830
+#endif
1831
+               case SImode:
1832
+                       fprintf(stderr, "%s:SI\n", str);
1833
+                       break;
1834
+               case DImode:
1835
+                       fprintf(stderr, "%s:DI\n", str);
1836
+                       break;
1837
+               default:
1838
+                       fprintf(stderr, "%s:?\n", str);
1839
+       }
1840
+}
1841
+
1842
+static void
1843
+zip_debug_rtx_1(const char *pfx, const_rtx x, int lvl) {
1844
+       if (x == NULL_RTX) {
1845
+               zip_debug_print(pfx, lvl, "(NULL-RTX)");
1846
+               return;
1847
+       } else if (GET_CODE(x) > NUM_RTX_CODE) {
1848
+               char    buf[64];
1849
+               sprintf(buf, "(BAD-RTX-CODE %d)", GET_CODE(x));
1850
+               zip_debug_print(pfx, lvl, buf);
1851
+               return;
1852
+       } switch(GET_CODE(x)) { // rtl.def
1853
+       case PARALLEL: zip_debug_print(pfx, lvl, "(PARALLEL");
1854
+               debug_rtx(x); break;
1855
+       case INT_LIST: zip_debug_print(pfx, lvl, "(INT-LIST"); break;
1856
+       case SEQUENCE: zip_debug_print(pfx, lvl, "(SEQUENCE"); break;
1857
+       case ADDRESS: zip_debug_print(pfx, lvl, "(ADDRESS"); break;
1858
+       case DEBUG_INSN: zip_debug_print(pfx, lvl, "(DEBUG-INSN"); break;
1859
+       case INSN:
1860
+               zip_debug_print(pfx, lvl, "(INSN");
1861
+               /*
1862
+               { const rtx_insn *tmp_rtx;
1863
+               for(tmp_rtx = as_a <const rtx_insn *>(x); tmp_rtx != 0; tmp_rtx = NEXT_INSN(tmp_rtx)) {
1864
+                       zip_debug_rtx_1(tmp_rtx, lvl+1);
1865
+               }}
1866
+               */
1867
+               zip_debug_rtx_1(pfx, PATTERN(x), lvl+1);
1868
+               debug_rtx(x);
1869
+               zip_debug_print(pfx, lvl, ")");
1870
+               break;
1871
+       case JUMP_INSN: zip_debug_print(pfx, lvl, "(JUMP-INSN");
1872
+               if (JUMP_LABEL(x)) {
1873
+                       zip_debug_print(pfx, lvl+1, "(w/Label)");
1874
+               } else
1875
+                       zip_debug_print(pfx, lvl+1, "(NO label)");
1876
+               break;
1877
+       case CALL:
1878
+               zip_debug_print(pfx, lvl, "(CALL (Adr) (Args)");
1879
+               zip_debug_rtx_1(pfx, XEXP(x,0), lvl+1);
1880
+               zip_debug_rtx_1(pfx, XEXP(x,1), lvl+1);
1881
+               zip_debug_print(pfx, lvl, ")");
1882
+               break;
1883
+       case CALL_INSN: zip_debug_print(pfx, lvl, "(CALL-INSN");
1884
+               debug_rtx(x);
1885
+               break;
1886
+       case BARRIER: zip_debug_print(pfx, lvl, "(BARRIER)"); break;
1887
+       case RETURN: zip_debug_print(pfx, lvl, "(RETURN)"); break;
1888
+       case NOTE:
1889
+               {       char buf[128];
1890
+                       sprintf(buf, "(NOTE %s)", GET_REG_NOTE_NAME(GET_MODE(x)));
1891
+                       zip_debug_print(pfx, lvl, buf);
1892
+               }break;
1893
+       case COND_EXEC: zip_debug_print(pfx, lvl, "(COND_EXEC)");
1894
+               debug_rtx(x);
1895
+               break;
1896
+       case ASM_INPUT: zip_debug_print(pfx, lvl, "(ASM INPUT)"); break;
1897
+       case ASM_OPERANDS: zip_debug_print(pfx, lvl, "(ASM OPERANDS)"); break;
1898
+       case UNSPEC: zip_debug_print(pfx, lvl, "(UNSPEC)"); break;
1899
+       case UNSPEC_VOLATILE: zip_debug_print(pfx, lvl, "(UNSPEC_VOLATILE)"); break;
1900
+       case CODE_LABEL:
1901
+               {
1902
+                       char    buf[64];
1903
+                       sprintf(buf, "(CODE_LABEL %d)", CODE_LABEL_NUMBER(x));
1904
+                       zip_debug_print_m(pfx, lvl, buf, GET_MODE(x));
1905
+               } break;
1906
+       case SET:
1907
+               zip_debug_print_m(pfx, lvl, "(SET", GET_MODE(x));
1908
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
1909
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
1910
+               zip_debug_print(pfx, lvl, ")");
1911
+               break;
1912
+       case REG:
1913
+               if (REGNO(x) == zip_PC)
1914
+                       zip_debug_print(pfx, lvl, "(PC)");
1915
+               else if (REGNO(x) == zip_CC)
1916
+                       zip_debug_print(pfx, lvl, "(CC0)");
1917
+               else if (REGNO(x) == zip_SP)
1918
+                       zip_debug_print(pfx, lvl, "(SP)");
1919
+               else if (REGNO(x) == zip_FP)
1920
+                       zip_debug_print(pfx, lvl, "(REG FP)");
1921
+               else if (REGNO(x) == zip_GOT)
1922
+                       zip_debug_print(pfx, lvl, "(REG GBL)");
1923
+               else if (FUNCTION_VALUE_REGNO_P(REGNO(x)))
1924
+                       zip_debug_print(pfx, lvl, "(REG RTN-VL)");
1925
+               else if (REGNO(x) == RETURN_ADDRESS_REGNUM)
1926
+                       zip_debug_print(pfx, lvl, "(REG RTN-AD)");
1927
+               else { char buf[25];
1928
+               sprintf(buf, "(REG %d)", REGNO(x));
1929
+               zip_debug_print_m(pfx, lvl, buf, GET_MODE(x));
1930
+               } break;
1931
+       case IF_THEN_ELSE: // 51
1932
+               zip_debug_print(pfx, lvl, "(IF-THEN-ELSE");
1933
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
1934
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
1935
+               zip_debug_rtx_1(pfx, XEXP(x,2),lvl+1);
1936
+               zip_debug_print(pfx, lvl, ")");
1937
+               break;
1938
+       case PC:
1939
+               zip_debug_print(pfx, lvl, "(PC)");
1940
+               break;
1941
+       case CC0:
1942
+               zip_debug_print(pfx, lvl, "(CC0)");
1943
+               break;
1944
+       case COMPARE:
1945
+               zip_debug_print(pfx, lvl, "(COMPARE");
1946
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
1947
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
1948
+               zip_debug_print(pfx, lvl, ")");
1949
+               break;
1950
+       case CONST_INT:
1951
+               { char buf[25];
1952
+               if (GET_MODE(x)==SImode)
1953
+                       sprintf(buf, "(CONST:SI %ld)", INTVAL(x));
1954
+               else if (GET_MODE(x)==VOIDmode)
1955
+                       sprintf(buf, "(CONST:V %ld)", INTVAL(x));
1956
+               else
1957
+                       sprintf(buf, "(CONST:? %ld)", INTVAL(x));
1958
+               zip_debug_print(pfx, lvl, buf);
1959
+               } break;
1960
+       case LABEL_REF:
1961
+               zip_debug_print(pfx, lvl, "(LABEL)");
1962
+               break;
1963
+       case SYMBOL_REF:
1964
+               {
1965
+                       char buf[64];
1966
+                       sprintf(buf, "(SYMBOL: %s)", XSTR(x,0));
1967
+                       // fprintf(file, "%s", XSTR(x,0));
1968
+                       zip_debug_print(pfx, lvl, buf);
1969
+               }
1970
+               break;
1971
+       case MEM:
1972
+               zip_debug_print_m(pfx, lvl, "(MEM", GET_MODE(x));
1973
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
1974
+               zip_debug_print(pfx, lvl, ")");
1975
+               break;
1976
+       /*
1977
+       case VALUE:
1978
+               {
1979
+                       char buf[64];
1980
+                       sprintf(buf, "(VALUE: %d)", INTVAL(XEXP,0));
1981
+                       zip_debug_print_m(pfx, lvl, "buf", GET_MODE(x));
1982
+               }
1983
+               break;
1984
+       */
1985
+       case PLUS:
1986
+               zip_debug_print_m(pfx, lvl, "(PLUS", GET_MODE(x));
1987
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
1988
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
1989
+               zip_debug_print(pfx, lvl, ")");
1990
+               break;
1991
+       case MINUS:
1992
+               zip_debug_print_m(pfx, lvl, "(MINUS", GET_MODE(x));
1993
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
1994
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
1995
+               zip_debug_print(pfx, lvl, ")");
1996
+               break;
1997
+       case AND:
1998
+               zip_debug_print_m(pfx, lvl, "(AND", GET_MODE(x));
1999
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2000
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2001
+               zip_debug_print(pfx, lvl, ")");
2002
+               break;
2003
+       case IOR:
2004
+               zip_debug_print_m(pfx, lvl, "(OR", GET_MODE(x));
2005
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2006
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2007
+               zip_debug_print(pfx, lvl, ")");
2008
+               break;
2009
+       case XOR:
2010
+               zip_debug_print_m(pfx, lvl, "(XOR", GET_MODE(x));
2011
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2012
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2013
+               zip_debug_print(pfx, lvl, ")");
2014
+               break;
2015
+       case MULT:
2016
+               zip_debug_print_m(pfx, lvl, "(MULT", GET_MODE(x));
2017
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2018
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2019
+               zip_debug_print(pfx, lvl, ")");
2020
+               break;
2021
+       case EQ:        //
2022
+               zip_debug_print_m(pfx, lvl, "(EQ", GET_MODE(x));
2023
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2024
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2025
+               zip_debug_print(pfx, lvl, ")");
2026
+               break;
2027
+       case NE:        //
2028
+               zip_debug_print_m(pfx, lvl, "(NE", GET_MODE(x));
2029
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2030
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2031
+               zip_debug_print(pfx, lvl, ")");
2032
+               break;
2033
+       case GE:        //
2034
+               zip_debug_print_m(pfx, lvl, "(GE", GET_MODE(x));
2035
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2036
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2037
+               zip_debug_print(pfx, lvl, ")");
2038
+               break;
2039
+       case GT:        //
2040
+               zip_debug_print_m(pfx, lvl, "(GT", GET_MODE(x));
2041
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2042
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2043
+               zip_debug_print(pfx, lvl, ")");
2044
+               break;
2045
+       case LE:        //
2046
+               zip_debug_print_m(pfx, lvl, "(LE", GET_MODE(x));
2047
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2048
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2049
+               zip_debug_print(pfx, lvl, ")");
2050
+               break;
2051
+       case LT:        //
2052
+               zip_debug_print_m(pfx, lvl, "(LT", GET_MODE(x));
2053
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2054
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2055
+               zip_debug_print(pfx, lvl, ")");
2056
+               break;
2057
+       case GEU:       //
2058
+               zip_debug_print_m(pfx, lvl, "(GEU", GET_MODE(x));
2059
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2060
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2061
+               zip_debug_print(pfx, lvl, ")");
2062
+               break;
2063
+       case GTU:       //
2064
+               zip_debug_print_m(pfx, lvl, "(GTU", GET_MODE(x));
2065
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2066
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2067
+               zip_debug_print(pfx, lvl, ")");
2068
+               break;
2069
+       case LEU:       //
2070
+               zip_debug_print_m(pfx, lvl, "(LEU", GET_MODE(x));
2071
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2072
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2073
+               zip_debug_print(pfx, lvl, ")");
2074
+               break;
2075
+       case LTU:       //
2076
+               zip_debug_print_m(pfx, lvl, "(LTU", GET_MODE(x));
2077
+               zip_debug_rtx_1(pfx, XEXP(x,0),lvl+1);
2078
+               zip_debug_rtx_1(pfx, XEXP(x,1),lvl+1);
2079
+               zip_debug_print(pfx, lvl, ")");
2080
+               break;
2081
+       case SCRATCH:   //
2082
+               zip_debug_print_m(pfx, lvl, "(SCRATCH)", GET_MODE(x));
2083
+               break;
2084
+       case SUBREG:
2085
+               { char buf[25];
2086
+               sprintf(buf, "(SUBREG %d/%d)", REGNO(XEXP(x,0)),
2087
+                       SUBREG_BYTE(x));
2088
+               zip_debug_print(pfx, lvl, buf);
2089
+               } break;
2090
+       default:
2091
+               { char buf[25];
2092
+               sprintf(buf, "(? = %d) -- calling DEBUG-RTX", GET_CODE(x));
2093
+               zip_debug_print(pfx, lvl, buf);
2094
+               debug_rtx(x);
2095
+               } break;
2096
+       }
2097
+}
2098
+
2099
+void
2100
+zip_debug_rtx_pfx(const char *pfx, const_rtx x) {
2101
+       zip_debug_rtx_1(pfx, x, 0);
2102
+}
2103
+
2104
+void
2105
+zip_debug_rtx(const_rtx x) {
2106
+       zip_debug_rtx_pfx("", x);
2107
+}
2108
+
2109
+void
2110
+zip_debug_insn(rtx_insn *insn ATTRIBUTE_UNUSED) {
2111
+}
2112
+
2113
+void
2114
+zip_debug_bb(basic_block bb) {
2115
+       rtx_insn        *insn;
2116
+
2117
+       fprintf(stderr, "************ BASIC-BLOCK ***************\n");
2118
+       FOR_BB_INSNS(bb, insn)
2119
+       {
2120
+               zip_debug_rtx(insn);
2121
+       }
2122
+}
2123
+
2124
+
2125
+static bool
2126
+zip_legitimate_operand_address(const_rtx x, bool strict)
2127
+{
2128 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2129 102 dgisselq
+
2130
+       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPERAND-ADDRESS\n");
2131
+       if (dbg) zip_debug_rtx_pfx("Test: ", x);
2132
+
2133
+       /*
2134
+        * While this might seem to make sense, it sends GCC into an infinite
2135
+        * loop.
2136
+        *
2137
+       if (GET_CODE(x) == MEM) {
2138
+               return (zip_legitimate_operand_address(XEXP(x,0),strict));
2139
+       }
2140
+       */
2141
+
2142
+       /*
2143
+       if (MEM_P(x)) {
2144
+               if((REG_P(XEXP(x,0)))||(GET_CODE(XEXP(x,0))==PLUS))
2145
+                       return (zip_legitimate_operand_address(XEXP(x,0),strict));
2146
+       } else
2147
+       */
2148
+
2149
+       if (NULL_RTX == x)
2150
+               return false;
2151
+       else if ((GET_MODE(x) != SImode)&&(GET_MODE(x) != VOIDmode))
2152
+               return false;
2153
+       else if (REG_P(x)) {
2154
+               // Only insist the register b a valid register if strict is true
2155
+               if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPERAND-ADDRESS -> YES! (Reg)\n");
2156
+               return (!strict)||(REGNO(x) != zip_CC);
2157
+       } else if (GET_CODE(x) == PLUS) {
2158
+               // Is it a valid register?
2159
+               /*
2160
+               if (GET_CODE(XEXP(x,0))==PLUS) {
2161
+                       return (zip_legitimate_operand_address(XEXP(XEXP(x,0),0), strict))
2162
+                               &&(zip_const_address_operand(XEXP(XEXP(x,0),1)));
2163
+               } */
2164
+               if(!REG_P(XEXP(x,0))) {
2165
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPERAND-ADDRESS -> No (No reg in +%s)\n",
2166
+                       (GET_CODE(XEXP(x,1))==REG)?", reg in op[1]":"");
2167
+                       return false;
2168
+               } if ((strict)&&(REGNO(XEXP(x,0)) == zip_CC)) {
2169
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPERAND-ADDRESS -> No (Wrong reg in +, %d)\n", REGNO(XEXP(x,0)));
2170
+                       return false;
2171
+               } if ((GET_CODE(XEXP(x, 1)) == CONST_INT)
2172
+                       &&(INTVAL(XEXP(x, 1)) <= zip_max_anchor_offset)
2173
+                       &&(INTVAL(XEXP(x, 1)) >= zip_min_anchor_offset)) {
2174
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPERAND-ADDRESS -> YES! (reg+int)\n");
2175 103 dgisselq
+                       // if((INTVAL(XEXP(x,1))<0)&&(REGNO(XEXP(x,0))==zip_SP))
2176
+                               // gcc_unreachable();
2177 102 dgisselq
+                       return true;
2178
+               } if ((GET_CODE(XEXP(x, 1)) == LABEL_REF)
2179
+                       ||(GET_CODE(XEXP(x, 1)) == SYMBOL_REF)) {
2180
+                       // While we can technically support this, the problem
2181
+                       // is that the symbol address could be anywhere, and we
2182
+                       // have no way of recovering if it's outside of our
2183
+                       // 14 allowable bits.
2184
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPERAND-ADDRESS -> No. (reg+lbl)\n");
2185
+                       return false;
2186
+               } if ((GET_CODE(XEXP(x, 1)) == MINUS)
2187
+                       &&((GET_CODE(XEXP(XEXP(x,1),0)) == LABEL_REF)
2188
+                               ||(GET_CODE(XEXP(XEXP(x,1),0)) == CONST_INT)
2189
+                               ||(GET_CODE(XEXP(XEXP(x,1),0)) == SYMBOL_REF))
2190
+                       &&((GET_CODE(XEXP(XEXP(x,1),1)) == LABEL_REF)
2191
+                               ||(GET_CODE(XEXP(XEXP(x,1),0)) == CONST_INT)
2192
+                               ||(GET_CODE(XEXP(XEXP(x,1),1)) == SYMBOL_REF))
2193
+                       &&((GET_CODE(XEXP(XEXP(x,1),0)))
2194
+                               == (GET_CODE(XEXP(XEXP(x,1),1))))) {
2195
+                       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPERAND-ADDRESS -> YES! (lbl-lbl+reg)\n");
2196
+                       return true;
2197
+               }
2198
+       }
2199
+
2200
+       if (dbg) fprintf(stderr, "ZIP-LEGITIMATE-OPERAND-ADDRESS -> No\n");
2201
+       if (dbg) zip_debug_rtx(x);
2202
+       return false;
2203
+}
2204
+
2205
+static bool
2206
+zip_legitimate_move_operand_p(machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict) {
2207
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2208
+
2209
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND\n");
2210
+       if (dbg) zip_debug_rtx_pfx("VMov?: ", x);
2211
+
2212
+       if (NULL_RTX == x)
2213
+               return false;
2214
+       else if (REG_P(x)) {
2215
+               // Only insist the register b a valid register if strict is true
2216
+               if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> YES! (Reg)\n");
2217
+               return (!strict)||(REGNO(x) != zip_CC);
2218
+       } else if (GET_CODE(x) == PLUS) {
2219
+               // Is it a valid register?
2220
+               if (GET_CODE(XEXP(x,0))==PLUS) {
2221
+                       return (zip_legitimate_operand_address(XEXP(x,0), strict))
2222
+                               &&(zip_const_address_operand(XEXP(x,0)));
2223
+               } if(GET_CODE(XEXP(x,0)) != REG) {
2224
+                       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> No (No reg in +%s)\n",
2225
+                       (GET_CODE(XEXP(x,1))==REG)?", reg in op[1]":"");
2226
+                       return false;
2227
+               } if ((strict)&&(REGNO(XEXP(x,0)) == zip_CC)) {
2228
+                       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> No (Wrong reg in +, %d)\n", REGNO(XEXP(x,0)));
2229
+                       return false;
2230
+               } if ((GET_CODE(XEXP(x, 1)) == CONST_INT)
2231
+                       &&(INTVAL(XEXP(x, 1)) <= zip_max_mov_offset)
2232
+                       &&(INTVAL(XEXP(x, 1)) >= zip_min_mov_offset)) {
2233
+                       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> YES! (reg+int)\n");
2234
+                       return true;
2235
+               }
2236
+       }
2237
+
2238
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOVE-OPERAND -> No\n");
2239
+       if (dbg) zip_debug_rtx(x);
2240
+       return false;
2241
+}
2242
+
2243
+int
2244
+zip_pd_mov_operand(rtx op)
2245
+{
2246
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2247
+
2248
+       if (dbg) fprintf(stderr, "ZIP-VALID-MOV(predicate) for OPERAND\n");
2249
+       return zip_legitimate_move_operand_p(VOIDmode, op, !can_create_pseudo_p());
2250
+}
2251
+
2252
+int
2253
+zip_address_operand(rtx op)
2254
+{
2255
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2256
+
2257
+       if (dbg) fprintf(stderr, "ZIP-ADDRESS for OPERAND\n");
2258
+       return zip_legitimate_operand_address(op, !can_create_pseudo_p());
2259
+}
2260
+
2261
+int
2262
+zip_pd_address_operand(rtx op)
2263
+{
2264
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2265
+
2266
+       if (dbg) fprintf(stderr, "ZIP-ADDRESS(predicate) for OPERAND\n");
2267
+       return zip_legitimate_operand_address(op, !can_create_pseudo_p());
2268
+}
2269
+
2270
+int
2271
+zip_ct_address_operand(rtx op)
2272
+{
2273
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2274
+
2275
+       if (dbg) fprintf(stderr, "ZIP-ADDRESS(constraint) for OPERAND\n");
2276
+       return zip_legitimate_operand_address(op, !can_create_pseudo_p());
2277
+}
2278
+
2279
+int
2280
+zip_const_address_operand(rtx x) {
2281
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2282
+
2283
+       if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS?\n");
2284
+       if (dbg) zip_debug_rtx(x);
2285
+       if ((GET_MODE(x) != SImode)&&(GET_MODE(x) != VOIDmode))
2286
+               return false;
2287
+       if ((GET_CODE(x) == LABEL_REF)
2288
+                       ||(GET_CODE(x) == CODE_LABEL)
2289
+                       ||(GET_CODE(x) == SYMBOL_REF)) {
2290
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> YES!\n");
2291
+               return true;
2292
+       } else if (CONST_INT_P(x)) {
2293
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> YES!\n");
2294
+               return true;
2295
+       } else if (GET_CODE(x) == PLUS) {
2296
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS(PLUS)\n");
2297
+               return ((zip_const_address_operand(XEXP(x,0)))
2298
+                       &&(CONST_INT_P(XEXP(x,1))));
2299
+       } else if (GET_CODE(x) == MINUS) {
2300
+               if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS(MINUS)\n");
2301
+               return ((zip_const_address_operand(XEXP(x,0)))
2302
+                       &&(zip_const_address_operand(XEXP(x,1))));
2303
+       }
2304
+
2305
+       if (dbg) fprintf(stderr, "is ZIP-CONST-ADDRESS? -> No\n");
2306
+       if (dbg) zip_debug_rtx(x);
2307
+       return false;
2308
+}
2309
+
2310
+int
2311
+zip_ct_const_address_operand(rtx x) {
2312
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2313
+
2314
+       if (dbg) fprintf(stderr, "ZIP-CONST-ADDRESS(constraint)\n");
2315
+       return zip_const_address_operand(x);
2316
+}
2317
+
2318
+int
2319
+zip_pd_const_address_operand(rtx x) {
2320
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2321
+
2322
+       if (dbg) fprintf(stderr, "ZIP-CONST-ADDRESS(predicate)\n");
2323
+       return zip_const_address_operand(x);
2324
+}
2325
+
2326
+
2327
+static bool
2328
+zip_legitimate_address_p(machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict)
2329
+{
2330
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2331
+
2332
+       if (dbg) fprintf(stderr, "Zip-LEGITIMATE-ADDRESS-P\n");
2333
+       if (dbg) zip_debug_rtx(x);
2334
+
2335
+       // Only insist the register be a valid register if strict is true
2336
+       if (zip_legitimate_operand_address(x, strict))
2337
+               return true;
2338
+       else if (zip_const_address_operand(x))
2339
+               return true;
2340
+
2341
+       return false;
2342
+}
2343
+
2344
+void
2345
+zip_asm_output_def(FILE *stream, const char *name, const char *value)
2346
+{
2347
+       assemble_name(stream, name);
2348
+       fprintf(stream, "\t.equ ");
2349
+       assemble_name(stream, value);
2350
+       fputc('\n', stream);
2351
+}
2352
+
2353
+/*
2354
+bool   zip_load_address_lod(rtx regrx, rtx memrx) {
2355
+       fprintf(stderr, "ZIP-LOAD-ADDRESS-LOD\n");
2356
+       if (!MEM_P(memrx))
2357
+               return false;
2358
+       if (GET_CODE(regrx) != REG)
2359
+               return false;
2360
+       enum    rtx_code ic = GET_CODE(memrx);
2361
+       if ((ic == SYMBOL_REF)
2362
+               ||(ic == CODE_LABEL)
2363
+               ||(ic == LABEL_REF)) {
2364
+               if (can_create_pseudo_p()) {
2365
+                       rtx scratch_reg;
2366
+                       scratch_reg = gen_rtx_SCRATCH(SImode);
2367
+                       emit_insn(gen_movsi_ldi(scratch_reg, XEXP(memrx, 0)));
2368
+                       emit_insn(gen_movsi_lod(regrx, scratch_reg));
2369
+                       return true;
2370
+               } else return false;
2371
+       } else return false;
2372
+}
2373
+
2374
+bool   zip_load_address_sto(rtx memrx, rtx regrx) {
2375
+       fprintf(stderr,  "CHECKING-IN-W/ZIP_LOAD_ADDRESS_STORE\n");
2376
+       if (!MEM_P(memrx))
2377
+               return false;
2378
+       if (GET_CODE(regrx) != REG)
2379
+               return false;
2380
+       enum    rtx_code ic = GET_CODE(memrx);
2381
+       if ((ic == SYMBOL_REF)
2382
+               ||(ic == CODE_LABEL)
2383
+               ||(ic == LABEL_REF)) {
2384
+               if (can_create_pseudo_p()) {
2385
+                       rtx scratch_reg;
2386
+                       scratch_reg = gen_rtx_SCRATCH(SImode);
2387
+                       emit_insn(gen_movsi_ldi(scratch_reg, XEXP(memrx, 0)));
2388
+                       emit_insn(gen_movsi_sto(scratch_reg, regrx));
2389
+                       return true;
2390
+               } else return false;
2391
+       } return false;
2392
+}
2393
+*/
2394
+
2395
+#define        SREG_P(RTX) ((REG_P(RTX))||(SUBREG_P(RTX)))
2396
+
2397
+bool   zip_gen_move_rtl(rtx dst, rtx src) {
2398 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2399 102 dgisselq
+
2400
+       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE\n");
2401
+       if (dbg) zip_debug_rtx_pfx("FROM: ", src);
2402
+       if (dbg) zip_debug_rtx_pfx("TO  : ", dst);
2403
+       if (dbg) fprintf(stderr, "PSEUDOs: %s\n", can_create_pseudo_p()?"true":"false");
2404
+       if ((SREG_P(dst))&&(SREG_P(src))) {
2405
+               // First type of move... register to register
2406
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/REG -- EMIT\n");
2407
+               emit_insn(gen_movsi_reg(dst, src));
2408
+       } else if ((MEM_P(dst))&&(MEM_P(XEXP(dst,0)))) {
2409
+               if (can_create_pseudo_p()) {
2410
+                       rtx     tmp = gen_reg_rtx(Pmode);
2411
+                       zip_gen_move_rtl(tmp, XEXP(dst,0));
2412 103 dgisselq
+                       // mark_reg_pointer(tmp,0);
2413 102 dgisselq
+                       zip_gen_move_rtl(gen_rtx_MEM(GET_MODE(src), tmp), src);
2414
+               } else {
2415
+                       fprintf(stderr, "ZIP:Cannot move into mem w/o pseudo\n");
2416
+                       return false;
2417
+               }
2418
+       } else if ((MEM_P(src))&&(MEM_P(XEXP(src,0)))) {
2419
+               if (can_create_pseudo_p()) {
2420
+                       rtx     tmp = gen_reg_rtx(Pmode);
2421
+                       zip_gen_move_rtl(tmp, XEXP(src,0));
2422 103 dgisselq
+                       // mark_reg_pointer(tmp,0);
2423 102 dgisselq
+                       zip_gen_move_rtl(dst, gen_rtx_MEM(GET_MODE(src), tmp));
2424
+               } else {
2425
+                       fprintf(stderr, "ZIP: Cannot move from mem(mem(ptr)) w/o pseudo\n");
2426
+                       return false;
2427
+               }
2428
+       } else if ((SREG_P(dst))&&(GET_CODE(src)==PLUS)
2429
+                       &&(REG_P(XEXP(src,0)))
2430
+                       &&(CONST_INT_P(XEXP(src,1)))) {
2431
+               // Second type of move... register plus offset to register
2432
+               if ((INTVAL(XEXP(src, 1)) <= zip_max_mov_offset)
2433
+                       &&(INTVAL(XEXP(src, 1)) >= zip_min_mov_offset)) {
2434
+                       // The offset is within bounds
2435
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/REG+OFF -- EMIT\n");
2436
+                       emit_insn(gen_movsi_reg_off(dst, XEXP(src,0),XEXP(src,1)));
2437
+               } else if (can_create_pseudo_p()) {
2438
+                       // The offset is out of bounds, get a new register and
2439
+                       // generate an add instruction to split this up.
2440
+                       rtx     tmp = gen_reg_rtx(GET_MODE(XEXP(src,0)));
2441
+
2442
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LDI\n");
2443
+                       emit_insn(gen_movsi_ldi(tmp, XEXP(src,1)));
2444
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/ADD\n");
2445
+                       emit_insn(gen_addsi3(tmp, tmp, XEXP(src,0)));
2446
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/DST\n");
2447
+                       emit_insn(gen_movsi_reg(dst, tmp));
2448
+               } else {
2449
+                       fprintf(stderr, "ZIP: Cannot move a(r),b w/o pseudo for out of bounds a\n");
2450
+                       return false;
2451
+               }
2452
+       } else if ((MEM_P(dst))&&(MEM_P(src))) {
2453
+               rtx     tmp;
2454
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/MEM/MEM\n");
2455
+               if (can_create_pseudo_p()) {
2456
+                       tmp = gen_reg_rtx(GET_MODE(src));
2457
+                       emit_insn(gen_movsi(tmp, src));
2458
+                       emit_insn(gen_movsi(dst, tmp));
2459
+               } else {
2460
+                       fprintf(stderr, "ZIP: Cannot move mem(A) to mem(B) w/o pseudo\n");
2461
+                       return false;
2462
+               }
2463
+       } else if ((SREG_P(dst))&&(MEM_P(src))) {
2464
+               // Memory load
2465
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LOD\n");
2466
+               if (zip_legitimate_operand_address(XEXP(src, 0), false)) {
2467
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/SIMPLE-LOD(ADDR)\n");
2468
+                       if (dbg) zip_debug_rtx_pfx("Smple-Addr: ", src);
2469 103 dgisselq
+                       // if (REG_P(XEXP(src,0)))
2470
+                               // mark_reg_pointer(XEXP(src,0),0);
2471
+                       // else if ((GET_CODE(XEXP(src,0))==PLUS)
2472
+                                       // &&(REG_P(XEXP(XEXP(src,0),0))))
2473
+                               // mark_reg_pointer(XEXP(XEXP(src,0),0),0);
2474 102 dgisselq
+                       emit_insn(gen_movsi_lod(dst, src));
2475
+               } else if (zip_const_address_operand(XEXP(src,0))) {
2476
+                       if (can_create_pseudo_p()) {
2477
+                               rtx     tmp;
2478
+                               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LOD(CONST-ADDR)\n");
2479
+                               tmp = gen_reg_rtx(Pmode);
2480
+                               emit_insn(gen_movsi_ldi(tmp, XEXP(src,0)));
2481 103 dgisselq
+                               // mark_reg_pointer(tmp,0);
2482 102 dgisselq
+                               emit_insn(gen_movsi_lod(dst, gen_rtx_MEM(GET_MODE(src),tmp)));
2483
+                       } else {
2484
+                               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LOD(CONST-ADDR,SELF)\n");
2485
+                               emit_insn(gen_movsi_ldi(dst, XEXP(src,0)));
2486
+                               emit_insn(gen_movsi_lod(dst, gen_rtx_MEM(GET_MODE(src),dst)));
2487
+                       }
2488
+               } else {
2489
+                       internal_error("%s", "ZIP/No usable load\n");
2490
+               }
2491
+       } else if ((MEM_P(dst))&&(SREG_P(src))) {
2492
+               // Memory store
2493
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO\n");
2494
+               if (zip_legitimate_operand_address(XEXP(dst, 0), false)) {
2495
+                       // If it's a legitimate address already, do nothing mor
2496
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO(Legit Addr)--EMIT\n");
2497 103 dgisselq
+                       // if (REG_P(XEXP(dst,0)))
2498
+                               // mark_reg_pointer(XEXP(dst,0),0);
2499
+                       // else if ((GET_CODE(XEXP(dst,0))==PLUS)
2500
+                                       // &&(REG_P(XEXP(XEXP(dst,0),0))))
2501
+                               // mark_reg_pointer(XEXP(XEXP(dst,0),0),0);
2502 102 dgisselq
+                       emit_insn(gen_movsi_sto(dst, src));
2503
+               } else if (zip_const_address_operand(XEXP(dst,0))) {
2504
+                       rtx     tmp;
2505
+
2506
+                       if (can_create_pseudo_p()) {
2507
+                               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO(Const Addr,Reg) -- EMIT\n");
2508
+                               // Otherwise we need to load the memory address
2509
+                               // into a register
2510
+                               tmp = gen_reg_rtx(Pmode);
2511 103 dgisselq
+                               // mark_reg_pointer(tmp,0);
2512 102 dgisselq
+                               emit_insn(gen_movsi_ldi(tmp, XEXP(dst,0)));
2513
+                               //
2514
+                               // Then we can do our load
2515
+                               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO -- emit\n");
2516
+                               emit_insn(gen_movsi_sto(gen_rtx_MEM(GET_MODE(src), tmp), src));
2517
+                       } else {
2518
+                               fprintf(stderr, "Cannot move src -> mem(dst) w/o pseudo\n");
2519
+                               return false;
2520
+                       }
2521
+               } else if (can_create_pseudo_p())
2522
+                       internal_error("%s", "ZIP/No usable store\n");
2523
+               else {
2524
+                       fprintf(stderr, "ZIP/Unanticipated store problem\n");
2525
+                       return false;
2526
+               }
2527
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/STO -- DONE\n");
2528
+       } else if ((MEM_P(dst))&&((CONST_INT_P(src))||(GET_CODE(src)==SYMBOL_REF))) {
2529
+               // Store a constant into memory
2530
+               rtx     tmp;
2531
+
2532
+               if (can_create_pseudo_p()) {
2533
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/CONST->MEM\n");
2534
+                       // Load the source constant into a register first
2535
+                       tmp = gen_reg_rtx((GET_MODE(src)==VOIDmode)?GET_MODE(dst):GET_MODE(src));
2536
+                       emit_insn(gen_movsi_ldi(tmp,src));
2537
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/CONST->REG->MEM -- RECURSE\n");
2538
+
2539
+                       // Then do a normal move, recursing to handle memory
2540
+                       // properly
2541
+                       zip_gen_move_rtl(dst, tmp);
2542
+                       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/CONST->MEM -- DONE\n");
2543
+               } else {
2544
+                       fprintf(stderr, "ZIP/Cannot store constant into mem w/o pseudo\n");
2545
+                       return false;
2546
+               }
2547
+       } else if ((SREG_P(dst))&&(CONST_INT_P(src))) {
2548
+               // Load a constant into a register
2549
+               // The assembler really takes care of all of this, since
2550
+               // the assembler will split the constant if it doesn't fit
2551
+               // into a single instruction.
2552
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/CONST->REG\n");
2553
+               // if ((GET_MODE(dst)==VOIDmode)&&(GET_MODE(src)==VOIDmode))
2554
+                       // PUT_MODE(dst,SImode);
2555
+               emit_insn(gen_movsi_ldi(dst, src));
2556
+       } else if ((REG_P(dst))&&
2557
+                       ((LABEL_P(src))
2558
+                       ||(GET_CODE(src)==SYMBOL_REF)
2559
+                       ||(GET_CODE(src)==LABEL_REF))) {
2560
+               // Load a constant into a register
2561
+               // The assembler really takes care of all of this, since
2562
+               // the assembler will split the constant if it doesn't fit
2563
+               // into a single instruction.
2564
+               if (dbg) fprintf(stderr, "ZIP-GEN-MOVE/LABEL->REG\n");
2565
+               emit_insn(gen_movsi_ldi(dst, src));
2566
+       } else {
2567
+               fprintf(stderr, "ZIP/No usable move\n");
2568
+               zip_debug_rtx_pfx("TO  : ", dst);
2569
+               zip_debug_rtx_pfx("FROM: ", src);
2570
+               debug_rtx(dst);
2571
+               debug_rtx(src);
2572
+               return false;
2573
+       }
2574
+       if (dbg) fprintf(stderr, "ZIP-GEN-MOVE -- DONE\n");
2575
+       return true;
2576
+}
2577
+
2578
+const char *zip_set_zero_or_one(rtx condition, rtx dst) {
2579 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2580 102 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::SET-ZERO-OR-ONE\n");
2581
+       if (dbg) zip_debug_rtx_pfx("CND", condition);
2582
+       if (dbg) zip_debug_rtx_pfx("REG", dst);
2583
+       switch(GET_CODE(condition)) {
2584
+       case EQ:        return "LDI\t0,%0\n\tLDILO.Z\t1,%0";
2585
+       case NE:        return "LDI\t0,%0\n\tLDILO.NZ\t1,%0";
2586
+       case LT:        return "LDI\t0,%0\n\tLDILO.LT\t1,%0";
2587
+       case GT:        return "LDI\t0,%0\n\tLDILO.GT\t1,%0";
2588
+       case LE:        return "LDI\t1,%0\n\tLDILO.GT\t0,%0";
2589
+       case GE:        return "LDI\t0,%0\n\tLDILO.GE\t1,%0";
2590
+       case LTU:       return "LDI\t0,%0\n\tLDILO.C\t1,%0";
2591
+       case GTU:       return "LDI\t1,%0\n\tLDILO.C\t0,%0\n\tLDILO.Z\t0,%0";
2592
+       case LEU:       return "LDI\t0,%0\n\tLDILO.C\t1,%0\n\tLDILO.Z\t1,%0";
2593
+       case GEU:       return "LDI\t1,%0\n\tLDILO.C\t0,%0";
2594
+       default:
2595
+               zip_debug_rtx(condition);
2596
+               internal_error("CSTORE Unsupported condition");
2597
+               return NULL;
2598
+       }
2599
+}
2600
+
2601
+const char *zip_binary_movsicc(rtx_code condition, const char *op, const int opno) {
2602
+       static char     result[64] = "";
2603
+       switch(condition) {
2604
+               //
2605
+               // Result already exists in the iffalse register
2606
+               // Can't change it.  Therefore, on the
2607
+               // condition ... move true register to the
2608
+               // destination
2609
+               //
2610
+               case EQ:        sprintf(result, "%s.Z\t%%%d,%%0", op, opno); break;
2611
+               case NE:        sprintf(result, "%s.NZ\t%%%d,%%0", op, opno); break;
2612
+               case LT:        sprintf(result, "%s.LT\t%%%d,%%0", op, opno); break;
2613
+               case GT:        sprintf(result, "%s.GT\t%%%d,%%0", op, opno); break;
2614
+               // .LE doesn't exist on Zip CPU--turn this into two instructions
2615
+               case LE:        sprintf(result, "%s.LT\t%%%d,%%0\n\t%s.Z\t%%%d,%%0", op, opno, op, opno); break;
2616
+               case GE:        sprintf(result, "%s.GE\t%%%d,%%0", op, opno); break;
2617
+               case LTU:       sprintf(result, "%s.C\t%%%d,%%0", op, opno); break;
2618
+               //
2619
+               // .GTU doesn't exist on the Zip CPU either. We also note that
2620
+               // .C will never be set on an equal condition.  Therefore, we
2621
+               // turn this into a XOR.NZ 2,CC, which will set the .C condition
2622
+               // as long as .Z wasn't true.  We then undo this when we're
2623
+               // done.  This is possible since none of these instructions
2624
+               // (LDI/MOV/Lod conditional, nor Xor conditional) will ever set
2625
+               // the condition codes.
2626
+               //
2627
+               // This is obviously not very optimal.  Avoid this by all means
2628
+               // if you can
2629
+               case GTU:       sprintf(result, "XOR.NZ\t2,CC\n%s.C\t%%%d,%%0\n\tXOR.NZ\t2,CC", op, opno); break;
2630
+               // .LEU doesn't exist on Zip CPU either--turn this into another
2631
+               // two instructions
2632
+               case LEU:       sprintf(result, "%s.C\t%%%d,%%0\n\t%s.Z\t%%%d,%%0", op, opno, op, opno); break;
2633
+               //
2634
+               // .GEU doesn't exist on Zip CPU.  Implementing it her is
2635
+               // painful.  We can change the condition codes to make it so,
2636
+               // but the instruction requires the condition codes not be
2637
+               // changed.  Hence, we must change them back if we do so.
2638
+               //
2639
+               // .C will be set on less than but not equal.  Hence !.C will
2640
+               // be true on greater than or equal.
2641
+               case GEU:       sprintf(result, "XOR\t2,CC\n%s.C\t%%%d,%%0\n\tXOR\t2,CC", op, opno); break;
2642
+               default:
2643
+                       internal_error("MOVSICC(BINARY) Unsupported condition");
2644
+                       return NULL;
2645
+       } return result;
2646
+}
2647
+
2648
+const char *zip_tertiary_movsicc(rtx condition, const char *optrue, const char *opfalse) {
2649
+       static  char    result[64] = "";
2650
+       switch(GET_CODE(condition)) {
2651
+               case EQ:        sprintf(result,"%s\t%%3,%%0\n\t%s.Z\t%%2,%%0", opfalse, optrue); break;
2652
+               case NE:        sprintf(result,"%s\t%%3,%%0\n\t%s.NZ\t%%2,%%0", opfalse, optrue); break;
2653
+               case LT:        sprintf(result,"%s\t%%3,%%0\n\t%s.LT\t%%2,%%0", opfalse, optrue); break;
2654
+               case GT:        sprintf(result,"%s\t%%3,%%0\n\t%s.GT\t%%2,%%0", opfalse, optrue); break;
2655
+               // LE doesn't exist on a Zip CPU.  Accomplish this by
2656
+               // reversing the condition: i.e., load the false value into
2657
+               // the register, and the on condition load the true value.
2658
+               case LE:        sprintf(result,"%s\t%%2,%%0\n\t%s.GT\t%%3,%%0", optrue, opfalse); break;
2659
+               case GE:        sprintf(result,"%s\t%%3,%%0\n\t%s.GE\t%%2,%%0", opfalse, optrue); break;
2660
+               case LTU:       sprintf(result,"%s\t%%3,%%0\n\t%s.C\t%%2,%%0", opfalse, optrue); break;
2661
+               //
2662
+               case GTU:       sprintf(result,"%s\t%%2,%%0\n\t%s.C\t%%3,%%0\n\t%s.Z\t%%3,%%0", optrue, opfalse, opfalse); break;
2663
+               case LEU:       sprintf(result,"%s\t%%3,%%0\n\t%s.C\t%%2,%%0\n\t%s.Z\t%%2,%%0", opfalse, optrue, optrue); break;
2664
+               case GEU:       sprintf(result,"%s\t%%2,%%0\n\t%s.C\t%%3,%%0\n", optrue, opfalse); break;
2665
+               default:
2666
+                       internal_error("MOVSICC Unsupported condition");
2667
+                       return NULL;
2668
+       } return result;
2669
+}
2670
+
2671
+const char *zip_movsicc(rtx dst, rtx condition, rtx iftrue, rtx iffalse) {
2672 103 dgisselq
+       const bool      dbg = ((ALL_DEBUG_ON)||(false))&&(!ALL_DEBUG_OFF);
2673 102 dgisselq
+       if (dbg) fprintf(stderr, "ZIP::MOVSICC\n");
2674
+       if (dbg) zip_debug_rtx_pfx("DST", dst);
2675
+       if (dbg) zip_debug_rtx_pfx("CND", condition);
2676
+       if (dbg) zip_debug_rtx_pfx("TRU", iftrue);
2677
+       if (dbg) zip_debug_rtx_pfx("FAL", iffalse);
2678
+       if ((REG_P(iftrue))&&(REGNO(dst)==REGNO(iftrue))) {
2679
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- CASE if(X) -> R\n");
2680
+               if (zip_legitimate_move_operand_p(SImode, iffalse, true))
2681
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "MOV", 3);
2682
+               else if (zip_const_address_operand(iffalse))
2683
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "LDI", 3);
2684
+               else if (zip_const_address_operand(iffalse))
2685
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "LDI", 3);
2686
+               else if ((MEM_P(iffalse))&&(zip_legitimate_operand_address(XEXP(iffalse,0), true)))
2687
+                       return zip_binary_movsicc(reverse_condition(GET_CODE(condition)), "LOD", 3);
2688
+               else {
2689
+                       internal_error("MOVSICC Unsupported mode");
2690
+                       return NULL;
2691
+               }
2692
+       } if ((REG_P(iftrue))&&(REGNO(dst)==REGNO(iftrue))) {
2693
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- CASE if(!X) -> R\n");
2694
+               if (zip_legitimate_move_operand_p(SImode, iftrue, true))
2695
+                       return zip_binary_movsicc(GET_CODE(condition), "MOV",2);
2696
+               else if (zip_const_address_operand(iffalse))
2697
+                       return zip_binary_movsicc(GET_CODE(condition), "LDI",2);
2698
+               else if (zip_const_address_operand(iffalse))
2699
+                       return zip_binary_movsicc(GET_CODE(condition), "LDI",2);
2700
+               else if ((MEM_P(iffalse))&&(zip_legitimate_operand_address(XEXP(iffalse,0), true)))
2701
+                       return zip_binary_movsicc(GET_CODE(condition), "LOD",2);
2702
+               else {
2703
+                       internal_error("MOVSICC Unsupported mode");
2704
+                       return NULL;
2705
+               }
2706
+       } if ((zip_const_address_operand(iftrue))&&(zip_const_address_operand(iffalse))) {
2707
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) #1 ELSE #2\n");
2708
+               return zip_tertiary_movsicc(condition, "LDI", "LDI");
2709
+       } if ((zip_const_address_operand(iftrue))&&(zip_legitimate_move_operand_p(SImode, iffalse, true))) {
2710
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) #1 ELSE A+B\n");
2711
+               return zip_tertiary_movsicc(condition, "LDI", "MOV");
2712
+       } if ((zip_legitimate_move_operand_p(SImode, iftrue, true))&&(zip_const_address_operand(iffalse))) {
2713
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A+B ELSE #x\n");
2714
+               return zip_tertiary_movsicc(condition, "MOV", "LDI");
2715
+       } if ((zip_legitimate_move_operand_p(SImode, iftrue, true))
2716
+                       &&(zip_legitimate_move_operand_p(SImode, iffalse, true))) {
2717
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A+B ELSE C+D\n");
2718
+               return zip_tertiary_movsicc(condition, "MOV", "MOV");
2719
+       }
2720
+       if ((MEM_P(iftrue))
2721
+               &&(zip_legitimate_operand_address(XEXP(iftrue,0), true))
2722
+               &&(zip_legitimate_move_operand_p(SImode, iffalse, true))) {
2723
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A[B] ELSE C+D\n");
2724
+               return zip_tertiary_movsicc(condition, "LOD", "MOV");
2725
+       } if ((zip_legitimate_move_operand_p(SImode, iftrue, true))
2726
+               &&(MEM_P(iffalse))&&(zip_legitimate_operand_address(XEXP(iffalse,0), true))) {
2727
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A+B ELSE C[D]\n");
2728
+               return zip_tertiary_movsicc(condition, "MOV", "LOD");
2729
+       } if ((MEM_P(iftrue))&&(zip_legitimate_operand_address(XEXP(iftrue,0), true))
2730
+               &&(MEM_P(iffalse))&&(zip_legitimate_operand_address(XEXP(iffalse,0), true))) {
2731
+               if (dbg) fprintf(stderr, "ZIP::MOVSICC -- IF(X) A[B] ELSE C[D]\n");
2732
+               return zip_tertiary_movsicc(condition, "LOD", "LOD");
2733
+       }
2734
+
2735
+       internal_error("MOVSICC Operands not supported");
2736
+}
2737
+
2738
+const char *zip_addsicc(rtx dst, rtx condition, rtx ifsrc, rtx addv ATTRIBUTE_UNUSED) {
2739
+       // We know upon entry that REG_P(dst) must be true
2740
+       if (!REG_P(dst))
2741
+               internal_error("%s","ADDSICC into something other than register");
2742
+       if ((REG_P(ifsrc))&&(REGNO(dst)==REGNO(ifsrc))) {
2743
+               switch (GET_CODE(condition)) {
2744
+               case EQ: return "ADD.Z\t%3,%0";
2745
+               case NE: return "ADD.NZ\t%3,%0";
2746
+               case LT: return "ADD.LT\t%3,%0";
2747
+               case GT: return "ADD.GT\t%3,%0";
2748
+               case LE: return "ADD.LT\t%3,%0\n\tADD.Z\t%3,%0";
2749
+               case GE: return "ADD.GE\t%3,%0";
2750
+               case LTU: return "ADD.C\t%3,%0";
2751
+               case LEU: return "ADD.C\t%3,%0\n\tADD.Z\t%3,%0";
2752
+               case GEU: return "XOR\t2,CC\n\tADD.C\t%3,%0\n\tXOR\t2,CC";
2753
+               // Can do a GEU comparison, and then undo on the Zero condition
2754
+               case GTU: return "XOR\t2,CC\n\tADD.C\t%3,%0\n\tSUB.Z\t%3,%0\n\tXOR\t2,CC";
2755
+               default:
2756
+                       internal_error("%s", "Zip/No usable addsi expansion");
2757
+                       break;
2758
+               }
2759
+       } else {
2760
+               // MOV A+REG,REG
2761
+               switch (GET_CODE(condition)) {
2762
+               case EQ: return "MOV.Z\t%3+%2,%0";
2763
+               case NE: return "MOV.NZ\t%3+%2,%0";
2764
+               case LT: return "MOV.LT\t%3+%2,%0";
2765
+               case GT: return "MOV.GT\t%3+%2,%0";
2766
+               case LE: return "MOV.LT\t%3+%2,%0\n\tMOV.Z\t%3+%2,%0";
2767
+               case GE: return "MOV.GE\t%3+%2,%0";
2768
+               case LTU: return "MOV.C\t%3+%2,%0";
2769
+               case LEU: return "MOV.C\t%3+%2,%0\n\tMOV.Z\t%3+%2,%0";
2770
+               case GEU: return "XOR\t2,CC\n\tMOV.C\t%3+%2,%0\n\tXOR\t2,CC";
2771
+               // Can do a GEU comparison, and then undo on the Zero condition
2772
+               // EXCEPT: with a move instruction, what's there to undo?  We
2773
+               // just clobbered our register!
2774
+               // case GTU: return "XOR\t2,CC\n\tMOV.C\t%3,%0\n\tSUB.Z\t%3,%0XOR\t2,CC";
2775
+               default:
2776
+                       internal_error("%s", "Zip/No usable addsi(reg,reg) expansion");
2777
+                       break;
2778
+               }
2779
+       }
2780
+
2781
+       return "BREAK";
2782
+}
2783
+
2784
+static void
2785
+zip_canonicalize_comparison(int *code ATTRIBUTE_UNUSED, rtx *op0 ATTRIBUTE_UNUSED, rtx *op1 ATTRIBUTE_UNUSED, bool preserve_op0 ATTRIBUTE_UNUSED)
2786
+{
2787
+/*
2788
+ * While I'd like to keep and have this code, it does absolutely nothing.  The
2789
+ * code apparently only gets called on non-CC0 targets.
2790
+ *
2791
+ *
2792
+       const bool      dbg = true;
2793
+
2794
+       if (dbg) fprintf(stderr, "CANONICALIZE ...%s\n", (preserve_op0)?"(Preserve Op0)":"");
2795
+       if (dbg) zip_debug_rtx_pfx("CODE", gen_rtx_fmt_ee((rtx_code)*code, VOIDmode, cc0_rtx, const0_rtx));
2796
+       if (dbg) zip_debug_rtx_pfx("OP0 ", *op0);
2797
+       if (dbg) zip_debug_rtx_pfx("OP1 ", *op1);
2798
+
2799
+       if ((!preserve_op0)&&((*code == LE)||(*code == GTU)||(*code == GEU))) {
2800
+               rtx tem = *op0;
2801
+               *op0 = *op1;
2802
+               *op1 = tem;
2803
+               *code = (int)swap_condition((enum rtx_code)*code);
2804
+       }
2805
+
2806
+       if ((*code == LE)||(*code == LEU)||(*code==GTU)) {
2807
+               int     offset = (*code == GTU) ? 1 : -1;
2808
+               bool    swap = false;
2809
+               // A < B => A <= B-1
2810
+               if (CONST_INT_P(*op1)) {
2811
+                       *op1 = GEN_INT(INTVAL(*op1)+offset);
2812
+                       swap = true;
2813
+               } else if (REG_P(*op1)) {
2814
+                       *op1 = plus_constant(SImode, *op1, offset, true);
2815
+                       swap = true;
2816
+               } else if ((GET_CODE(*op1)==PLUS)&&(CONST_INT_P(XEXP(*op1,1)))){
2817
+                       *op1 = plus_constant(GET_MODE(*op1),XEXP(*op1,0),
2818
+                                       INTVAL(XEXP(*op1,1))+offset);
2819
+                       swap = true;
2820
+               } if (swap) {
2821
+                       if (*code == LE)
2822
+                               (*code) = LT;
2823
+                       else if (*code == LEU)
2824
+                               (*code) = LTU;
2825
+                       else // (*code) == GTU
2826
+                               (*code) = GEU;
2827
+               }
2828
+       }
2829
+*/
2830
+}
2831
+
2832 103 dgisselq
+static int     zip_memory_move_cost(machine_mode mode, reg_class_t ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) {
2833 102 dgisselq
+       int     rv = 14;
2834
+       if ((mode == DImode)||(mode == DFmode))
2835
+               rv += 2;
2836
+       return rv;
2837
+}
2838
+
2839 103 dgisselq
+// #warning "How do we tell the compiler LDI label is expensive as 2 ops"?
2840 102 dgisselq
+
2841
diff -Naur '--exclude=*.swp' gcc-5.3.0-original/gcc/config/zip/zip.h gcc-5.3.0-zip/gcc/config/zip/zip.h
2842
--- gcc-5.3.0-original/gcc/config/zip/zip.h     1969-12-31 19:00:00.000000000 -0500
2843 103 dgisselq
+++ gcc-5.3.0-zip/gcc/config/zip/zip.h  2016-03-07 20:19:32.623843475 -0500
2844
@@ -0,0 +1,3707 @@
2845 102 dgisselq
+////////////////////////////////////////////////////////////////////////////////
2846
+//
2847
+// Filename:   gcc/config/zip/zip.h
2848
+//
2849
+// Project:    Zip CPU backend for the GNU Compiler Collection
2850
+//
2851
+// Purpose:
2852
+//
2853
+// Creator:    Dan Gisselquist, Ph.D.
2854
+//             Gisselquist Technology, LLC
2855
+//
2856
+////////////////////////////////////////////////////////////////////////////////
2857
+//
2858
+// Copyright (C) 2016, Gisselquist Technology, LLC
2859
+//
2860
+// This program is free software (firmware): you can redistribute it and/or
2861
+// modify it under the terms of  the GNU General Public License as published
2862
+// by the Free Software Foundation, either version 3 of the License, or (at
2863
+// your option) any later version.
2864
+//
2865
+// This program is distributed in the hope that it will be useful, but WITHOUT
2866
+// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
2867
+// FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
2868
+// for more details.
2869
+//
2870
+// You should have received a copy of the GNU General Public License along
2871
+// with this program.  (It's in the $(ROOT)/doc directory, run make with no
2872
+// target there if the PDF file isn't present.)  If not, see
2873
+// <http://www.gnu.org/licenses/> for a copy.
2874
+//
2875
+// License:    GPL, v3, as defined and found on www.gnu.org,
2876
+//             http://www.gnu.org/licenses/gpl.html
2877
+//
2878
+//
2879
+////////////////////////////////////////////////////////////////////////////////
2880
+#ifndef        GCC_ZIP_H
2881
+#define        GCC_ZIP_H
2882
+
2883
+
2884
+//
2885
+//
2886
+// Zip CPU configuration registers
2887
+//
2888
+//
2889
+#define        ZIP_USER        0        // Assume we are in supervisor mode
2890
+#define        ZIP_MULTIPLY    1       // Assume we have multiply instructions
2891
+#define        ZIP_DIVIDE      1       // Assume we have divide instructions
2892
+#define        ZIP_FPU         0        // Assume we have no floating point instructions
2893
+#define        ZIP_PIPELINED   1       // Assume our instructions are pipelined
2894
+#define        ZIP_VLIW        1       // Assume we have the VLIW feature
2895
+#define        ZIP_ATOMIC      ((ZIP_PIPELINED)&&(ZIP_VLIW))
2896
+#define        ZIP_PIC         0        // Attempting to produce PIC code, with GOT
2897
+#define        ZIP_HAS_DI      1
2898
+
2899
+// Zip has 16 registers in each user mode.
2900
+//     Register 15 is the program counter (PC)
2901
+//     Register 14 is the condition codes (CC)
2902
+//     Register 13 is the stack pointer   (SP)
2903
+//     Register 12 (may be) the Global Offset Table pointer (GOT)
2904
+//     Register  0 (may be) the return address pointer
2905
+// Registers 16-31 may only be used in supervisor mode.
2906
+#define        is_ZIP_GENERAL_REG(REGNO)       ((REGNO)<13)
2907
+#define        is_ZIP_REG(REGNO)               ((REGNO)<16)
2908
+
2909
+#undef STARTFILE_SPEC
2910
+#define        STARTFILE_SPEC  "_start"
2911
+
2912
+#undef ENDFILE_SPEC
2913
+#define        ENDFILE_SPEC    ""
2914
+
2915
+#undef LIB_SPEC
2916
+#define        LIB_SPEC        "%{!g:-lc} %{g:-lg} -lzip"
2917
+
2918 103 dgisselq
+// #define     zip_FP_PSEUDO   16
2919
+#define        zip_PC          15
2920
+#define        zip_CC          14
2921
+#define        zip_SP          13
2922
+#define        zip_FP          12
2923
+#define        zip_GOT         11
2924
+#define        zip_AP          10
2925
+#define        zip_R1          1
2926
+#define        zip_R0          0
2927 102 dgisselq
+
2928
+#define        ZIP_FIRST_ARG_REGNO     1
2929
+#define        ZIP_LAST_ARG_REGNO      5
2930
+#define        NUM_ARG_REGS            5
2931
+#define        MAX_PARM_REGS           5
2932
+
2933
+/* The overall framework of an assembler file */
2934
+
2935
+#undef ASM_SPEC
2936
+#define        ASM_COMMENT_START       ";"
2937
+#define        ASM_APP_ON              ""
2938
+#define        ASM_APP_OFF             ""
2939
+
2940
+#define        FILE_ASM_OP             "\t.file\n"
2941
+
2942
+/* Output and Generation of Labels */
2943
+#define        GLOBAL_ASM_OP           "\t.global\t"
2944
+
2945
+#undef BITS_PER_UNIT
2946
+#define        BITS_PER_UNIT   (32)
2947
+
2948
+/* Assembler Commands for Alignment */
2949
+#define        ASM_OUTPUT_ALIGN(STREAM,POWER)  \
2950
+               { int pwr = POWER; fprintf(STREAM, "\t.p2align %d\n", (pwr<2)?2:pwr); }
2951
+
2952
+
2953
+/* A C compound statement to output to stdio stream STREAM the assembler syntax
2954
+ * for an instruction operand X. */
2955
+#define        PRINT_OPERAND(STREAM, X, CODE)  zip_print_operand(STREAM, X, CODE)
2956
+#define        PRINT_OPERAND_ADDRESS(STREAM, X) zip_print_operand_address(STREAM, X)
2957
+
2958
+/* Passing arguments in registers */
2959
+#define        FUNCTION_VALUE_REGNO_P(REGNO)   ((REGNO)==zip_R1)
2960
+
2961
+/* Define how to find the value returned by a function.  VALTYPE is the data
2962
+ * type of the value (as a tree).  If the precise function being called is known
2963
+ * FUNC is its FUNCTION_DECL; otherwise, FUNC is 0. */
2964
+#define        FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG(TYPE_MODE(VALTYPE), zip_R1)
2965
+
2966
+/* Define how to find the value returned by a library function assuming the
2967
+ * value has mode MODE.
2968
+ */
2969
+#define        LIBCALL_VALUE(MODE)     gen_rtx_REG(MODE, zip_R1)
2970
+
2971
+
2972
+/* STACK AND CALLING */
2973
+
2974
+
2975
+/* Define this macro as a C expression that is nonzero for registers that are
2976
+ * used by the epilogue or the return pattern.  The stack and frame pointer
2977
+ * registers are already assumed to be used as needed.
2978
+ */
2979
+#define        EPILOGUE_USES(R)        (R == RETURN_ADDRESS_REGNUM)
2980
+
2981
+
2982
+/* Normal alignment required for function parameters on the stack, in bits.  All
2983
+ * stack parameters receive at leaswt this much alignment regardless of data
2984
+ * type. */
2985
+#define        PARM_BOUNDARY   32
2986
+
2987
+/* Alignment of field after 'int : 0' in a structure. */
2988
+#define        EMPTY_FIELD_BOUNDARY    32
2989
+
2990
+/* No data type wants to be aligned rounder than this. */
2991
+#define        BIGGEST_ALIGNMENT       32
2992
+
2993
+/* The best alignment to use in cases where we have a choice. */
2994
+#define        FASTEST_ALIGNMENT       32
2995
+
2996
+/* Every structures size must be a multiple of 32-bits. */
2997
+#define        STRUCTURE_SIZE_BOUNDARY 32
2998
+
2999
+/* PCC_BITFIELD_TYPE_MATTERS -- define this if you wish to imitate the the way
3000
+ * other C compilers handle alignment of bit-fields and the structures that
3001
+ * contain them.
3002
+ *
3003
+ * The behavior is that the type written for a named bit-field (int, short, or
3004
+ * other integer type) imposes an alignment for the entire structure, as if the
3005
+ * structure really did contain an ordinary field of that type.  In addition,
3006
+ * the bit-field is placed within the structure so that it would fit within
3007
+ * such a field, not crossing a boundary for it.
3008
+ *
3009
+ * Thus, no most machines, a named bit-field whose type is written as int would
3010
+ * not cross a four-byte boundary, and would force four-byte alignment for the
3011
+ * whole structure.  (The alignment used may not be four bytes; it is controlled
3012
+ * by other alignment parameters.)
3013
+ *
3014
+ * An unnamed bit-field will not affect the alignment of the containing
3015
+ * structure.
3016
+ *
3017
+ * If thhe macro is defined, its definition should be a C expression, a non
3018
+ * zero value for the expression enables this behavior.
3019
+ * Look at the fundamental type that is used for a bit-field and use that to
3020
+ * impose alignment on the enclosing structure.  struct s{int a:8}; should
3021
+ * have the same alignment as 'int', not 'char'.
3022
+ */
3023
+#undef PCC_BITFIELD_TYPE_MATTERS
3024
+#define        PCC_BITFIELD_TYPE_MATTERS       0
3025
+
3026
+/* MAX_FIXED_MODE_SIZE -- An integer expression for the size in bits of the
3027
+ * largest integer machine mode that should actually be used.  All integer
3028
+ * machine modes of this size and smaller can be used for structures and unions
3029
+ * with the appropriate sizes.  If this macro is undefined,
3030
+ * GET_MODE_BITSIZE(DImode) is assumed.
3031
+ *
3032
+ * ZipCPU -- The default looks good enough for us.
3033
+ */
3034
+
3035
+/* Make strings word-aligned so strcpy from constants will be faster. */
3036
+#define        CONSTANT_ALIGNMENT(EXP, ALIGN)  (((TREE_CODE(EXP)==STRING_CST)  \
3037
+       && ((ALIGN) < FASTEST_ALIGNMENT)) ? FASTEST_ALIGNMENT : (ALIGN))
3038
+
3039
+/* Make arrays of chars word-aligned for the same reasons. */
3040
+#define        DATA_ALIGNMENT(TYPE, ALIGN)     ((TREE_CODE(TYPE) == ARRAY_TYPE) \
3041
+       && (TYPE_MODE(TREE_TYPE(TYPE)) == QImode)               \
3042
+       && ((ALIGN < FASTEST_ALIGNMENT) ? FASTEST_ALIGNMENT : (ALIGN)))
3043
+
3044
+/* Generate Code for Profiling
3045
+ */
3046
+#define        FUNCTION_PROFILER(FILE,LABELNO)         (abort(), 0)
3047
+
3048
+
3049
+/* A C expression which is nonzero if register number NUM is suitable for use
3050
+ * as an index register in operand addresses.
3051
+ */
3052
+#define        REGNO_OK_FOR_INDEX_P(NUM)       0
3053
+
3054
+
3055
+/* A C compound statement with a conditional 'goto LABEL;' executed if X
3056
+ * (an RTX) is a legitimate memory address on the target machine for a memory
3057
+ * operand of mode MODE.
3058
+ */
3059
+/* 17.03 Run-time Target Specification */
3060
+
3061
+/* TARGET_CPU_CPP_BUILTINS() ... This function-like macro expands to a block of
3062
+ * code that defines built-in preprocessor macros and assertions for the target
3063
+ * CPU, using the functions builtin_define, builtin_define_std, and
3064
+ * builtin_assert.  When the front end calls this macro it provides a trailing
3065
+ * semicolon, and since it has finished command line option proccessing your
3066
+ * code can use those results freely.
3067
+ *
3068
+ * ZipCPU --- We should probably capture in this macro what capabilities the
3069
+ * command line parameters we've been given indicate that our CPU has.  That
3070
+ * way, code can be adjusted depending upon the CPU's capabilities.
3071
+ */
3072
+#define        TARGET_CPU_CPP_BUILTINS()                       \
3073
+       { builtin_define("__ZIPCPU__");                 \
3074
+       if (ZIP_FPU) builtin_define("__ZIPFPU__");      \
3075
+       if (ZIP_ATOMIC) builtin_define("__ZIPATOMIC__");        \
3076
+       }
3077
+       // If (zip_param_has_fpu)  builtin_define("__ZIPFPU__");
3078
+       // If (zip_param_has_div)  builtin_define("__ZIPDIV__");
3079
+       // If (zip_param_has_mpy)  builtin_define("__ZIPMPY__");
3080
+       // If (zip_param_has_lock) builtin_define("__ZIPLOCK__");
3081
+       // If (zip_param_supervisor) builtin_define("__ZIPUREGS__");
3082
+       // If (we support int64s) builtin_define("___int64_t_defined");
3083
+
3084
+/* TARGET_OS_CPP_BUILTINS() ... Similarly to TARGET_CPU_CPP_BUILTINS but this
3085
+ * macro is optional and is used for the target operating system instead.
3086
+ */
3087
+
3088
+/* Option macros: (we need to define these eventually ... )
3089
+ *
3090
+ *     TARGET_HANDLE_OPTION
3091
+ *     TARGET_HANDLE_C_OPTION
3092
+ *     TARGET_OBJ_CONSTRUCT_STRING_OBJECT
3093
+ *     TARGET_OBJ_DECLARE_UNRESOLVED_CLASS_REFERENCE
3094
+ *     TARGET_OBJ_DECLARE_CLASS_DEFINITION
3095
+ *     TARGET_STRING_OBJECT_REF_TYPE_P
3096
+ *     TARGET_CHECK_STRING_OBJECT_FORMAT_ARG
3097
+ *     TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE(VOID)
3098
+ *     C_COMMON_OVERRIDE_OTPTIONS
3099
+ *     TARGET_OPTION_OPTIMIZATION_TABLE
3100
+ *     TARGET_OPTION_INIT_STRUCT
3101
+ *     TARGET_OPTION_DEFAULT_PARAMS
3102
+ */
3103
+
3104
+/* SWITCHABLE_TARGET
3105
+ *
3106
+ * Zip CPU doesn't need this, so it defaults to zero.  No need to change it
3107
+ * here.
3108
+ */
3109
+
3110
+/* TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(VOID) ... Returns true if the
3111
+ * target supports IEEE 754 floating-point exceptions and rounding modes, false
3112
+ * otherwise.  This is intended to relate to the float and double types, but not
3113
+ * necessarily "long double".  By default, returns true if the adddf3
3114
+ * instruction pattern is available and false otherwise, on the assumption that
3115
+ * hardware floating point supports exceptions and rounding modes but software
3116
+ * floating point does not.
3117
+ *
3118
+ * ZipCPU floating point is barely going to be functional, I doubt it will
3119
+ * support all of these bells and whistles when full functionality is even
3120
+ * achieved.  Therefore, we won't support these modes.  However, we can't just
3121
+ * set this to zero, so let's come back to this.
3122
+ */
3123
+// #warning "Wrong answer encoded to date"
3124 103 dgisselq
+// #undef      TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P
3125 102 dgisselq
+// #define     TARGET_FLOAT_EXCEPTIONS_ROUNDING_SUPPORTED_P(X) 0
3126
+
3127
+/* 17.04 Defining data structures for per-function information */
3128
+
3129
+/* INIT_EXPANDERS ... Macro called to initialize any target specific
3130
+ * information.  This macro is called once per function, before generation of
3131
+ * any RTL has begun.  The intention is to allow the initialization of the
3132
+ * function pointer init_machine_status.
3133
+ */
3134
+// #warning "I may need to define this to handle function return addresses ..."
3135
+
3136
+/* 17.05 Storage Layout */
3137
+
3138
+/* Storage Layout */
3139
+#define        BITS_BIG_ENDIAN         0        // MSB has highest number
3140
+#define        BYTES_BIG_ENDIAN        1       // 1 if MSB is lowest number
3141
+#define        WORDS_BIG_ENDIAN        1       // 1 if MSW is lowest number
3142
+#define        FLOAT_WORDS_BIG_ENDIAN  1
3143
+#define        BITS_PER_WORD           32
3144
+// #define     MAX_BITS_PER_WORD       // defaults to BITS_PER_WORD
3145
+#define        UNITS_PER_WORD          1       // Storage units in a word, pwr of 2:1-8
3146
+#define        MIN_UNITS_PER_WORD      1       // Default is UNITS_PER_WORD
3147
+/* POINTER_SIZE ... Width of a pointer in bits.  You must specify a value no
3148
+ * wider than the width of Pmode.  If it is not equal to the width of Pmode,
3149
+ * you must define POINTERS_EXTEND_UNSIGNED. If you do not specify a value the
3150
+ * default is BITS_PER_WORD.
3151
+ *
3152
+ * ZipCPU --- All of our pointers are 32-bits, the width of our address bus.
3153
+ */
3154
+#define        POINTER_SIZE            32      // Ptr width in bits
3155
+/* POINTERS_EXTEND_UNSIGNED ... A C expression that determines how pointers
3156
+ * should be extended from ptr_mode to either Pmode or word_mode.  It is greater
3157
+ * than zero if pointers should be zero-extended, zero if they should be sign
3158
+ * extended, and negative if some other conversion is needed.  In the last case,
3159
+ * the extension is done by the target's ptr_extend instruction.
3160
+ *
3161
+ * You need not define this macro if the ptr_mode, Pmode, and word_mode are all
3162
+ * the same width.
3163
+ *
3164
+ * ZipCPU --- While we shouldn't need this, QImode and HImode have the same
3165
+ * number of bits as SImode.  Therefore, one might wish to convert between the
3166
+ * two.  Hence, we specify how we would do that here.
3167
+ */
3168
+#define        POINTERS_EXTEND_UNSIGNED        0
3169
+
3170
+/* PROMOTE_MODE(m,unsignedp,type) ... A macro to update m and unsignedp when an
3171
+ * object whose type is type and which has he specified mode and signedness is
3172
+ * to be stored in a register.  This macro is only called when type is a scalar
3173
+ * type.
3174
+ *
3175
+ * On most RISC machines, which only have operations that operate on a full
3176
+ * register, define this macro to set m to word_mode if m is an integer mode
3177
+ * narrower than BITS_PER_WORD.  In most cases, only integer modes should be
3178
+ * widened because wider precision floating-point operations are usually more
3179
+ * expensive than their narrower counterparts.
3180
+ *
3181
+ * For most machines, the macro definition does not change unsigndep.  However,
3182
+ * some machines, have instructions that preferentially handle either signed or
3183
+ * unsigned quantities of certain modes.  For example, on the DEC Alpha, 32-bit
3184
+ * loads from memory and 32-bit add instructions sign-extend the result to
3185
+ * 64-bits. On such machines, set unsignedp according to which kind of extension
3186
+ * is more efficient.
3187
+ *
3188
+ * Do not define this macro if it would never modify m.
3189
+ *
3190
+ * ZipCPU --- We need to always (if possible) promote everything to SImode where
3191
+ * we can handle things.  HImode and QImode just don't make sense on this CPU.
3192
+ */
3193
+#define        PROMOTE_MODE(M,U,T)     if ((GET_MODE_CLASS(M)==MODE_INT)&&(GET_MODE_SIZE(M)<2)) (M)=SImode;
3194
+
3195
+// TARGET_PROMOTE_FUNCTION_MODE
3196
+/* PARM_BOUNDARY ... Normal alignment required for function parameters on the
3197
+ * stack, in bits.  All stack parameters receive at least this much alignment
3198
+ * regardless of data type.  On most machines, this is the same as the size of
3199
+ * an integer.
3200
+ */
3201
+#define        PARM_BOUNDARY   32
3202
+
3203
+/* STACK_BOUNDARY ... Define this macro to the minimum alignment enforced by
3204
+ * hardware for the stack pointer on this machine.  The definition is a C
3205
+ * expression for the desired alignment (measured in bits).  This value is used
3206
+ * as a default if PREFERRED_STACK_BOUNDARY is not defined.  On most machines,
3207
+ * this should be the same as PARM_BOUNDARY.
3208
+ */
3209
+#define        STACK_BOUNDARY  PARM_BOUNDARY
3210
+
3211
+/* PREFERRED_STACK_BOUNDARY ... Define this ... */
3212
+
3213
+/* INCOMING_STACK_BOUNDARY
3214
+ */
3215
+
3216
+/* FUNCTION_BOUNDARY ... Alignment required for a function entry point, in bits.
3217
+ */
3218
+#define        FUNCTION_BOUNDARY       32
3219
+
3220
+/* BIGGEST_ALIGNMENT ... Biggest alignment that any data type can require on
3221
+ * this machine, in bits.  Note that this is not the biggest alignment that is
3222
+ * supported, just the biggest alignment that, when violated, may cause a fault.
3223
+ */
3224
+#define BIGGEST_ALIGNMENT      32
3225
+
3226
+/* MINIMUM_ATOMIC_ALIGNMENT ... If defined, the smallest alignment, that can be
3227
+ * given to an object that can be referenced in one operation, without
3228
+ * disturbing any nearby object.  Normally, this is BITS_PER_UNIT, but may be
3229
+ * larger on machines that don't have byte or halfword store operations.
3230
+ */
3231
+#define        MINIMUM_ATOMIC_ALIGNMENT        BITS_PER_UNIT
3232
+
3233
+/* STRICT_ALIGNMENT ... Set this nonzero if move instructions will actually
3234
+ * fail to work when given unaligned data.  If instructions will merely go
3235
+ * slower in that case, define this macro as 0.
3236
+ */
3237
+#define        STRICT_ALIGNMENT        1
3238
+
3239
+/* MAX_FIXED_MODE_SIZE ... An integer expression for the size in bits of the
3240
+ * largest integer machine mode that should actually be used.  All integer
3241
+ * machine modes of this size or smaller can be used for structures and unions
3242
+ * with the appropriate sizes.  If this macro is undefined,
3243
+ * GET_MODE_BITSIZE(DImode) is assumed.
3244
+ *
3245
+ * ZipCPU ... Get_MOD_BITSIZE(DImode) will be 64, and this is really not the
3246
+ * size on bits of the largest integer machine mode.  However, that's the case
3247
+ * with most DI implementations: A long is two words, spliced together.  We'd
3248
+ * like to support that eventually, but we need to get there.  Hence, let's use
3249
+ * compile time flag (ZIP_HAS_DI) that we can enable when we're ready.
3250
+ */
3251
+#if (ZIP_HAS_DI != 0)
3252
+#define        MAX_FIXED_MODE_SIZE     64
3253
+#else
3254
+#define        MAX_FIXED_MODE_SIZE     32
3255
+#endif
3256
+
3257
+
3258
+/* 17.06 Layout of Source Language Data Types */
3259
+
3260
+#undef CHAR_TYPE_SIZE
3261
+#undef SHORT_TYPE_SIZE
3262
+#undef INT_TYPE_SIZE
3263
+#undef LONG_TYPE_SIZE
3264
+#undef LONG_LONG_TYPE_SIZE
3265
+//
3266
+#define        CHAR_TYPE_SIZE  32
3267
+#define        SHORT_TYPE_SIZE 32
3268
+#define        INT_TYPE_SIZE   32
3269
+#define        LONG_TYPE_SIZE  32
3270
+#define        LONG_LONG_TYPE_SIZE     64
3271
+// BOOL_TYPE_SIZE defaults to CHAR_TYPE_SIZE
3272
+#undef FLOAT_TYPE_SIZE
3273
+#undef DOUBLE_TYPE_SIZE
3274
+#undef LONG_DOUBLE_TYPE_SIZE
3275
+#define        FLOAT_TYPE_SIZE         32
3276
+#define        DOUBLE_TYPE_SIZE        FLOAT_TYPE_SIZE // Zip CPU doesn't support dbls
3277
+#define        LONG_DOUBLE_TYPE_SIZE   64      // This'll need to be done via emulation
3278
+// SHORT_FRAC_TYPE_SIZE
3279
+// LONG_FFRACT_TYPE_SIZE
3280
+// LONG_LONG_FRACT_TIME_SIZE
3281
+#undef SHORT_ACCUM_TYPE_SIZE
3282
+#undef ACCUM_TYPE_SIZE
3283
+#undef LONG_ACCUM_TYPE_SIZE
3284
+#define        SHORT_ACCUM_TYPE_SIZE   SHORT_TYPE_SIZE
3285
+#define        ACCUM_TYPE_SIZE         INT_TYPE_SIZE
3286
+#define        LONG_ACCUM_TYPE_SIZE    LONG_TYPE_SIZE
3287
+
3288
+/* LIBGCC2_GNU_PREFIX ... This macro corresponds to the TARGET_GNU_PREFIX target
3289
+ * hook and should be defined if that hook is overriden to be true.  It causes
3290
+ * function names in libgcc to be changed to use a __gnu_ prefix for their name
3291
+ * rather than the default __.  A port which uses this macro should also arrange
3292
+ * to use t-gnu-prefix in the libgcc config.host.
3293
+ *
3294
+ * ZipCPU -- I see no reason to define and therefore change this behavior.
3295
+ */
3296
+
3297
+/* TARGET_FLT_EVAL_METHOD ... A C expression for the value for FLT_EVAL_METHOD
3298
+ * in float.h,, assuming, if applicable, that the floating-point control word
3299
+ * is in its default state.  If you do not define this macro the value of
3300
+ * FLT_EVAL_METHOD will be zero.
3301
+ *
3302
+ * ZipCPU --- ???
3303
+ */
3304
+
3305
+/* WIDEST_HARDWARE_FP_SIZE ... A C expression for the size in bits of the widest
3306
+ * floating-point format supported by the hardware.  If you define this macro,
3307
+ * you must specify a value less than or equal to the value of LONG_DOUBLE_...
3308
+ * If you do not define this macro, the value of LONG_DOUBLE_TYPE_SIZE is the
3309
+ * default.
3310
+ *
3311
+ * ZipCPU supports 32-bit IEEE floats--IF THE SUPPORT IS COMPILED IN!  This
3312
+ * really needs to be determined, then, based upon a compile time parameter
3313
+ * where the one compiling the code states whether or not the H/W even has
3314
+ * floating point support.
3315
+ *
3316
+ * For now, we'll assume it does--but once we implement GCC parameters, we'll
3317
+ * need to change this.
3318
+ */
3319
+#undef WIDEST_HARDWARE_FP_SIZE
3320
+// #warning "Definition needs to change if no FPU present"
3321
+#define        WIDEST_HARDWARE_FP_SIZE FLOAT_TYPE_SIZE
3322
+
3323
+/* DEFAULT_SIGNED_CHAR ... An expression whose value is 1 or 0, according to
3324
+ * whether the type char should be signed or unsigned by default.  The user
3325
+ * can always override this default with the options -fsigned-char and
3326
+ * -funsigned-char.
3327
+ *
3328
+ * ZipCPU--let's go with the default behavior.
3329
+ */
3330
+#define        DEFAULT_SIGNED_CHAR     1
3331
+
3332
+/* TARGET_DEFAULT_SHORT_ENUMS(VOID) ... This target hook should return true if
3333 103 dgisselq
+ * the compiler should give an enum type only as many bytes as it takes to
3334 102 dgisselq
+ * represent the range of possible values of that type.  It should return
3335
+ * false if all enum types should be allocated like int.
3336
+ *
3337
+ * The default is to return false.  This is what the ZipCPU needs, so we won't
3338
+ * override it.
3339
+ */
3340
+
3341
+/* SIZE_TYPE ... A C expression for a string describing the name of the data
3342
+ * type to use for size values.  The typedef name size_t is defined using the
3343
+ * contents of the string.
3344
+ *
3345
+ * If you don't define this macro, the default is "long unsigned int".  Since
3346
+ * on the ZipCPU this is a 32-bit number, and all ZipCPU values are 32-bits,
3347
+ * the default seems perfect for us.
3348
+ */
3349
+#define        SIZE_TYPE       "unsigned int"
3350
+
3351
+/* SIZETYPE ... GCC defines internal types () for expressions dealing with size.
3352
+ * This macro is a C expression for a string describing the name of the data
3353
+ * type from which the precision of sizetype is extracted.  The string has the
3354
+ * same restrictions as SIZE_TYPE string.  If you don't define this macro, the
3355
+ * default is SIZE_TYPE --- which seems good enough for us.
3356
+ */
3357
+
3358
+/* PTRDIFF_TYPE ... A C expression for a string describing the name of the data
3359
+ * type to use fo rthe result of subtracting two pointers.  The typedef name
3360
+ * ptrdiff_t is defined using the contents of the string.  See SIZE_TYPE for
3361
+ * more information.
3362
+ *
3363
+ * The default is "long int" which for the ZipCPU is 32-bits---still good enough
3364
+ * for us.
3365
+ */
3366
+#define        PTRDIFF_TYPE    "int"
3367
+
3368
+/* WCHAR_TYPE ... A C expression for a string describing the name of the data
3369
+ * type to use for wide characters.  The typedef name wchar_t is defined using
3370
+ * the contents of  the string.  If you don't define this macro, the default is
3371
+ * 'int'--good enough for ZipCPU.
3372
+ */
3373
+
3374
+/* WCHAR_TYPE_SIZE ... A C expression for the size in bits of the data type for
3375
+ * wide characters.  This is used in cpp, which cannot make use of WCHAR_TYPE.
3376
+ */
3377
+#undef WCHAR_TYPE_SIZE
3378
+#define        WCHAR_TYPE_SIZE 32
3379
+
3380
+/* WINT_TYPE ... A C expression for a string describing the name of the data
3381
+ * type to use for wide characters passed to printf and returned from getwc.
3382
+ * The typedef name wint_t is defined using the contents of the string.  See
3383
+ *
3384 103 dgisselq
+ * ZipCPU -- If you don't define this macro, the default is "unsigned int"--also
3385
+ * best for us again.
3386 102 dgisselq
+ */
3387
+
3388
+/* INTMAX_TYPE ... A C expression for a string describing the name of the
3389
+ * data type that can represent any value of any standard or extended signed
3390
+ * integer type.  The typedef name intmax_t is defined using the contents of
3391
+ * the string.
3392
+ *
3393
+ * If you don't define this macro, the default is the first of "int", "long int"
3394
+ * or "long long int" that has as much precision as "long long int".
3395
+ */
3396
+
3397
+/* UINTMAX_TYPE ... same as INTMAX_TYPE, but for unsigned
3398
+ */
3399
+
3400
+#undef SIG_ATOMIC_TYPE
3401
+#if (ZIP_ATOMIC != 0)
3402
+#define        SIG_ATOMIC_TYPE "int"
3403
+#else
3404
+#define        SIG_ATOMIC_TYPE NULL    // We have no atomic types, but registers
3405
+#endif
3406
+#undef INT8_TYPE
3407
+#define        INT8_TYPE               NULL    // We have no 8-bit integer type
3408
+#undef INT16_TYPE
3409
+#define        INT16_TYPE              NULL
3410
+#undef INT32_TYPE
3411
+#define        INT32_TYPE              "int"
3412
+#undef UINT8_TYPE
3413
+#define        UINT8_TYPE              NULL
3414
+#undef UINT16_TYPE
3415
+#define        UINT16_TYPE             NULL
3416
+#undef UINT32_TYPE
3417
+#define        UINT32_TYPE             "unsigned int"
3418
+#undef INT_LEAST8_TYPE
3419
+#define        INT_LEAST8_TYPE         "int"
3420
+#undef INT_LEAST16_TYPE
3421
+#define        INT_LEAST16_TYPE        "int"
3422
+#undef INT_LEAST32_TYPE
3423
+#define        INT_LEAST32_TYPE        "int"
3424
+#undef UINT_LEAST8_TYPE
3425
+#define        UINT_LEAST8_TYPE        "unsigned int"
3426
+#undef UINT_LEAST16_TYPE
3427
+#define        UINT_LEAST16_TYPE       "unsigned int"
3428
+#undef UINT_LEAST32_TYPE
3429
+#define        UINT_LEAST32_TYPE       "unsigned int"
3430
+#undef INT_FAST8_TYPE
3431
+#define        INT_FAST8_TYPE          "int"
3432
+#undef INT_FAST16_TYPE
3433
+#define        INT_FAST16_TYPE         "int"
3434
+#undef INT_FAST32_TYPE
3435
+#define        INT_FAST32_TYPE         "int"
3436
+#undef UINT_FAST8_TYPE
3437
+#define        UINT_FAST8_TYPE         "unsigned int"
3438
+#undef UINT_FAST16_TYPE
3439
+#define        UINT_FAST16_TYPE        "unsigned int"
3440
+#undef UINT_FAST32_TYPE
3441
+#define        UINT_FAST32_TYPE        "unsigned int"
3442
+#undef INTPTR_TYPE
3443
+#define        INTPTR_TYPE             "unsigned int"
3444
+#undef UINTPTR_TYPE
3445
+#define        UINTPTR_TYPE            "unsigned int"
3446
+
3447
+#undef INT64_TYPE
3448
+#undef UINT64_TYPE
3449
+#undef INT_LEAST64_TYPE
3450
+#undef UINT_LEAST64_TYPE
3451
+#undef INT_FAST64_TYPE
3452
+#undef UINT_FAST64_TYPE
3453
+
3454
+#if (ZIP_HAS_DI != 0)
3455
+#define        INT64_TYPE              "long int"
3456
+#define        UINT64_TYPE             "long unsigned int"
3457
+#define        INT_LEAST64_TYPE        "long int"
3458
+#define        UINT_LEAST64_TYPE       "long unsigned int"
3459
+#define        INT_FAST64_TYPE         "long int"
3460
+#define        UINT_FAST64_TYPE        "long unsigned int"
3461
+#else
3462
+#define        INT64_TYPE              NULL
3463
+#define        UINT64_TYPE             NULL
3464
+#define        INT_LEAST64_TYPE        NULL
3465
+#define        UINT_LEAST64_TYPE       NULL
3466
+#define        INT_FAST64_TYPE         NULL
3467
+#define        UINT_FAST64_TYPE        NULL
3468
+#endif
3469
+
3470
+#define        TARGET_PTRMEMFUNC_VBI_LOCATION  ptrmemfunc_vbit_in_pfn
3471
+
3472
+
3473
+/* 17.07 Register Usage / Register definitions */
3474
+
3475
+/* FIRST_PSEUDO_REGISTER ... Number of hardware registers known to the compiler.
3476
+ * They receive numbers 0 through FIRST_PSEUDO_REGISTER-1; thus the first
3477
+ * pseudo register's numbrer really is assigned the number
3478
+ * FIRST_PSEUDO_REGISTER.
3479
+ *
3480
+ * ZipCPU---There are 16 registers in the ZipCPU, numbered 0-15 with the CC
3481
+ * and PC register being numbered 14 and 15 respectively.  Therefore, the
3482
+ * compiler can take register number 16 and above and do whatever it wants
3483
+ * with it.
3484
+ */
3485
+#ifdef DEFINE_USER_REGS
3486 103 dgisselq
+#  define      FIRST_PSEUDO_REGISTER   32
3487 102 dgisselq
+#else
3488 103 dgisselq
+#  ifdef       zip_FP_PSEUDO
3489
+#    define    FIRST_PSEUDO_REGISTER   (zip_FP_PSEUDO+1)
3490
+#  else
3491
+#    define    FIRST_PSEUDO_REGISTER   16
3492
+#  endif
3493 102 dgisselq
+#endif
3494
+
3495
+/* FIXED_REGISTERS ... An initializer that says which registers are used for
3496
+ * fixed purposes all throughout the compiled code and are therefore not
3497
+ * available for general allocation.  These would include the stack pointer, the
3498
+ * frame pointer (except on machines where that can be used as a general
3499
+ * register when no frame pointer is needed), the program counter on machines
3500
+ * where that is considered one of the addressable registers, and any other
3501
+ * numbered register with a standard use.
3502
+ *
3503
+ * This information is expressed as a sequence of numbers, separated by commas,
3504
+ * and surrounded by braces.  The nth number is 1 if register n is fixed, 0
3505
+ * otherwise.
3506
+ *
3507
+ * For the Zip CPU, we have three fixed registers that are not available for
3508
+ * general allocation:
3509
+ *
3510
+ *     SP      The stack pointer
3511
+ *     CC      The condition codes and CPU state register
3512
+ *     PC      The program counter
3513
+ *
3514
+ * Other registers, such as FP (the frame pointer) or GBL (the global offset
3515
+ * table pointer) are registers that we hope will not be so fixed.
3516
+ */
3517 103 dgisselq
+#ifdef zip_FP_PSEUDO
3518
+#  define      FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1 }
3519
+#else
3520
+#  define      FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1 }
3521
+#endif
3522 102 dgisselq
+
3523
+/* CALL_USED_REGISTERS ... like FIXED_REGISTERS but has 1 for each register
3524
+ * that is clobbered (in general) by function calls as well as for fixed
3525
+ * registers.  This macro therefore identifies the registers that are not
3526
+ * available for general allocation of values that must live across function
3527
+ * calls.
3528
+ *
3529
+ * If a register has 0 in CALL_USED_REGISTERS, the compiler automatically saves
3530
+ * it on function entry and restores it on function exit, if the register is
3531
+ * used within the function.
3532
+ *
3533
+ * On the Zip CPU, we must save R0 (the return address), and (let's pick) any
3534
+ * register above R5.
3535
+ */
3536 103 dgisselq
+#ifdef zip_FP_PSEUDO
3537
+#  define      CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,1 }
3538
+#else
3539
+#  define      CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1 }
3540
+#endif
3541 102 dgisselq
+
3542
+/* CALL_REALLY_USED_REGISTERS ...  optional macro that, if not defined, defaults
3543
+ * to the value of CALL_USED_REGISTERS.
3544
+ */
3545
+
3546
+/* HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE) ... A C expression that is nonzero
3547
+ * if it is not permissible to store a value of mode MODE in hard register REGNO
3548
+ * across a call without some part of it being clobbbered.  For most machines,
3549
+ * this macro need not be defined.  It is only required for machines that do
3550 103 dgisselq
+ * not preserve the entire contents of a register across a call.
3551 102 dgisselq
+ *
3552
+ * In the Zip CPU, we clobber R0 with our return address during a call, so let's
3553
+ * make sure this gets included here.
3554
+ */
3555
+#define        HARD_REGNO_CALL_PART_CLOBBERED(REGNO,MODE)      (REGNO==0)
3556
+
3557
+/* TARGET_CONDITIONAL_REGISTER_USAGE(VOID) ... This hook may conditionally
3558
+ * modify five variables fixed_regs, call_used_regs, global_regs, reg_names, and
3559
+ * reg_class_contents, to take into account any dependence of these register
3560
+ * sets on target flags.  The first three of these are of type char[]
3561
+ * (interpreted as Boolean vectors).  global_regs is a const char *[] and
3562
+ * reg_class_contents is a HARD_REG_SET.  Before the macro is called,
3563
+ * fixed_regs, call_used_regs, reg_class_contents, and reg_names have been
3564
+ * initialized from FIXED_REGISTERS, CALL_USED_REGISTERS, REG_CLASS_CONTENTS,
3565
+ * and REGISTER_NAMES, respectively.  global_regs has been cleared, and any
3566
+ * -ffixed-reg, -fcall-used-reg, and -fcall-saved-reg command options have been
3567
+ * applied.
3568
+ *
3569
+ * ZipCPU -- I may need to return and define this depending upon how FP and
3570
+ * GBL register allocation go.  But for now, we'll leave this at its default
3571
+ * value.
3572
+ */
3573
+// #warning "Revisit me after FP and GBL allocation"
3574
+
3575
+/* INCOMING_REGNO(out) ... Define this macro if the target machine has register
3576
+ * windows. ...
3577
+ *
3578
+ * Zip CPU has no register windows.
3579
+ */
3580
+
3581
+/* OUTGOING_REGNO ... same thing.
3582
+ */
3583
+
3584
+/* LOCAL_REGNO ... same thing.
3585
+ */
3586
+
3587
+/* PC_REGNUM ... If the program counter has a register number, define this as
3588
+ * that register number.  Otherwise do not define it.
3589
+ */
3590
+#define        PC_REGNUM       zip_PC
3591
+
3592
+
3593
+/* REG_ALLOC_ORDER ... If defined, an initializer for a vector of integers,
3594
+ * containing the number of hard registers in the order in which GCC should
3595
+ * prefer to use them (from most preferred to least.
3596
+ *
3597 103 dgisselq
+ * If this macro is not defined, registers are used lowest numbered first (all
3598 102 dgisselq
+ * else being equal).
3599
+ *
3600
+ * Since the default is the ZipCPU desired case, we won't define this here.
3601
+ */
3602
+
3603
+/* ADJUST_REG_ALLOC_ORDER ... on most machines it is not necessary to define
3604
+ * this macro, so we won't either.
3605
+ */
3606
+
3607
+/* HONOR_REG_ALLOC_ORDER ...
3608
+ */
3609
+
3610
+/* HONOR_REG_ALLOC_ORDER ... on most machines it is not necessary to define
3611
+ * this macro, so we won't either.
3612
+ */
3613
+
3614
+/* HARD_REGNO_NREGS(REGNO, MODE) ... A C expression for the number of
3615
+ * consecutive hard registers, starting at register number REGNO, required to
3616
+ * hold a value of mode MODE.
3617
+ *
3618
+ * On a machine where all registers are exactly one word, a suitable definition
3619
+ * is given of ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1)/UNITS_PER_WORD.
3620
+ *
3621
+ * On ZipCPU, we might do
3622
+ *     ((((MODE)==DImode)||((MODE)==DFmode))?2:1)
3623
+ * but I think the default (above) code should work as well.  Hence, let's stick
3624
+ * with the default, lest someone try to create larger modes (TImode, OImode,
3625
+ * XImode) and expect us to follow them properly some how.
3626
+ *
3627
+ * Okay, now in hind sight, we know that the default doesn't work for our
3628
+ * architecture, since GET_MODE_SIZE(SImode)=4, not 1.  Thus, let's rearrange
3629
+ * this expression to work in bits rather than in bytes and we'll know more
3630
+ * of what we are doing.
3631
+ */
3632
+#undef HARD_REGNO_NREGS
3633
+#define        HARD_REGNO_NREGS(REGNO, MODE)   ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1)\
3634
+               / (UNITS_PER_WORD))
3635
+
3636
+/* HARD_REGNO_NREGS_HAS_PADDING(REGNO,MODE) ... A C expression that is nonzero
3637
+ * if a value of mode MODE, stored in memory, ends with padding that causes it
3638
+ * to take up more space than in registers starting at register number REGNO
3639
+ * (as determined by multiplying GCC's notion of the size of the register when
3640
+ * containing this mode by the number of registers returned by HARD_REGNO_NREGS)
3641
+ * By default this is zero.
3642
+ *
3643
+ * Zip CPU --- The default looks good enough to me.
3644
+ */
3645
+
3646
+/* HARD_REGNO_NREGS_WITH_PADDING(REGNO, MODE)
3647
+ *
3648
+ * ZipCPU ---
3649
+ */
3650
+
3651
+/* REGMODE_NATURAL_SIZE(MODE) -- Define this macro if the natural size of
3652
+ * registers that hold values of mode mode is not the word size.  It is a C
3653
+ * expression that should give the natural size in bytes for the specified mode.
3654
+ * It is used by the register allocator to try to optimize its results.
3655
+ *
3656
+ * ZipCPU ---
3657
+ */
3658
+// #define     REGMODE_NATURAL_SIZE(MODE)      (((MODE)==DImode)?2:1)
3659
+
3660
+/* HARD_REGNO_MODE_OK ... A C expression that is nonzero if it is permissible
3661 103 dgisselq
+ * to store a value of mode MODE in a hard register number REGNO (or in several
3662 102 dgisselq
+ * registers starting with that one).  For a machine where all registers are
3663
+ * equivalent, a suitable definition is '1'.  You need not include code to check
3664
+ * for the numbers of fixed registers, because the allocation mechanism
3665
+ * considered them to be always occupied.
3666
+ *
3667
+ * ZipCPU --- As long as you are already avoiding the fixed registers, the
3668
+ * suitable default definition mentioned above should be sufficient.
3669
+ */
3670
+#undef HARD_REGNO_MODE_OK
3671 103 dgisselq
+#define        HARD_REGNO_MODE_OK(R,M) (R<zip_CC)
3672 102 dgisselq
+
3673
+/* HARD_REGNO_RENAME_OK(FROM,TO) ... A C expression that is nonzero if it is
3674
+ * okay to rename a hard register FROM to another hard register TO.  One common
3675
+ * use of this macro is to prevernt renaming of a register to another register
3676
+ * that is not saved by a prologue in an interrupt handler.  The default is
3677
+ * always nonzero.
3678
+ *
3679
+ * ZipCPU --- The default looks good enough to us.
3680
+ */
3681
+#undef HARD_REGNO_RENAME_OK
3682
+#define        HARD_REGNO_RENAME_OK(FROM,TO)   ((is_ZIP_GENERAL_REG(FROM))&&(is_ZIP_GENERAL_REG(TO)))
3683
+
3684
+
3685
+/* MODES_TIABLE_P(M1, M2) ... A C expression that is nonzero if a value of mode
3686
+ * M1 is accessible in mode M2 without copying.
3687
+ *
3688
+ * ZipCPU --- well, that's true for us (although we support scant few modes) ...
3689
+ * so lets' set to one.
3690
+ */
3691
+#define        MODES_TIEABLE_P(M1,M2)  1
3692
+
3693
+/* TARGET_HARD_REGNO_SCRATCH_OK(REGNO)
3694
+ * This target hook should return true if it is OK to use a hard register
3695
+ * REGNO has a scratch register in peephole2.  One common use of this macro is
3696
+ * to prevent using of a register that is not saved by a prologue in an
3697
+ * interrupt handler.  The default version of this hook always returns true.
3698
+ *
3699
+ * ZipCPU --- the default works for us as well.  If you are in an interrupt
3700
+ * context, you have an entirely new set of registers (the supervisor set), so
3701
+ * this is a non-issue.
3702
+ */
3703
+
3704
+/* AVOID_CCMODE_COPIES ... define this macro if the compiler should avoid
3705
+ * copies to/from CCmode register(s).  You should only define this macro if
3706
+ * support for copying to/from CCmode is incomplete.
3707
+ *
3708
+ * ZipCPU --- CCmode register copies work like any other, so we'll keep with the
3709
+ * default definition.
3710
+ */
3711
+
3712
+/* STACK_REGS ... Define this if the machine has any stack-like registers.
3713
+ *
3714
+ * Zip CPU has no stack-like registers, as their definition is different from
3715
+ * the ZipCPU stack pointer register.
3716
+ */
3717
+
3718
+#define        ZIP_REG_BYTE_SIZE       1
3719
+
3720
+/* 17.08 Register Classes */
3721
+
3722
+/* enum reg_class ... An enumerate type that must be defined with all the
3723
+ * register class names as enumerated values.  NO_REGS must be first.  ALL_REGS
3724
+ * must be the last register class, followed by one more enumerated value,
3725
+ * LIM_REG_CLASSES, which is not a register class but rather tells how many
3726
+ * classes there are.
3727
+ *
3728
+ * ZipCPU --- We'll defined register 0-13 as general registers, 14-15 in
3729
+ * all_regs, and go from there.
3730
+ */
3731
+enum   reg_class {
3732
+       NO_REGS, GENERAL_REGS,
3733
+#ifdef DEFINE_USER_REGS
3734
+       USER_REGS,
3735
+#endif
3736
+       ALL_REGS, LIM_REG_CLASSES
3737
+};
3738
+
3739
+/* N_REG_CLASSES ... the number of distinct register classes, defined as follows
3740
+ */
3741
+#define        N_REG_CLASSES   (int)LIM_REG_CLASSES
3742
+
3743
+/* REG_CLASS_NAMES ... An initializer containing the names of the register
3744
+ * classes as C string constants.  These names are used in writing some of the
3745
+ * debugging dumps.
3746
+ */
3747
+#define        REG_CLASS_NAMES { "NO_REGS", "GENERAL_REGS", "ALL_REGS" }
3748
+
3749
+/* REG_CLASS_CONTENTS ... An initializer containing the contents of the register
3750
+ * classes, as integerss which are bit masks.  The nth integer specifies the
3751
+ * contents of class n.  That way the integer mask is interpreted as that
3752
+ * register r is in the class if (mask&(1<<r)) is 1.
3753
+ *
3754
+ * When the machine has more than 32 registers ... that's not us.
3755
+ *
3756
+ * ZipCPU --- This is straight forward, three register classes, etc.
3757
+ */
3758 103 dgisselq
+#ifdef zip_FP_PSEUDO
3759
+#define        REG_CLASS_CONTENTS { { 0x00000}, {0x13fff}, {0x1ffff} }
3760
+#else
3761 102 dgisselq
+#define        REG_CLASS_CONTENTS { { 0x00000}, {0x03fff}, {0x0ffff} }
3762 103 dgisselq
+#endif
3763 102 dgisselq
+
3764
+#ifdef DEFINE_USER_REGS
3765
+#define        REG_CLASS_NAMES { "NO_REGS", "GENERAL_REGS", "USER_REGS", "ALL_REGS" }
3766
+#define        REG_CLASS_CONTENTS { { 0x00000},{0x03fff},{0x0ffff0000},{0x0ffffffff} }
3767
+#define        FIXED_REGISTERS         { 0,0,0,0,0,0,0,0,0,0,0,0,0,1,1,1,  1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }
3768
+#define        CALL_USED_REGISTERS     { 0,1,1,1,1,0,0,0,0,0,0,0,0,1,1,1,  1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1 }
3769
+#endif
3770
+
3771
+/* REGNO_REG_CLASS ... A C expression whose value is a register class
3772
+ * containing hard register REGNO.  In general there is more than one such
3773
+ * class;  Choose a class which is minimal, meaning that no smaller class also
3774
+ * contains the register.
3775
+ */
3776
+#undef REGNO_REG_CLASS
3777 103 dgisselq
+#ifdef zip_FP_PSEUDO
3778
+#define        REGNO_REG_CLASS(R)      (is_ZIP_REG(R)?((((R)<=13)||((R)==zip_FP_PSEUDO))?GENERAL_REGS:ALL_REGS):NO_REGS)
3779
+#else
3780 102 dgisselq
+#define        REGNO_REG_CLASS(R)      (is_ZIP_REG(R)?((R<=13)?GENERAL_REGS:ALL_REGS):NO_REGS)
3781 103 dgisselq
+#endif
3782 102 dgisselq
+
3783
+/* BASE_REG_CLASS ... A macro whose definition is the name of the class to which
3784
+ * a valid base register must belong.  A base register is one used in an address
3785
+ * which is the register value plus a displacement.
3786
+ */
3787
+#undef BASE_REG_CLASS
3788
+#define        BASE_REG_CLASS  GENERAL_REGS
3789
+
3790
+/* MODE_BASE_CLASS(MODE) ... This is a variation of the BASE_REG_CLASS macro
3791
+ * which allows the selection of a bse register in a mode dependent manner.  If
3792
+ * mode is VOIDmode then it should return the same value as BASE_REG_CLASS.
3793
+ */
3794
+#undef MODE_BASE_CLASS
3795
+#define        MODE_BASE_CLASS(MODE)   GENERAL_REGS
3796
+
3797
+/* MODE_BASE_REG_REG_CLASS(MODE) ... A C expression whose value is the register
3798
+ * class to which a valid base register must belong in order to be used in a
3799
+ * base plus index register address.  You should define this macro if base plus
3800
+ * index addresses have different requirements than other base register uses.
3801
+ *
3802
+ * Zip CPU does not support the base plus index addressing mode, thus ...
3803
+ */
3804
+#undef MODE_BASE_REG_REG_CLASS
3805
+#define        MODE_BASE_REG_REG_CLASS(MODE)   NO_REGS
3806
+
3807
+/* INDEX_REG_CLASS ... A macro whose definition is the name of the class to
3808
+ * which a valid index register must belong.  An index register is one used in
3809
+ * an address where its value is either multiplied by a scale factor or added
3810
+ * to another register (as well as added to a displacement).
3811
+ *
3812
+ * ZipCPU -- Has no index registers.
3813
+ */
3814
+#undef INDEX_REG_CLASS
3815
+#define        INDEX_REG_CLASS NO_REGS
3816
+
3817
+/* REGNO_OK_FOR_BASE_P(NUM) ... A C expression which is nonzero if register
3818
+ * number num is suitable for use as a base register in operand addresses.
3819
+ */
3820
+#undef REGNO_OK_FOR_BASE_P
3821
+#ifdef DEFINE_USER_REGS
3822
+# define REGNO_OK_FOR_BASE_P(NUM)      ((NUM != zip_CC)&&(NUM < 16))
3823
+#else
3824
+# define REGNO_OK_FOR_BASE_P(NUM)      (NUM != zip_CC)
3825
+#endif
3826
+
3827
+/* REGNO_MODE_OK_FOR_BASE_P ... A C expressison that is just like
3828
+ * REGNO_OK_FOR_BASE_P, except that that expression may examine the mode of the
3829
+ * memory refgerence in MODE.  You should define this macro if the mode of the
3830
+ * memory reference affects whether a register may be used as a base register.
3831
+ *
3832
+ * ZipCPU --- the mode doesn't affect anything, so we don't define this.
3833
+ */
3834
+
3835
+/* REGNO_MODE_OK_FOR_REG_BASE_P(NUM, MODE) ... base plus index operand
3836
+ * addresses, accessing memory in mode mode.
3837
+ *
3838
+ * Use of this macro is deprecated.
3839
+ */
3840
+
3841
+/* REGNO_MODE_CODE_OK_FRO_BASE_P(N,M,AS,OC,IC) ... A C expression which is
3842
+ * nonzero if a register number N is suitable for use as a base register in
3843
+ * operand addresses, accessing memory in mode M in address space AS.  This is
3844
+ * similar to REGNO_MODE_OK_FOR_BASE_P, except that the expression may examine
3845
+ * the context in which the register appears in the memory reference.
3846
+ *
3847
+ * ZipCPU---We aren't specific in how we use our registers.
3848
+ */
3849
+#define        REGNO_MODE_CODE_OK_FOR_BASE_P(N,M,AS,OC,IC) REGNO_OK_FOR_BASE_P(N)
3850
+
3851
+/* REGNO_OK_FOR_INDEX_P(REGNO) ... A C expression which is nonzero if register
3852
+ * num is suitable for use as an index register in opernad addressess.  It may
3853
+ * be either a suitable hard register or a pseudo register that has been
3854
+ * allocated usch as a hard register.
3855
+ *
3856
+ * ZipCPU has no index registers, therefore we declare this to be zero.
3857
+ */
3858
+#undef REGNO_OK_FOR_INDEX_P
3859
+#define        REGNO_OK_FOR_INDEX_P(REGNO)     0
3860
+
3861
+/* TARGET_PREFERRED_RENAME_CLASS(RCLASS) ... A target hook that places
3862
+ * additional preference on the register class to use when it is necessary to
3863
+ * rename a register in class RCLASS to another class, or perhaps NO_REGS, if no
3864
+ * preferred register class is found or hook preferred_rename_class is not
3865
+ * implemented.  SOmething returning a more restrictive class makes better code.
3866
+ * For example, on ARM, thumb-2 instructions using LO_REGS may be smaller than
3867
+ * instructions using GENERIC_REGS.  By returning LO_REGS from
3868
+ * preferred_rename_class, code size can be reduced.
3869
+ */
3870
+// #undef TARGET_PREFERRED_RENAME_CLASS
3871
+// #define     TARGET_PREFERRED_RENAME_CLASS(RCLASS)   RCLASS
3872
+
3873
+/* TARGET_PREFERRED_RELOAD_CLASS(X,RC) ... A target hook that places additional
3874
+ * restri tions on the register class to use when it is necessary to copy value
3875
+ * X into a register in class RC.  The value is a register class; rehaps RC, or
3876
+ * perhaps a smaller class.
3877
+ *
3878
+ * The default fversion of this hook always returns value of RC argument, which
3879
+ * sounds quite appropriate for the ZipCPU.
3880
+ */
3881
+
3882
+/* PREFERRED_RELOAD_CLASS(X,CLASS) ... A C expression that places additional
3883
+ * restrictions on the register class to use when it is necessary to copy
3884
+ * value X into a register in class CLASS.  On many machines, the following
3885
+ * definition is safe: PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
3886
+ * Sometimes returning a more restrictive class makes better code.  For example,
3887
+ * on the 68k, when x is an integer constant that is in range for a moveq
3888
+ * instruction, the value of this macro is always DATA_REGS as long as CLASS
3889
+ * includes the data registers.  Requiring a Ddata register guarantees that a
3890
+ * 'moveq' will be used.
3891
+ *
3892
+ * ZipCPU --- you can't load certain values into all members of ALL_REGS.  For
3893
+ * example, loading (sleep and !gie) into the CC register could halt the CPU.
3894
+ * Hence, we only allow loads into the GENERAL_REG class.
3895
+ */
3896
+#define        PREFERRED_RELOAD_CLASS(X, CLASS)        GENERAL_REGS
3897
+
3898
+/* TARGET_PREFERRED_OUTPUT_RELOAD_CLASS(RTX,RCLASS) ... Like TARGET_PREFERRED_..
3899
+ * RELOAD_CLASS, but for output instead of input reloads.
3900
+ *
3901
+ * ZipCPU --- there's gotta be a valid default behaviour for this.
3902
+ */
3903
+
3904
+/* LIMIT_RELOAD_CLASS(MODE, CL) ...
3905
+ *
3906
+ * Don't define this macro unless the target machine has limitations which
3907
+ * require the macro to do something nontrivial.  ZipCPU doesn't, so we won't.
3908
+ */
3909
+
3910
+/* TARGET_SECONDARY_RELOAD
3911
+ * SECONDARY_ ...
3912
+ * Don't think we need these ...
3913
+ */
3914
+
3915
+/* CLASS_MAX_NREGS(CLASS,MODE) ... A C expression for the maximum number of
3916
+ * consecutive registers of class CLASS needed to hold a value of mode MODE.
3917
+ *
3918
+ * This is closely related to the macro HARD_REGNO_NREGS.  In fact, the value
3919
+ * of the macro CLASS_MAX_REGS(CL,M) should be the maximum value of
3920
+ * HARD_REGNO_NREGS(REGNO,MODE) for all REGNO values in the class CLASS.
3921
+ *
3922
+ * This macro helps control the handling of multiple word values in the reload
3923
+ * pass.
3924
+ *
3925
+ * ZipCPU --- We'll just use HARDNO_REGNO_NREGS, since CLASS is independent for
3926
+ * us.  We'll also choose register R0, since ... well, since it simply doesn't
3927
+ * matter.  (HARD_REGNO_NREGS ignores this anyway)
3928
+ */
3929
+#define        CLASS_MAX_NREGS(CLASS, MODE)    HARD_REGNO_NREGS(0,MODE)
3930
+
3931
+/* CANNOT_CHANGE_MODE_CLASS
3932
+ * ???
3933
+ */
3934
+
3935
+/* TARGET_IRA_CHANGE_PSEUDO_ALLOCNO_CLASS
3936
+ */
3937
+
3938
+/* TARRGET_LRA_P
3939
+ * Default looks good.
3940
+ */
3941
+
3942
+/* TARGET_REGISTER_PRIORITY(INT) ... A target hook which returns the register
3943
+ * priority number to which the register HARD_REGNO belongs to.  THe bigger the
3944
+ * number
3945
+ *
3946
+ * The default version of this target hook returns always zero---good enough for
3947
+ * the ZipCPU.
3948
+ */
3949
+
3950
+/* TARGET_REGISTER_USAGE_LEVELING_P(VOID) ... A target hook which returns true
3951
+ * if we need register usage leveling.  That means if a few hard registers are
3952
+ * equally good for the assignment, we choose the least used hard register.  The
3953
+ * register usage leveling may be profitable for some targets.  Don't use usage
3954
+ * leveling for targets with conditional execution or targets with big register
3955
+ * files as it hurts if-conversion and cross-jumping optimizations.  The default
3956
+ * version of this target hook returns always false.
3957
+ *
3958
+ * ZipCPU --- Default is the right answer.
3959
+ */
3960
+
3961
+/* TARGET_DIFFERENT_ADDR_DISPLACEMENT_P ...
3962
+ * Default looks good.
3963
+ */
3964
+
3965
+/* TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV_P ...
3966
+ * Default looks good.
3967
+ */
3968
+
3969
+/* TARGET_LEGITIMIZE_ADDRESS_DISPLACEMENT ....
3970
+ */
3971
+
3972
+/* TARGET_SPILL_CLASS
3973
+ *
3974
+ * ZipCPU --- If we were running in supervisor mode only, this might be the
3975
+ * user set of registers.  However, we're not building for that mode (now),
3976
+ * so we'll leave this at the default of NO_REGS.
3977
+ */
3978
+
3979
+/* TARGET_CSTORE_MODE(ICODE) ... Defines the machine mode to use for the
3980
+ * boolean result of conditional store patterns.  The OCIDE argument is the
3981
+ * instruction code for the cstore being performed.  Not defining this hook is
3982
+ * the same as accepting the mode encoded into operand 0 of the cstore expander
3983
+ * patterns.
3984
+ *
3985
+ * ??? ZipCPU --- I don't follow this documentation.  We'll leave this at the
3986
+ * default therefore.
3987
+ */
3988
+
3989
+/* 17.09 Stack Layout and Calling Conventions */
3990
+
3991
+
3992
+/* STACK_GROWS_DOWNWARD ... Define this macro if pushing a word onto the stack
3993
+ * moves the stack pointer to a smaller address, and false otherwise.
3994
+ *
3995
+ * ZipCPU ... well, our stack does grow downward, but it doesn't do so auto-
3996
+ * magically.  We have to move the stack pointer ourselves.  However, since this
3997
+ * is our convention, we'll define it as such.
3998
+ */
3999
+#undef STACK_GROWS_DOWNWARD
4000
+#define        STACK_GROWS_DOWNWARD    1
4001
+
4002
+/* STACK_PUSH_CODE ... This macro defines the operation used when something is
4003
+ * pushed on the stack.  In RTL, a push operation will be
4004
+ * (set (mem( STACK_PUSH_CODE(reg sp))) ...) The choiecs are PRE_DEC, POST_DEC,
4005
+ * PRE_INC, and POST_INC.  Which of these is correct depends on the stack
4006
+ * direction and on whether the stack pointer points to the last item on the
4007
+ * stack or whether it points to the space for the next item on the stack.
4008
+ * The default is PRE_DECC when STACK_GROWS_DOWNWARD is true, which is almost
4009
+ * always right, and PRE_INC otherwise, which is often wrong.
4010
+ *
4011
+ * ZipCPU --- None of these is right, so let's leave this at the default and
4012
+ * see how badly we get mangled.  In particular, ZipCPU doesn't have any of the
4013
+ * PRE_DEC, POST_DEC, PRE_INC, or POST_INC addressing modes used here.
4014
+ */
4015
+
4016
+/* FRAME_GROWS_DOWNWARD ... Define this macro to nonzero if the addresses of
4017
+ * local variable slots are at negative offsets from the frame pointer.
4018
+ *
4019
+ * ZipCPU --- If the frame pointer is defined as the stack pointer upon the
4020 103 dgisselq
+ * start of function execution, and that stack pointer grows downward, then
4021 102 dgisselq
+ * this should be the case as well.
4022
+ */
4023
+#undef FRAME_GROWS_DOWNWARD
4024
+#define        FRAME_GROWS_DOWNWARD    1
4025
+// #define     FRAME_GROWS_DOWNWARD    0        // This was ECO32's value
4026
+
4027
+
4028
+/* ARGS_GROW_DOWNWARD ... Define this macro if successive arguments to a
4029
+ * function occupy decreasing addresses on the stack.
4030
+ *
4031
+ * ZipCPU -- we can leave this up to the compiler's preferred implementation,
4032
+ * it is of no consequence to the hardware.
4033
+ */
4034
+
4035
+/* STARTING_FRAME_OFFSET ... Offset from the frame pointer to the first local
4036
+ * variable slot to be allocated.  If FRAME_GROWS_DOWNWARD, find the next slot's
4037
+ * offset by subtracting the firstt slot's length from STARTING_FRAME_OFFSET.
4038
+ * Otherwise it is found by adding the length of the first slot to the value
4039
+ * START_FRAME_OFFSET.
4040
+ *
4041
+ * ZipCPU --- I'm not certain on this, let's come back after we look at how
4042
+ * the code is getting generated.  However, the ECO32 code I am copying from
4043
+ * suggests that 0 is the right value, so we'll use that here.
4044
+ */
4045
+// #warning "Re-evaluate me"
4046
+#define        STARTING_FRAME_OFFSET   0
4047
+
4048
+/* STACK_ALIGNMENT_NEEDED ... Define to zero to disable final alignment of the
4049
+ * stack during reload.  The nonzero default for this macro is suitable for most
4050
+ * ports.
4051
+ *
4052
+ * ZipCPU --- we'll leave this at the default, although if any alignment code
4053
+ * shows up on the stack we may need to adjust it.
4054
+ */
4055
+
4056
+/* STACK_POINTER_OFFSET ... Offset from the SP register to the first location at
4057
+ * which outgoing arguments are placed.  If not specified, the default value
4058
+ * of zero is used.  This is the proper value for most machines.
4059
+ */
4060
+#define        STACK_POINTER_OFFSET    0
4061
+
4062
+/* FIRST_PARM_OFFSET ... Offset from the argument pointer register to the first
4063
+ * argument's address.  On some machines it may depend on the data type of the
4064
+ * function.
4065
+ */
4066
+#define        FIRST_PARM_OFFSET(F)    0
4067
+
4068
+/* STACK_DYNAMIC_OFFSET(F) ... Offset from the stack pointer register to an item
4069
+ * dynamically allocated on the stack, e.g., by alloca.  The default value for
4070
+ * this macro is STACK_POINTER_OFFSET plus the length of the outgoing arguments.
4071
+ * The default is correct for most machines, ...
4072
+ *
4073
+ * ZipCPU --- so we'll use it for the ZipCPU.
4074
+ */
4075
+
4076
+/* INITIAL_FRAME_ADDRESS_RTX ... A C expression whose value is RTL representing
4077
+ * the address of the initial stack frame.  This address is passed to
4078
+ * RETURN_ADDR_RTX and DYNAMIC_CHAIN_ADDRESS.  If you don't define this macro,
4079
+ * a reasonable default value will be used.  Define this macro in order to make
4080
+ * frame pointer elimination work in the presence of __builtin_frame_address(C)
4081
+ * and __builtin_return_address(C) for (C) not equal to zero.
4082
+ *
4083
+ * ZipCPU --- Let's try the reasonable default and see what happens.
4084
+ */
4085
+
4086
+/* SETUP_FRAME_ADDRESSES ... A C expression that produces the machine-specific
4087
+ * code to setup the stack so that arbitrary frames can be accessed.  For
4088
+ * example, on the SPARC, we must flush all of the register windows to the stack
4089
+ * before we can access arbitrary stack frames.  You will seldom need to define
4090
+ * this macro.  The default is to do nothing.
4091
+ *
4092
+ * ZipCPU --- which is what we shall do here.
4093
+ */
4094
+
4095
+/* TARGET_BUILTIN_SETJMP_FRAME_VALUE(VOID) ... This target hook should return
4096
+ * an RTX that is used to store the address of the current frame into the
4097
+ * builtin setjmp buffer.  The default value, virtual_stack_vars_rtx, is correct
4098
+ * for most machines.  One reason you may need to define this target hook is if
4099
+ * hard_frame_pointer_rtx is the appropriate value on your machine.
4100
+ *
4101
+ * ZipCPU --- leave this undefined, since the default value should be correct
4102
+ * for "most" machines.
4103
+ */
4104
+
4105
+/* FRAME_ADDR_RTX ... most machines do not need to define it.
4106
+ */
4107
+
4108
+/* RETURN_ADDR_RTX(COUNT,FRAMEADDR) ... A C expression whose value is RTL
4109
+ * representing the value of the return address for the frame COUNT steps up
4110
+ * from the current frame, after the prologue.  FRAMEADDR is the frame pointer
4111
+ * of the COUNT frame, or the frame pointer of the COUNT-1 frame if
4112
+ * RETURN_ADDR_IN_PREVIOUS_FRAME is nonzero.  The value of the expression must
4113
+ * always be the correct address when COUNT is nonzero, but may be NULL_RTX if
4114
+ * there is no way to determine the return address of other frames.
4115
+ *
4116
+ * ZipCPU --- I have no idea how we'd do this, so let's just return NULL_RTX.
4117
+ */
4118
+#undef RETURN_ADDR_RTX
4119
+#define        RETURN_ADDR_RTX(COUNT,FRAMEADDR)        NULL_RTX
4120
+
4121
+/* RETURN_ADDR_IN_PREVIOUS_FRAME ... Define this macro to nonzero value if the
4122
+ * return address of a particular stack frame is accessed from the frame pointer
4123
+ * of the previous stack frame.  The zero default for this macro is suitable
4124
+ * for most ports.
4125
+ *
4126
+ * ZipCPU---Default works here as well.
4127
+ */
4128
+
4129
+/* INCOMING_RETURN_ADDR_RTX ... A C expression whose value is RTL representing
4130
+ * the location of the incoming return address at the beginning of any function,
4131
+ * before the prologue.  This RTL is either a REG, indicating that the return
4132
+ * value is saved in 'REG', or a MEM representing the location in the stack.
4133
+ * If this RTL is a REG, you should define DWARF_RETURN_COLUMN to
4134
+ * DWARF_FRAME_REGNUM(REGNO).
4135
+ *
4136
+ * ZipCPU --- While our incoming return address could theoretically be in any
4137
+ * register, our machine description file is going to place it into register
4138
+ * R0, so that's what we return here.
4139
+ */
4140
+#undef INCOMING_RETURN_ADDR_RTX
4141
+#define        INCOMING_RETURN_ADDR_RTX        gen_rtx_REG(SImode, zip_R0)
4142
+
4143
+
4144
+/* DWARF_ALT_FRAME_RETURN_COLUMN
4145
+ */
4146
+
4147
+/* DWARF_ZERO_REG ... A C exrpession whose value is an integer giving a DWARF2
4148
+ * register number that is considered to always have the value zero.  This
4149
+ * should only be defined if the target has an architected zero register (ZipCPU
4150
+ * does not), and someone decided it was a good idea to use that register number
4151
+ * to terminate the stack backtrace.  New ports should avoid this (so the
4152
+ * ZipCPU port will avoid it as well).
4153
+ *
4154
+ */
4155
+
4156
+/* TARGET_DWARF_HANDLE_FRAME_UNSPEC
4157
+ */
4158
+
4159
+/* INCOMING_FRAME_SP_OFFSET
4160
+ */
4161
+#define        INCOMING_FRAME_SP_OFFSET        0
4162
+
4163
+/* ARG_POINTER_CFA_OFFSET
4164
+ */
4165
+
4166
+/* FRAME_POINTER_CFA_OFFSET
4167
+ */
4168
+
4169
+/* CFA_FRAME_BASE_OFFSET
4170
+ */
4171
+
4172
+/* 17.09.02 Exception handling support */
4173
+
4174
+/* EH_RETURN_DATA_REGNO(N) ... A C expression whose value is the Nth register
4175
+ * number used for data by exception handlers, or INVALID_REGNUM if fewer than
4176
+ * N registers are usable.  The exception handling library routines communicate
4177
+ * with the exception handlers via a set of agreed upon registers.  Ideally
4178
+ * these registers should be call clobbered; it is possible to use call-saved
4179
+ * registers, but may negatively impact code size.  The target must support at
4180
+ * least 2 data registers, but should define 4 if their are enough free
4181
+ * registers.
4182
+ *
4183
+ * You must define this macro if you want to support call frame exception
4184
+ * handling like that provided by DWARF 2.
4185
+ */
4186
+#define        EH_RETURN_DATA_REGNO(N) (((N<ZIP_FIRST_ARG_REGNO)||(N>ZIP_LAST_ARG_REGNO))?(N-1):INVALID_REGNUM)
4187
+
4188
+/* EH_RETURN_STACKADJ_RTX ... A C expression whose value is RTL representing
4189
+ * a location in which to store a stack adjustment to be applied before function
4190
+ * return.  This is used to unwind the stack to an exception handler's call
4191
+ * frame.  It will be assigned zero on code paths that return normally.
4192
+ *
4193
+ * Do not define this macro if the stack pointer is saved and restored by the
4194
+ * regular prolog and epilog code in the call frame itself (which it is for the
4195
+ * ZipCPU); in this case, the exception handling library routines will update
4196
+ * the stack location to be restored in place.  Otherwise, you must define this
4197
+ * macro if you want to support call frame exception handling like that provided
4198
+ * by DWARF 2.
4199
+ *
4200
+ */
4201
+
4202
+/* EH_RETURN_HANDLER_RTX ... A C expression whose value is RTL representing a
4203
+ * location in which to store the address of an exception handler to which we
4204
+ * should return.  It will not be assigned on code paths that return normally.
4205
+ *
4206
+ * Typcally this is the location in the call frame at which the normal return
4207
+ * address is stored.  For targets that return by popping an address of the
4208
+ * stack, this might be a memory address just below the target callf rame
4209
+ * rather than inside the current call frame.  If defined,
4210
+ * EH_RETURN_STACKADJ_RTX will have already been assigned, so it may be used
4211
+ * to calculate the location of the target call frame.
4212
+ *
4213
+ * If you want to support call frame exception handling, you must define either
4214
+ * this macro or the eh_return instruction pattern.
4215
+ */
4216
+// #warning "I don't know what to do here."
4217
+
4218
+/*
4219
+ *
4220
+ *
4221
+ *
4222
+ *   REST OF SECTION SKIPPED ...
4223
+ *
4224
+ *
4225
+ *
4226
+ */
4227
+
4228
+/* 17.09.03 Specifying how stack checking is done */
4229
+
4230
+/* STACK_CHECK_BUILTIN ... a non-zero value if stack checking is done by the
4231
+ * configuration files in a machine-dependent manner.  You should define this
4232
+ * macro if stack checking is required by the ABI of your machine or if you
4233
+ * would like to do stack checking in some more efficient way than the generic
4234
+ * appraoch.  The default value of this macro is zero.
4235
+ *
4236
+ * ZipCPU --- The default makes sense for us.
4237
+ */
4238
+// #define STACK_CHECK_BUILTIN 0
4239
+
4240
+/* STACK_CHECK_STATIC_BUILTIN ... A nonzero value if static stack checking is
4241
+ * done by the configuration files in a machine-dependent manner.  You should
4242
+ * define this macro if you would like to do static stack checking in some more
4243
+ * efficient way than the generic approach.  The default value of this macro
4244
+ * is zero.
4245
+ *
4246
+ * ZipCPU --- The default makes sense for us.
4247
+ */
4248
+
4249
+/* STACK_CHECK_PROBE_INTERVAL_EXP ...  An integer specifying the interval at
4250
+ * which GCC must generate stack probe instructions, defined as 2 raised to this
4251
+ * interval.  You will normally define this macro so that the interval is no
4252
+ * larger than the size of the "guard pages" at the end of a stack area.  The
4253
+ * default value of 12 (4096-byte interval) is suitable for most systems.
4254
+ *
4255
+ * ZipCPU --- Default.
4256
+ */
4257
+
4258
+/* STACK_CHECK_MOVING_SP ... An integer which is non-zero if GCC should move
4259
+ * the stack pointer page by page when doing probes.  This can be necessary
4260
+ * on systems where the stack pointer contains the bottom address of the memory
4261
+ * area accessible to the executing thread at any point in time.  In this
4262
+ * situation, an alternate signal stack is required in order to be able to
4263
+ * recover from a stack overflow.  The default value of this macro is zero.
4264
+ *
4265
+ * ZipCPU -- Default.
4266
+ */
4267
+
4268
+/* STACK_CHECK_PROTECT
4269
+ */
4270
+/* STACK_CHECK_MAX_FRAME_SIZE
4271
+ * ... you should normally not change the default value of this macro.
4272
+ */
4273
+/* STACK_CHECK_FIXED_FRAME_SIZE
4274
+ * ... you ... will normally use the default of four words.
4275
+ */
4276
+
4277
+/* STACK_CHECK_MAX_VAR_SIZE
4278
+ * ... you will normally not need to override that default.
4279
+ */
4280
+
4281
+/* 17.09.04 Registers that Address the Stack Frame*/
4282
+
4283
+/* STACK_POINTER_REGNUM ... The register number of the stack pointer register,
4284
+ * which must also be a fixed register according to FIXED_REGISTERS.  On most
4285
+ * machines, the hardware determines which register this is.
4286
+ */
4287
+#undef STACK_POINTER_REGNUM
4288
+#define        STACK_POINTER_REGNUM    zip_SP
4289
+
4290
+/* FRAME_POINTER_REGNUM ... The register number of the frame pointer register,
4291
+ * which is used to access certain automatic variables in the stack frame.  On
4292
+ * some machines, the hardware determines which register this is.  On other
4293
+ * machines you can choose any register you wish for this purpose.
4294
+ *
4295
+ * ZipCPU --- While I'd like to dump this pointer, since I don't really see
4296
+ * a need for it, alloca() requires it.  Therefore let's assine a register to
4297
+ * this purpose and watch what the compiler does with it.
4298
+ */
4299 103 dgisselq
+#ifdef zip_FP_PSEUDO
4300
+#define        FRAME_POINTER_REGNUM    zip_FP_PSEUDO
4301
+#else
4302 102 dgisselq
+#define        FRAME_POINTER_REGNUM    zip_FP
4303 103 dgisselq
+#endif
4304 102 dgisselq
+
4305
+/* HARD_FRAME_POINTER_REGNUM ... On some machines the offset between the frame
4306
+ * pointer and starting offset of the automatic variables is not known until
4307
+ * after register allocation has been done (for example, because the saved
4308
+ * registers are between these two locations).  On those machines, define
4309
+ * FRAME_POINTER_REGNUM the number of a special, fixed register to be used
4310
+ * internally until the offset is known, and define HARD_FRAME_POINTER_REGNUM
4311
+ * to be the actual hard register number used for the frame pointer.
4312
+ *
4313
+ * Do not define this macro if it would be the same as FRAME_POINTER_REGNUM
4314
+ *
4315
+ * ZipCPU --- we do not define this macro.
4316
+ */
4317 103 dgisselq
+#if (zip_FP == FRAME_POINTER_REGNUM)
4318
+#define HARD_FRAME_POINTER_REGNUM      zip_FP
4319
+#endif
4320 102 dgisselq
+
4321
+/* ARG_POINTER_REGNUM ... The register number of the arg pointer register, which
4322
+ * is used to access the function's argument list.  On some machines, this is
4323
+ * the same as the frame pointer register.  On some machines, the hardware
4324
+ * determines which register this is.  On other machines, you can choose any
4325
+ * register you wish for this purpose.  If this is not the same register as the
4326
+ * frame pointer register, then you must mark it as a fixed register according
4327
+ * to FIXED_REGISTERs, or arrange to be able to eliminate it.
4328
+ *
4329
+ * ZipCPU --- We really don't want to lose another register to something
4330
+ * pointless, so let's set this to be the frame pointer register.  Especially
4331
+ * given the ZipCPU's ease of accessing things via offsets of registers, this
4332
+ * should work for a rather large stack frame.
4333
+ */
4334 103 dgisselq
+#define ARG_POINTER_REGNUM     FRAME_POINTER_REGNUM
4335 102 dgisselq
+
4336
+/* HARD_FRAME_POINTER_IS_FRAME_POINTER ... define this to be a preprocessor
4337
+ * constant that is nonzero if hard_frame_pointer_rtx and frame_pointer_rtx
4338
+ * should be the same.  The default definition is sufficient for us.
4339
+ */
4340
+
4341
+/* HARD_FRAME_POINTER_IS_ARG_POINTER ...
4342
+ * ZipCPU doesn't need this macro
4343
+ */
4344
+
4345
+/* RETURN_ADDRESS_POINTER_REGNUM ... The register number of the return address
4346
+ * pointer register, which is used to access the current function's return
4347
+ * address from the stack.  On some machines, the return address is not at a
4348
+ * fixed offset from the frame pointer or stack pointer or argument pointer.
4349
+ * This register can be defined to point to the return address on the stack, and
4350
+ * then to be converted by ELIMINABLE_REGS into either the frame pointer or the
4351
+ * stack pointer.
4352
+ *
4353
+ * Do not define this macro unless there is no other way to get the return
4354
+ * address from the stack.
4355
+ *
4356
+ * ZipCPU---we need this.
4357
+ */
4358
+#define        RETURN_ADDRESS_REGNUM   zip_R0
4359
+
4360
+
4361
+/* STATIC_CHAIN_REGNUM ... Register numbers used for passing a function's
4362
+ * static chain pointer.  If register windows are used, the register number as
4363
+ * seen by the called function is STATIC_CHAIN_INCOMING_REGNUM, while the
4364
+ * register number as seen by the calling function is STATIC_CHAIN_REGNUM.  If
4365
+ * these register are the same, STATIC_CHAIN_INCOMING_REGNUM need not be
4366
+ * defined.
4367
+ *
4368
+ * ZipCPU doesn't have register windows, so we don't need to define this.
4369
+ */
4370
+// #warning "I have no reason to believe this will even work"
4371
+#define        STATIC_CHAIN_REGNUM     zip_GOT
4372
+
4373
+/* TARGET_STATIC_CHAIN ... This hook replaces the use of STATIC_CHAIN_REGNUM et
4374
+ * al for targets that may use different static chain locations for different
4375
+ * nested functions.  This may be required if the target has function attributes
4376
+ * that affect the calling conventions of the function and those calling
4377
+ * conventions use different static chain locations.
4378
+ *
4379
+ * ZipCPU --- don't need this.
4380
+ */
4381
+// #define     STATIC_CHAIN_REGNUM     zip_R11
4382
+
4383
+
4384
+/* DWARF_FRAME_REGISTERS ... This macro specifies  the maximum number of hard
4385
+ * registers that can be saved in a call frame.  This is used to size data
4386
+ * structures used in DWARF2 exception handling.
4387
+ *
4388
+ * Prior to GCC 3.0, this macro was needed in order to establish a stable
4389
+ * exception handling ABI in the face of adding new hard registers for ISA
4390
+ * extensions.  In GCC 3.0 and later, the EH ABI is insulated from changes in
4391
+ * the number of hard registers.  Nevertheless, this macro can still be used to
4392
+ * reduce the runtime memory requirements of the exception handling routines,
4393
+ * which can be substantial if the ISA contains a lot of registers that are not
4394
+ * call-saved.
4395
+ *
4396
+ * If this macro is not defined, it defaults to FIRST_PSEUDO_REGISTER.
4397
+ *
4398
+ * ZipCPU --- The default is not sufficient.  The CC and PC registers need to
4399
+ * be saved and examined as well in any debug/exception context.  Hence, we
4400
+ * define this to be all of our registers.
4401
+ */
4402
+#undef DWARF_FRAME_REGISTERS
4403
+#define        DWARF_FRAME_REGISTERS   16
4404
+
4405
+/* PRE_GCC3_DWARF_FRAME_REGISTERS ... This macro is similar to DWARF_FRAME_REG..
4406
+ * but is provided for backward compatibility in pre GCC 3.0 compiled code.
4407
+ *
4408
+ * If not defined, it defaults to DWARF_FRAME_REGISTERS---which is perfect for
4409
+ * the ZipCPU.
4410
+ */
4411
+
4412
+/* DWARF_REG_TO_UNWIND_COLUMN(REGNO) ... Define this macro if the target's
4413
+ * representation for dwarf registers is different than the internal
4414
+ * representation for unwind column.  Given a dwarf register, this macro should
4415
+ * return the unwind column number to use instead.
4416
+ *
4417
+ * ... ???
4418
+ */
4419
+
4420
+/* DWARF_FRAME_REGNUM(REGNO) ... Define this macro is the target's
4421
+ * representation for dwarf registers used in .eh_frame or .debug_frame is
4422
+ * different from that used in other debug info sections.  Given a GCC hard
4423
+ * register number, this macro should return the .eh_frame register number.
4424
+ * The default is DBX_REGISTER_NUMBER(REGNO).
4425
+ *
4426
+ * ZipCPU --- provided we define DBX_REGISTER_NUMBER(REGNO) well, this default
4427
+ * should still work for us.
4428
+ */
4429
+
4430
+/* DWARF2_FRAME_REG_OUT(REGNO, FOR_EH) ... Define this macro to map register
4431
+ * numbers held in the call frame info that GCC has collected using
4432
+ * DWARF_FRAME_REGNO to those that should be output in .debug_frame (for_eh is
4433
+ * zero) and .eh_frame (for_eh is non-zero). The default is to return REGNO.
4434
+ *
4435
+ * ZipCPU --- Default is good enough.
4436
+ */
4437
+
4438
+/* REG_VALUE_IN_UNWIND_CONTEXT ... Define this macro if the target stores
4439
+ * register values as _Unwind_Word type in unwind context.  It should be defined
4440
+ * if target register size is larger than the size of void *.  The default
4441
+ * is to store register values as void *type.
4442
+ *
4443
+ * ZipCPU --- Default is what we need.
4444
+ */
4445
+
4446
+/* ASSUME_EXTENDED_UNWIND_CONTEXT ... Define this macro to be 1 if the target
4447
+ * always uses extended unwind context with version, args_size, and by_value
4448
+ * fields.  If it is undefined, it will always be defined to 1 when REG_VALUE_IN_UNWIND_CONTEXT is defined and 0 otherwise.
4449
+ *
4450
+ */
4451
+
4452
+
4453
+/* 17.09.05 Eliminating Frame Pointer and Arg Pointer */
4454
+
4455
+/* TARGET_FRAME_POINTER_REQUIRED(VOID) ... This target hook should return true
4456
+ * if a function must have and use a frame pointer.  This target hook is
4457
+ * called in the reload pass.  If its return value is true, the function will
4458
+ * have a frame pointer.
4459
+ *
4460
+ * This target hook can in principle examine the current function and decide
4461
+ * according to the facts, but on most machines the constant false or the
4462
+ * constant true suffices.  Use false when the machine allows code to be
4463
+ * generated with no frame pointer, and doing so saves some time or space.
4464
+ * Use true when there is no possible advantage to avoiding a frame pointer.
4465
+ *
4466
+ * ZipCPU---if we add in a frame pointer, we become register starved.  Hence,
4467
+ * we'll treat this as a constant false--which is also the default value.
4468
+ */
4469
+#define        target_frame_pointer_required   zip_frame_pointer_required
4470
+
4471
+/* INITIAL_FRAME_POINTER_OFFSET ... A C statement to store in the variable
4472
+ * depth-var the difference between the frame pointer and the stack pointer
4473
+ * values immediately after the function prologue.  The value would be computed
4474
+ * from information such as the result of get_frame_size() and the tables of
4475
+ * registers regs_ever_live and call_used_regs.
4476
+ *
4477
+ * If ELIMINABLE_REGS is defined, this macro will not be used and need not be
4478
+ * defined.  Otherwise, it must be defined even if TARGET_FRAME_POINTER_REQD
4479
+ * always returns true; in that case you may set depth-var to anything.
4480
+ *
4481
+ * ZipCPU --- we intend to set ELIMINABLE_REGS, so this is not necessary.
4482
+ */
4483
+// #define     INITIAL_FRAME_POINTER_OFFSET(DEPTH)     (DEPTH) = 0
4484
+
4485
+
4486
+/* ELIMINABLE_REGS ... If defined, this macro specifies a table of register
4487
+ * pairs used to eliminate unneeded registers that point into the stack frame.
4488
+ * If it is not defined, the only elimination attempted by the compiler is to
4489
+ * replace references to the frame pointer with references to the stack pointer.
4490
+ *
4491
+ * On some machines, the position of the argument pointer is not known until
4492
+ * the compilation is completed.  In such a case, a separate hard register
4493
+ * must be used for the argument pointer.  This register can be eliminated by
4494
+ * replacing it with either the frame pointer or the argument pointer,
4495
+ * depending on whether or not the frame pointer has been eliminated.
4496
+ *
4497
+ * ZipCPU we'll take their suggestion and define this as:
4498
+ */
4499
+#undef ELIMINABLE_REGS
4500 103 dgisselq
+#ifdef zip_FP_PSEUDO
4501 102 dgisselq
+#define        ELIMINABLE_REGS \
4502 103 dgisselq
+        {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},          \
4503
+         { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},     \
4504
+         { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},        \
4505
+         { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
4506
+#else
4507
+# if (ARG_POINTER_REGNUM == FRAME_POINTER_REGNUM)
4508
+#  define      ELIMINABLE_REGS \
4509
+        {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
4510
+# else
4511
+#  define      ELIMINABLE_REGS \
4512 102 dgisselq
+       {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM },  \
4513
+        { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM },  \
4514
+        { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
4515 103 dgisselq
+# endif
4516
+#endif
4517 102 dgisselq
+
4518
+/* bool TARGET_CAN_ELIMINATE(FROM,TO) ... This target function should return
4519
+ * true if the compiler is allowed to try to replace register number FROM with
4520
+ * register number TO.  This target hook need only be defined if ELIMINABLE_REGS
4521
+ * is defined, and will usually return true since most of the cases preventing
4522
+ * register elimination are things that the compiler  already knows about.
4523
+ *
4524
+ * ZipCPU ... does the compiler  know about my decision as to whether or not
4525
+ * the frame pointer was needed?  The m68k code suggests it does not ...
4526
+ */
4527
+#define TARGET_CAN_ELIMINATE   zip_can_eliminate
4528
+
4529
+/* INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) ... This macro is similar to
4530
+ * INITIAL_FRAME_POINTER_OFFSET.  It specifies the initial difference between
4531
+ * the specified pair of registers.  This macro must be defined if
4532
+ * ELIMINABLE_REGS is defined.
4533
+ *
4534
+ * ZipCPU---Is there a default we can use?
4535
+ */
4536
+#define        INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)    (OFFSET)=0
4537
+/*
4538
+#define        INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)            \
4539
+       do { (OFFSET) = zip_initial_elimination_offset((FROM), (TO)); } \
4540
+       while(0)                                        \
4541
+*/
4542
+
4543
+/* 17.09.06 Passing function arguments on the stack */
4544
+
4545
+/* TARGET_PROMOTE_PROTOTYPES ... Returns true if an argument declared in a
4546
+ * prototype as an integral type smaller than int should actually be
4547
+ * passed as an int.  In addition to avoiding errors in certain cases of
4548
+ * mismatch, it also makes for better code on certain machines.  The default is
4549
+ * to not promote prototypes.
4550
+ *
4551
+ * Since everything is an int on the ZipCPU, let's promote anything smaller
4552
+ * (which should still be an int) up to an int anyway.
4553
+ */
4554
+#undef TARGET_PROMOTE_PROTOTYPES
4555
+#define        TARGET_PROMOTE_PROTOTYPES       hook_bool_const_tree_true
4556
+
4557
+/* PUSH_ARGS ... A C expression.  If nonzero, push instructions will be used to
4558
+ * pass outgoing arguments.  If the target machine does not have a push
4559
+ * instruction, set it to zero.  That directs GCC to use an alternate strategy:
4560
+ * to allocate the entire argument block and then store the arguments into it.
4561
+ * When PUSH_ARGS is nonzero, PUSH_ROUNDING must be defined too.
4562
+ *
4563
+ * ZipCPU does not have a push instruction, so we set this to zero.
4564
+ */
4565
+#undef PUSH_ARGS
4566
+#define        PUSH_ARGS       0
4567
+
4568
+/* PUSH_ARGS_REVERSED ... A C expression.  If nonzero, function arguments will
4569
+ * be evaluated last to first, rather than first to last.  If this macro is
4570
+ * not defined, it defaults to PUSH_ARGS on targets where the stack and args
4571
+ * grow in opposite directions, and zero otherwise.
4572
+ *
4573
+ * ZipCPU---Let's evaluate our arguments first to last.
4574
+ */
4575
+#define        PUSH_ARGS_REVERSED      1
4576
+
4577
+/* PUSH_ROUNDING(NPUSHED) ... A C expression that is the number of bytes
4578
+ * actually pushed onto the stack when an instruction attempts to push
4579
+ * (NPUSHED) bytes.
4580
+ *
4581
+ * ZipCPU---We cannot push bytes.  Let's leave this undefined and see what
4582
+ * happens.
4583
+ */
4584
+// #warning "No appropriate definition seemed right."
4585
+
4586
+/* ACCUMULATE_OUTGOING_ARGS ... A C expression.  If non-zero, the maximum amount
4587
+ * of space required for outgoing arguments will be computed and placed into
4588
+ * crtl->outgoing_args_size.  No space will be pushed onto the stack for each call; instead the function prologue should increase the stack frame size by this
4589
+ * amount.
4590
+ *
4591
+ * ZipCPU---This is *cool* and so necessary---it saves an extra two instructions
4592
+ * each time we try to call a function/routine.  Yes, we want and *need* this
4593
+ * for good performance.  I mean, think of it, free performance increase?  Who
4594
+ * could argue with that?
4595
+ */
4596
+#undef ACCUMULATE_OUTGOING_ARGS
4597
+#define        ACCUMULATE_OUTGOING_ARGS        1
4598
+
4599
+
4600
+/* REG_PARM_STACK_SPACCE(FN) ... Define this macro if functions should assume
4601
+ * that stack space has been allocated for arguments even when their values
4602
+ * are passed in registers.  The value of this macro is the size, in bytes, of
4603
+ * the area reserved for arguments passed in registers for the function
4604
+ * represented by FN, which can be zero if GCC is calling a library function.
4605
+ * The argument FN can be the FUNCTION_DECL, or the type itself of the function.
4606
+ *
4607
+ * This space can be allocated by the caller, or be part of the machine
4608
+ * dependent stack frame: OUTGOING_REG_PARM_STACK_SPACE says which.
4609
+ *
4610
+ * ZipCPU --- Why allocate space you won't use?  Let's leave this undefined
4611
+ * therefore.
4612
+ */
4613
+// #undef      REG_PARM_STACK_SPACE
4614
+
4615
+
4616
+
4617
+/* INCOMING_REG_PARM_STACK_SPACE(FN) ... Like REG_PARM_STACK_SPACE, but for
4618
+ * incoming register arguments.  Define this macro if space guaranteed when
4619
+ * compiling a function body is different to space required when making a call,
4620
+ * a situation that can arise with K&R style function definitions.
4621
+ *
4622
+ */
4623
+
4624
+/* OUTGOING_REG_PARM_STACK_SPACE(FN) ... Define this to a nonzero value if it
4625
+ * is the responsibility of the caller to allocate the area reserved for
4626
+ * arguments passed in registers when calling a function of FN.  FN may be NULL
4627
+ * if the function called is a library function.
4628
+ *
4629
+ * ZipCPU---Why allocate space you don't need?
4630
+ */
4631
+#define        OUTGOING_REG_PARM_STACK_SPACE(FNTYPE)   0
4632
+
4633
+
4634
+/* STACK_PARMS_IN_REG_PARM_AREA ... Define this macro if REG_PARM_STACK_SPACE
4635
+ * is defined, buyt the stack parameters don't skip the area specified by it.
4636
+ *
4637
+ * ZipCPU---We didn't define REG_PARM_STACK_SPACE, so we won't define this.
4638
+ */
4639
+
4640
+/* TARGET_RETURN_POPS_ARGS(DECL,FNTYPE,SZ) ... This target hook returns the
4641
+ * number of bytes of its own arguments that a function pops on returning, or 0
4642
+ * if the function pops no arguments and the caller must therefore pop them all
4643
+ * after the function returns.
4644
+ *
4645
+ * ZipCPU --- If we define this, we'll lose our gain from
4646
+ * ACCUMULATE_OUTOING_ARGS.  Thus, we leave this undefined.
4647
+ */
4648
+
4649
+/* CALL_POPS_ARGS(CUM) ... A C expression that should indicate the number of
4650
+ * bytes a call sequence pops off of the stack.  It is added to the value of
4651
+ * RETURN_POPS_ARGS when compiling a function call.  CUM is the variable in
4652
+ * which all arguments to the function have been accumulated.
4653
+ *
4654
+ * ZipCPU---The call sequence, by itself, doesn't touch the stack.  Therefore
4655
+ * this is zero.
4656
+ */
4657
+#undef CALL_POPS_ARGS
4658
+#define        CALL_POPS_ARGS(CUM)     0